91 Commits

Author SHA1 Message Date
PeixinQiao
706dec3e47 [mlir] Fix the build error in OpenMPToLLVMIRTranslation.cpp
Fix the build error with "-Werror,-Wcovered-switch-default".

Reviewed By: hpmorgan

Differential Revision: https://reviews.llvm.org/D123018
2022-04-04 19:46:16 +08:00
Peixin-Qiao
3e7415a0ff [OMPIRBuilder] Support ordered clause specified without parameter
This patch supports ordered clause specified without parameter in
worksharing-loop directive in the OpenMPIRBuilder and lowering MLIR to
LLVM IR.

Reviewed By: Meinersbur

Differential Revision: https://reviews.llvm.org/D114940
2022-04-01 16:17:29 +08:00
Nikita Popov
ea043ea183 [MLIR] Avoid some pointer element type accesses
Determine the element type from the MLIR LLVMPointerType, rather
than the LLVM PointerType.
2022-03-30 10:00:51 +02:00
Shraiysh Vaishay
4d1010909f [mlir][OpenMP] Fix memory leak by deleting unused value
Reviewed By: ftynse, rriddle

Differential Revision: https://reviews.llvm.org/D122633
2022-03-30 03:25:53 +05:30
Shraiysh Vaishay
8722c12c12 [mlir][OpenMP][IRBuilder] Add support for nowait on single construct
This patch adds the nowait parameter to `createSingle` in
OpenMPIRBuilder and handling for IR generation from OpenMP Dialect.

Also added tests for the same.

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D122371
2022-03-24 22:51:52 +05:30
Shraiysh Vaishay
3c0d470865 [mlir][OpenMP] omp.single translation to LLVM IR
This patch adds translation from omp.single to LLVM IR.

Depends on D122288

Reviewed By: ftynse, kiranchandramohan

Differential Revision: https://reviews.llvm.org/D122297
2022-03-24 10:07:30 +05:30
Shraiysh Vaishay
31486a9fc2 [mlir][OpenMP] Added translation from omp.atomic.capture to LLVM IR
This patch adds translation from `omp.atomic.capture` to LLVM IR. Also
added tests for the same.

Depends on D121546

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D121554
2022-03-21 16:39:36 +05:30
Benjamin Kramer
89d8035e36 Use llvm::append_range where applicable
It knows the size, so no need to call reserve beforehand. NFCI.
2022-03-18 20:05:48 +01:00
River Riddle
77eee5795e [mlir] Refactor DialectRegistry delayed interface support into a general DialectExtension mechanism
The current dialect registry allows for attaching delayed interfaces, that are added to attrs/dialects/ops/etc.
when the owning dialect gets loaded. This is clunky for quite a few reasons, e.g. each interface type has a
separate tracking structure, and is also quite limiting. This commit refactors this delayed mutation of
dialect constructs into a more general DialectExtension mechanism. This mechanism is essentially a registration
callback that is invoked when a set of dialects have been loaded. This allows for attaching interfaces directly
on the loaded constructs, and also allows for loading new dependent dialects. The latter of which is
extremely useful as it will now enable dependent dialects to only apply in the contexts in which they
are necessary. For example, a dialect dependency can now be conditional on if a user actually needs the
interface that relies on it.

Differential Revision: https://reviews.llvm.org/D120367
2022-03-16 22:15:25 -07:00
River Riddle
0bf9aabd09 [mlir:OpenMP] Fix memory leak in asan translation
A fake unreachable was created and removed, but never
erased.
2022-03-15 21:54:55 -07:00
Arnamoy Bhattacharyya
0e9198c3e9 [MLIR][OpenMP] Add support for basic SIMD construct
Patch adds a new operation for the SIMD construct.  The op is designed to be very similar to the existing `wsloop` operation, so that the `CanonicalLoopInfo` of `OpenMPIRBuilder` can be used.

Reviewed By: shraiysh

Differential Revision: https://reviews.llvm.org/D118065
2022-03-15 09:41:04 -04:00
Thomas Raoux
6d007e0278 [mlir][nvvm] Fix bug in ldmatrix intrinsic conversion
The ldmatrix intrinsic trans option was inverted.

Bug found by @christopherbate!

Differential Revision: https://reviews.llvm.org/D121666
2022-03-15 05:04:09 +00:00
Thomas Raoux
2f33f11428 [mlir][NVVM] Add ldmatrix op to NVVM dialect
Differential Revision: https://reviews.llvm.org/D121347
2022-03-10 20:37:17 +00:00
Shraiysh Vaishay
6dd54da5a5 [OpenMP][mlir] Lowering for omp.atomic.update
This patch adds lowering from omp.atomic.update to LLVM IR. Whenever a
special LLVM IR instruction is available for the operation, `atomicrmw`
instruction is emitted, otherwise a compare-exchange loop based update
is emitted.

Depends on D119522

Reviewed By: ftynse, peixin

Differential Revision: https://reviews.llvm.org/D119657
2022-03-10 18:28:51 +05:30
Shraiysh Vaishay
7c385c4b2f [mlir][OpenMP] Generating enums in accordance with the guidelines
This patch changes the enums generated from `OMP.td` for MLIR according
to the enum naming guidelines in LLVM Coding Standards.

This also helps the issues we had with `static` being a C++ keyword and
also a value for the schedule clause.

Enumerator naming guidelines: https://llvm.org/docs/CodingStandards.html#name-types-functions-variables-and-enumerators-properly

Reviewed By: kiranchandramohan

Differential Revision: https://reviews.llvm.org/D120825
2022-03-09 20:10:45 +05:30
Peixin-Qiao
a5605c9a15 [MLIR] Fix afterIP for dynamic worksharing-loop after collaping loops
The loopInfos gets invalidated after collapsing nested loops. Use the
saved afterIP since the returned afterIP by applyDynamicWorkshareLoop
may be not valid.

Reviewed By: shraiysh

Differential Revision: https://reviews.llvm.org/D120294
2022-03-03 15:22:20 +08:00
Shraiysh Vaishay
d2f0fe23d2 [mlir][OpenMP] Added assemblyFormat for atomic and critical operations
This patch adds assemblyFormat for `omp.critical.declare`, `omp.atomic.read`,
`omp.atomic.write`, `omp.atomic.update` and `omp.atomic.capture`.

Also removing those clauses from `parseClauses` that aren't needed
anymore, thanks to the new assemblyFormats.

Reviewed By: NimishMishra, rriddle

Differential Revision: https://reviews.llvm.org/D120248
2022-03-02 11:22:09 +05:30
Michael Kruse
a66f7769a3 [OpenMPIRBuilder] Implement static-chunked workshare-loop schedules.
Add applyStaticChunkedWorkshareLoop method implementing static schedule when chunk-size is specified. Unlike a static schedule without chunk-size (where chunk-size is chosen by the runtime such that each thread receives one chunk), we need two nested loops: one for looping over the iterations of a chunk, and a second for looping over all chunks assigned to the threads.

This patch includes the following related changes:
 * Adapt applyWorkshareLoop to triage between the schedule types, now possible since all schedules have been implemented. The default schedule is assumed to be non-chunked static, as without OpenMPIRBuilder.
 * Remove the chunk parameter from applyStaticWorkshareLoop, it is ignored by the runtime. Change the value for the value passed to the init function to 0, as without OpenMPIRBuilder.
 * Refactor CanonicalLoopInfo::setTripCount and CanonicalLoopInfo::mapIndVar as used by both, applyStaticWorkshareLoop and applyStaticChunkedWorkshareLoop.
 * Enable Clang to use the OpenMPIRBuilder in the presence of the schedule clause.

Differential Revision: https://reviews.llvm.org/D114413
2022-02-28 18:18:33 -06:00
Shraiysh Vaishay
5ee500acbb [mlir][OpenMP] Remove clauses that are not being handled
This patch removes the following clauses from OpenMP Dialect:

 - private
 - firstprivate
 - lastprivate
 - shared
 - default
 - copyin
 - copyprivate

The privatization clauses are being handled in the flang frontend. The
data copying clauses are not being handled anywhere for now. Once
we have a better picture of how to handle these clauses in OpenMP
Dialect, we can add these. For the time being, removing unneeded
clauses.

For detailed discussion about this refer to [[ https://discourse.llvm.org/t/rfc-privatisation-in-openmp-dialect/3526 | Privatisation in OpenMP dialect ]]

Reviewed By: kiranchandramohan, clementval

Differential Revision: https://reviews.llvm.org/D120029
2022-02-19 01:13:05 +05:30
Shraiysh Vaishay
b85cfe208f [OpenMP][IRBuilder] Change the default constructor for OpenMPIRBuilder::LocationDescription
This patch changes the argument from template-IRBuilder to IRBuilderBase
thus allowing us to write less code while getting the location from a
builder.

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D119717
2022-02-15 00:40:34 +05:30
serge-sans-paille
ffe8720aa0 Reduce dependencies on llvm/BinaryFormat/Dwarf.h
This header is very large (3M Lines once expended) and was included in location
where dwarf-specific information were not needed.

More specifically, this commit suppresses the dependencies on
llvm/BinaryFormat/Dwarf.h in two headers: llvm/IR/IRBuilder.h and
llvm/IR/DebugInfoMetadata.h. As these headers (esp. the former) are widely used,
this has a decent impact on number of preprocessed lines generated during
compilation of LLVM, as showcased below.

This is achieved by moving some definitions back to the .cpp file, no
performance impact implied[0].

As a consequence of that patch, downstream user may need to manually some extra
files:

llvm/IR/IRBuilder.h no longer includes llvm/BinaryFormat/Dwarf.h
llvm/IR/DebugInfoMetadata.h no longer includes llvm/BinaryFormat/Dwarf.h

In some situations, codes maybe relying on the fact that
llvm/BinaryFormat/Dwarf.h was including llvm/ADT/Triple.h, this hidden
dependency now needs to be explicit.

$ clang++ -E  -Iinclude -I../llvm/include ../llvm/lib/Transforms/Scalar/*.cpp -std=c++14 -fno-rtti -fno-exceptions | wc -l
after:   10978519
before:  11245451

Related Discourse thread: https://llvm.discourse.group/t/include-what-you-use-include-cleanup
[0] https://llvm-compile-time-tracker.com/compare.php?from=fa7145dfbf94cb93b1c3e610582c495cb806569b&to=995d3e326ee1d9489145e20762c65465a9caeab4&stat=instructions

Differential Revision: https://reviews.llvm.org/D118781
2022-02-04 11:44:03 +01:00
Nicolas Vasilache
42398b5142 [mlir][LLVM] Add support for operand_attrs to InlineAsmOp
This revision adds enough support to allow InlineAsmOp to work properly with indirect memory constraints "*m".
These require an explicit "elementtype" TypeAttr on the operands to pass LLVM verification and need to be provided.

Reviewed By: bkramer

Differential Revision: https://reviews.llvm.org/D118006
2022-02-01 05:56:14 -05:00
Nikita Popov
f2c2a31dd7 [OpenMPIRBuilder] Store element type in AtomicOpValue
With opaque pointers, we can no longer derive this from the pointer
type, so we need to explicitly provide the element type the atomic
operation should work with.

Differential Revision: https://reviews.llvm.org/D118359
2022-01-28 09:35:11 +01:00
Mehdi Amini
7ebd22c504 Revert "[mlir][LLVM] Add support for operand_attrs to InlineAsmOp"
This reverts commit e6ce2c0b8d5f8253791bf87145669c58328c30db.

The test is failing in CI right now.
2022-01-26 23:59:24 +00:00
Nicolas Vasilache
e6ce2c0b8d [mlir][LLVM] Add support for operand_attrs to InlineAsmOp
This revision adds enough support to allow InlineAsmOp to work properly with indirect memory constraints "*m".
These require an explicit "elementtype" TypeAttr on the operands to pass LLVM verification and need to be provided.

Reviewed By: bkramer

Differential Revision: https://reviews.llvm.org/D118006
2022-01-26 07:42:35 -05:00
Nikita Popov
22487280dc [NFC] Remove more uses of PointerType::getElementType() (NFC)
Replace more uses which I missed in the first pass with
Type::getPointerElementType().
2022-01-25 10:13:53 +01:00
Lorenzo Chelini
217570b03b [MLIR][OpenMP] Suppress -Wreturn-type warnings (NFC) 2022-01-24 16:50:56 +01:00
Michael Kruse
616f77172f [OpenMPIRBuilder] Detect and fix ambiguous InsertPoints for createParallel.
When a Builder methods accepts multiple InsertPoints, when both point to
the same position, inserting instructions at one position will "move" the
other after the inserted position since the InsertPoint is pegged to the
instruction following the intended InsertPoint. For instance, when
creating a parallel region at Loc and passing the same position as AllocaIP,
creating instructions at Loc will "move" the AllocIP behind the Loc
position.

To avoid this ambiguity, add an assertion checking this condition and
fix the unittests.

In case of AllocaIP, an alternative solution could be to implicitly
split BasicBlock at InsertPoint, using the first as AllocaIP, the second
for inserting the instructions themselves. However, this solution is
specific to AllocaIP since AllocaIP will always have to be first. Hence,
this is an argument to generally handling ambiguous InsertPoints as API
sage error.

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D117226
2022-01-20 10:13:44 -06:00
Peixin-Qiao
a56a7d99e8 [MLIR][OpenMP] Support schedule chunk size with various bit width
The chunk size in schedule clause is one integer expression, which can
be either constant integer or integer variable. Fix schedule clause in
MLIR Op Def to support integer expression with different bit width.

Reviewed By: shraiysh

Differential Revision: https://reviews.llvm.org/D116073
2022-01-19 12:36:53 +08:00
Mogball
aae5125550 [mlir] Replace StrEnumAttr -> EnumAttr in core dialects
Removes uses of `StrEnumAttr` in core dialects

Reviewed By: mehdi_amini, rriddle

Differential Revision: https://reviews.llvm.org/D117514
2022-01-18 17:15:00 +00:00
Shraiysh Vaishay
a8586b573e [mlir][OpenMP] Change the syntax of omp.atomic.read op
This patch changes the syntax of omp.atomic.read to take the address of
destination, instead of having the value in a result. This will allow
using omp.atomic.read operation within an omp.atomic.capture operation
thus making its implementation less complex.

Reviewed By: peixin

Differential Revision: https://reviews.llvm.org/D116396
2022-01-10 16:19:45 +05:30
Shraiysh Vaishay
6bcb4c44de [mlir][OpenMP] Added omp.atomic.write lowering to LLVM IR
This patch adds omp.atomic.write lowering to LLVM IR.
Also, changed the syntax to have equal symbol instead of the comma to
make it more intuitive.

Reviewed By: kiranchandramohan, peixin

Differential Revision: https://reviews.llvm.org/D116416
2022-01-07 10:01:57 +05:30
Markus Böck
560972052a [mlir][LLVM] Implement mapping of phi source values of llvm.invoke
This patch allows the usage of the normalDestOperands and unwindDestOperands operands of llvm.invoke and have them be correctly mapped to phis in the successor when exported to LLVM IR.

Differential Revision: https://reviews.llvm.org/D116706
2022-01-06 11:27:14 +01:00
Markus Böck
2a0e05100c [mlir][LLVM] Set cleanup flag on llvm.landingpad when exporting to LLVM IR
Exporting a llvm.landingpad operation with the cleanup flag set is currently ignored by the export code.

Differential Revision: https://reviews.llvm.org/D116565
2022-01-04 08:19:26 +01:00
Markus Böck
c343c200ea [mlir][LLVM] Fix mapping of result values of llvm.invoke during export
The result value of a llvm.invoke operation is currently not mapped to the corresponding llvm::Value* when exporting to LLVM IR. This leads to any later operations using the result to crash as it receives a nullptr.

Differential Revision: https://reviews.llvm.org/D116564
2022-01-03 23:53:01 +01:00
Mehdi Amini
5a1f6077ec Apply clang-tidy fixes for readability-container-size-empty for MLIR (NFC)
Reviewed By: rriddle, Mogball

Differential Revision: https://reviews.llvm.org/D116252
2022-01-02 01:56:38 +00:00
Johannes Doerfert
944aa0421c Reapply "[OpenMP][NFCI] Embed the source location string size in the ident_t"
This reverts commit 73ece231ee0cf048d56841f47915beb1db6afc26 and
reapplies 7bfcdbcbf368cea14a5236080af975d5878a46eb with mlir changes.
Also reverts commit 423ba12971bac8397c87fcf975ba6a4b7530ed28 and
includes the unit test changes of
16da2140045808b2aea1d28366ca7d326eb3c809.
2021-12-29 01:10:38 -06:00
Mehdi Amini
02b6fb218e Fix clang-tidy issues in mlir/ (NFC)
Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D115956
2021-12-20 20:25:01 +00:00
Shraiysh Vaishay
3425b1bcb4 [mlir][OpenMP] omp.sections and omp.section lowering to LLVM IR
This patch adds lowering from omp.sections and omp.section (simple lowering along with the nowait clause) to LLVM IR.
Tests for the same are also added.

Reviewed By: ftynse, kiranchandramohan

Differential Revision: https://reviews.llvm.org/D115030
2021-12-15 15:41:12 +05:30
Krzysztof Drewniak
c57b2a0635 [MLIR][GPU] Make max flat work group size for ROCDL kernels configurable
While the default value for the amdgpu-flat-work-group-size attribute,
"1, 256", matches the defaults from Clang, some users of the ROCDL dialect,
namely Tensorflow, use larger workgroups, such as 1024. Therefore,
instead of hardcoding this value, we add a rocdl.max_flat_work_group_size
attribute that can be set on GPU kernels to override the default value.

Reviewed By: whchung

Differential Revision: https://reviews.llvm.org/D115741
2021-12-14 20:12:23 +00:00
Nikita Popov
d733f2c68c [OpenMPIRBuilder] Support opaque pointers in reduction handling
Make the reduction handling in OpenMPIRBuilder compatible with
opaque pointers by explicitly storing the element type in ReductionInfo,
and also passing it to the atomic reduction callback, as at least
the ones in the test need the type there.

This doesn't make things fully compatible yet, there are other
uses of element types in this class. I also left one
getPointerElementType() call in mlir, because I'm not familiar
with that area.

Differential Revison: https://reviews.llvm.org/D115638
2021-12-14 14:07:47 +01:00
Krzysztof Drewniak
e1da62910e [MLIR][GPU] Define gpu.printf op and its lowerings
- Define a gpu.printf op, which can be lowered to any GPU printf() support (which is present in CUDA, HIP, and OpenCL). This op only supports constant format strings and scalar arguments
- Define the lowering of gpu.pirntf to a call to printf() (which is what is required for AMD GPUs when using OpenCL) as well as to the hostcall interface present in the AMD Open Compute device library, which is the interface present when kernels are running under HIP.
- Add a "runtime" enum that allows specifying which of the possible runtimes a ROCDL kernel will be executed under or that the runtime is unknown. This enum controls how gpu.printf is lowered

This change does not enable lowering for Nvidia GPUs, but such a lowering should be possible in principle.

And:
[MLIR][AMDGPU] Always set amdgpu-implicitarg-num-bytes=56 on kernels

This is something that Clang always sets on both OpenCL and HIP kernels, and failing to include it causes mysterious crashes with printf() support.

In addition, revert the max-flat-work-group-size to (1, 256) to avoid triggering bugs in the AMDGPU backend.

Reviewed By: mehdi_amini

Differential Revision: https://reviews.llvm.org/D110448
2021-12-09 15:54:31 +00:00
Mehdi Amini
be0a7e9f27 Adjust "end namespace" comment in MLIR to match new agree'd coding style
See D115115 and this mailing list discussion:
https://lists.llvm.org/pipermail/llvm-dev/2021-December/154199.html

Differential Revision: https://reviews.llvm.org/D115309
2021-12-08 06:05:26 +00:00
Shraiysh Vaishay
31cf42bd9a [mlir][OpenMP] Added omp.atomic.read lowering
This patch adds lowering from omp.atomic.read to LLVM IR along with the
memory ordering clause. Tests for the same are also added.

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D115134
2021-12-07 11:17:30 +05:30
Jacques Pienaar
62fea88bc5 [mlir] Update accessors prefixed form (NFC) 2021-11-30 19:42:37 -08:00
Mats Petersson
30238c3676 [mlir][OpenMP] Add support for SIMD modifier
Add support for SIMD modifier in OpenMP worksharing loops.

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D111051
2021-11-26 14:04:46 +00:00
Thomas Raoux
47555d73f6 [mlir][gpu] Extend shuffle op modes and add nvvm lowering
Add up, down and idx modes to gpu shuffle ops, also change the mode from
string to enum

Differential Revision: https://reviews.llvm.org/D114188
2021-11-19 11:14:31 -08:00
River Riddle
0c7890c844 [mlir] Convert NamedAttribute to be a class
NamedAttribute is currently represented as an std::pair, but this
creates an extremely clunky .first/.second API. This commit
converts it to a class, with better accessors (getName/getValue)
and also opens the door for more convenient API in the future.

Differential Revision: https://reviews.llvm.org/D113956
2021-11-18 05:39:29 +00:00
River Riddle
ae40d62541 [mlir] Refactor ElementsAttr's value access API
There are several aspects of the API that either aren't easy to use, or are
deceptively easy to do the wrong thing. The main change of this commit
is to remove all of the `getValue<T>`/`getFlatValue<T>` from ElementsAttr
and instead provide operator[] methods on the ranges returned by
`getValues<T>`. This provides a much more convenient API for the value
ranges. It also removes the easy-to-be-inefficient nature of
getValue/getFlatValue, which under the hood would construct a new range for
the type `T`. Constructing a range is not necessarily cheap in all cases, and
could lead to very poor performance if used within a loop; i.e. if you were to
naively write something like:

```
DenseElementsAttr attr = ...;
for (int i = 0; i < size; ++i) {
  // We are internally rebuilding the APFloat value range on each iteration!!
  APFloat it = attr.getFlatValue<APFloat>(i);
}
```

Differential Revision: https://reviews.llvm.org/D113229
2021-11-09 00:15:08 +00:00
thomasraoux
77eafb8430 [mlir][nvvm] Generalize wmma ops to handle more types and shapes
wmma intrinsics have a large number of combinations, ideally we want to be able
to target all the different variants. To avoid a combinatorial explosion in the
number of mlir op we use attributes to represent the different variation of
load/store/mma ops. We also can generate with tablegen helpers to know which
combinations are available. Using this we can avoid having too hardcode a path
for specific shapes and can support more types.
This patch also adds boiler plates for tf32 op support.

Differential Revision: https://reviews.llvm.org/D112689
2021-11-01 10:27:26 -07:00