82701 Commits

Author SHA1 Message Date
Jakob Stoklund Olesen
83b0ac498a Remove the old register list functions from MCRegisterInfo.
These functions exposed the layout of the underlying data tables as
null-terminated uint16_t arrays.

Use the new MCSubRegIterator, MCSuperRegIterator, and MCRegAliasIterator
classes instead.

llvm-svn: 157855
2012-06-01 23:28:34 +00:00
Jakob Stoklund Olesen
54038d796c Switch all register list clients to the new MC*Iterator interface.
No functional change intended.

Sorry for the churn. The iterator classes are supposed to help avoid
giant commits like this one in the future. The TableGen-produced
register lists are getting quite large, and it may be necessary to
change the table representation.

This makes it possible to do so without changing all clients (again).

llvm-svn: 157854
2012-06-01 23:28:30 +00:00
Bill Wendling
e85f34969e Register the gcov "writeout" at init time. Don't list this as a d'tor. Instead,
inject some code in that will run via the "__mod_init_func" method that
registers the gcov "writeout" function to execute at exit time.

The problem is that the "__mod_term_func" method of specifying d'tors is
deprecated on Darwin. And it can lead to some ambiguities when dealing with
multiple libraries.
<rdar://problem/11110106>

llvm-svn: 157852
2012-06-01 23:14:32 +00:00
Jakob Stoklund Olesen
ca487d2183 Remove physreg support from adjustCopiesBackFrom and removeCopyByCommutingDef.
After physreg coalescing was disabled, these functions can't do anything
useful with physregs anyway.

llvm-svn: 157849
2012-06-01 22:38:19 +00:00
Jakob Stoklund Olesen
9b09cf0c11 Simplify some more getAliasSet callers.
MCRegAliasIterator can include Reg itself in the list.

llvm-svn: 157848
2012-06-01 22:38:17 +00:00
Rafael Espindola
103c2cfbbd Use dominates(Instruction, Use) in the verifier.
This removes a bit of context from the verifier erros, but reduces code
duplication in a fairly critical part of LLVM and makes dominates easier to test.

llvm-svn: 157845
2012-06-01 21:56:26 +00:00
Chad Rosier
f319324082 [arm-fast-isel] Fix handling of the frameaddress intrinsic. If depth is 0
then DestReg is undefined.

llvm-svn: 157840
2012-06-01 21:12:31 +00:00
Jakob Stoklund Olesen
92a0083944 Switch some getAliasSet clients to MCRegAliasIterator.
MCRegAliasIterator can optionally visit the register itself, allowing
for simpler code.

llvm-svn: 157837
2012-06-01 20:36:54 +00:00
Manman Ren
879ca9d47d X86: peephole optimization to remove cmp instruction
This patch will optimize the following:
  sub r1, r3
  cmp r3, r1 or cmp r1, r3
  bge L1
TO
  sub r1, r3
  bge L1 or ble L1

If the branch instruction can use flag from "sub", then we can eliminate
the "cmp" instruction.

llvm-svn: 157831
2012-06-01 19:49:33 +00:00
Manman Ren
e873552091 ARM: properly handle alignment for struct byval.
Factor out the expansion code into a function.
This change is to be enabled in clang.

rdar://9877866

llvm-svn: 157830
2012-06-01 19:33:18 +00:00
Rafael Espindola
2c3f63cbda Add some tests checking that the verifier rejects cases where a definition
doesn't dominate a use.

llvm-svn: 157829
2012-06-01 19:24:57 +00:00
Benjamin Kramer
aa9b845979 Provide move semantics for (Small)BitVector.
CodeGen makes a lot of BitVector copies.

llvm-svn: 157826
2012-06-01 18:52:53 +00:00
Chris Lattner
b1359894f3 testcase for PR13006, thanks to Duncan for filing it.
llvm-svn: 157824
2012-06-01 18:19:46 +00:00
Nuno Lopes
adf1c859dd BoundsChecking: fix a bug when the handling of recursive PHIs failed and could leave dangling references in the cache
add regression tests for this problem.

Can already compile & run: PHP, PCRE, and ICU  (i.e., all the software I tried)

llvm-svn: 157822
2012-06-01 17:43:31 +00:00
Hans Wennborg
789acfb63d Implement the local-dynamic TLS model for x86 (PR3985)
This implements codegen support for accesses to thread-local variables
using the local-dynamic model, and adds a clean-up pass so that the base
address for the TLS block can be re-used between local-dynamic access on
an execution path.

llvm-svn: 157818
2012-06-01 16:27:21 +00:00
Stepan Dyatkovskiy
66305749f1 PR1255: case ranges.
IntegersSubset devided into IntegersSubsetGeneric and into IntegersSubset itself. The first has no references to ConstantInt and works with IntItem only.
IntegersSubsetMapping also made generic. Here added second template parameter "IntegersSubsetTy" that allows to use on of two IntegersSubset types described below.

llvm-svn: 157815
2012-06-01 16:17:57 +00:00
Benjamin Kramer
e7e6e9e0a4 Remove noisy semicolons.
llvm-svn: 157814
2012-06-01 15:40:53 +00:00
Chris Lattner
cc84e6d2b5 quick fix for PR13006, will check in testcase later.
llvm-svn: 157813
2012-06-01 15:02:52 +00:00
Stepan Dyatkovskiy
bd7303b7f7 PR1255: case ranges.
IntItem cleanup. IntItemBase, IntItemConstantIntImp and IntItem merged into IntItem. All arithmetic operators was propogated from APInt. Also added comparison operators <,>,<=,>=. Currently you will find set of macros that propogates operators from APInt to IntItem in the beginning of IntegerSubset. Note that THESE MACROS WILL REMOVED after all passes will case-ranges compatible. Also note that these macros much smaller pain that something like this:
if (V->getValue().ugt(AnotherV->getValue()) { ... }

These changes made IntItem full featured integer object. It allows to make IntegerSubset class generic (move out all ConstantInt references inside and add unit-tests) in next commits.

llvm-svn: 157810
2012-06-01 10:06:14 +00:00
Craig Topper
1d4d62d76c Enable automatic detection of FMA3 support to allow intrinsics to be used.
llvm-svn: 157805
2012-06-01 06:10:14 +00:00
Craig Topper
00649d5111 Remove fadd(fmul) patterns for FMA3. This needs to be implemented by paying attention to FP_CONTRACT and matching @llvm.fma which is not available yet. This will allow us to enablle intrinsic use at least though.
llvm-svn: 157804
2012-06-01 06:07:48 +00:00
Craig Topper
2e127b5274 Add VFNSUB* instructions to folding table.
llvm-svn: 157802
2012-06-01 05:48:39 +00:00
Craig Topper
9eadcfdf2a Remove a trailing space and fix a comment.
llvm-svn: 157801
2012-06-01 05:34:01 +00:00
Chris Lattner
466076b95f enhance the logic for looking through tailcalls to look through transparent casts
in multiple-return value scenarios, like what happens on X86-64 when returning
small structs.

llvm-svn: 157800
2012-06-01 05:29:15 +00:00
Craig Topper
df09da8355 Tidy up. Remove trailing spaces and fix the worst of the 80 column violations.
llvm-svn: 157799
2012-06-01 05:24:29 +00:00
Chris Lattner
182fe3eef1 enhance getNoopInput to know about vector<->vector bitcasts of legal
types, as well as int<->ptr casts.  This allows us to tailcall functions
with some trivial casts between the call and return (i.e. because the
return types disagree).

llvm-svn: 157798
2012-06-01 05:16:33 +00:00
Chris Lattner
22afea7689 add some simple 64-bit tail call tests.
llvm-svn: 157797
2012-06-01 05:03:31 +00:00
Chris Lattner
4f3615de97 rearrange some logic, no functionality change.
llvm-svn: 157796
2012-06-01 05:01:15 +00:00
Chris Lattner
21b1e6bbdc merge some tests.
llvm-svn: 157795
2012-06-01 05:00:54 +00:00
Chris Lattner
d82ae12d8c rename test
llvm-svn: 157794
2012-06-01 04:58:50 +00:00
Manman Ren
9f9111651e ARM: support struct byval in llvm
We handle struct byval by inserting a pseudo op, which will be expanded to a
loop at ExpandISelPseudos.
A separate patch for clang will be submitted to enable struct byval.

rdar://9877866

llvm-svn: 157793
2012-06-01 02:44:42 +00:00
Michael J. Spencer
5c502811f1 Fix 80 columns.
llvm-svn: 157788
2012-06-01 00:58:41 +00:00
Eric Christopher
1cf3338bb4 Add support for enum forward declarations.
Part of rdar://11570854

llvm-svn: 157786
2012-06-01 00:22:32 +00:00
Chad Rosier
526772de29 Put the shiny new MCSubRegIterator to work.
llvm-svn: 157783
2012-06-01 00:02:08 +00:00
Nuno Lopes
288e86ff6b add -bounds-checking-multiple-traps option to make one trap BB per check
disabled by default for now; we can discusse the default value (& name) later

llvm-svn: 157777
2012-05-31 22:58:48 +00:00
Nuno Lopes
7d00061d87 revamp BoundsChecking considerably:
- compute size & offset at the same time. The side-effects of this are that we now support negative GEPs. It's now approaching a phase that it can be reused by other passes (e.g., lowering of the objectsize intrinsic)
 - use APInt throughout to handle wrap-arounds
 - add support for PHI instrumentation
 - add a cache (required for recursive PHIs anyway)
 - remove hoisting support for now, since it was wrong in a few cases

sorry for the churn here.. tests will follow soon.

llvm-svn: 157775
2012-05-31 22:45:40 +00:00
Benjamin Kramer
5168a72b26 IntrusiveRefCntPtr: Simplify operator= as suggested by Richard Smith.
This way the constructors do all the hard work. No intended functionality change.

llvm-svn: 157773
2012-05-31 22:25:25 +00:00
Owen Anderson
ff458f89aa Make this testcase independent of register allocation.
llvm-svn: 157761
2012-05-31 18:07:02 +00:00
Jakob Stoklund Olesen
4f203ea34b Add support for return value promotion in X86 calling conventions.
Patch by Yiannis Tsiouris!

llvm-svn: 157757
2012-05-31 17:28:20 +00:00
Jakob Stoklund Olesen
afcfef147b Didn't mean to export this function.
llvm-svn: 157756
2012-05-31 17:21:27 +00:00
Manman Ren
9bccb64e56 X86: replace SUB with CMP if possible
This patch will optimize the following
        movq    %rdi, %rax
        subq    %rsi, %rax
        cmovsq  %rsi, %rdi
        movq    %rdi, %rax
to
        cmpq    %rsi, %rdi
        cmovsq  %rsi, %rdi
        movq    %rdi, %rax

Perform this optimization if the actual result of SUB is not used.

rdar: 11540023
llvm-svn: 157755
2012-05-31 17:20:29 +00:00
Jakob Stoklund Olesen
fa9d7db17b Add a PrintRegUnit helper similar to PrintReg.
Reg-units are named after their root registers, and most units have a
single root, so they simply print as 'AL', 'XMM0', etc. The rare dual
root reg-units print as FPSCR~FPSCR_NZCV, FP0~ST7, ...

The printing piggybacks on the existing register name tables, so no
extra const data space is required.

llvm-svn: 157754
2012-05-31 17:18:29 +00:00
Jakob Stoklund Olesen
2be0a77ade Emit register unit root tables.
Each register unit has one or two root registers. The full set of
registers containing a given register unit can be computed as the union
of the root registers and their super-registers.

Provide an MCRegUnitRootIterator class to enumerate the roots.

llvm-svn: 157753
2012-05-31 17:18:26 +00:00
Joel Jones
585bc82489 Fix typos
llvm-svn: 157752
2012-05-31 17:11:25 +00:00
Rafael Espindola
e3c5f3e5b1 Fix typos noticed by Benjamin Kramer.
Also make the checks stronger and test that we reject ranges that overlap
a previous wrapped range.

llvm-svn: 157749
2012-05-31 16:04:26 +00:00
Benjamin Kramer
a0396e4583 X86: Rename the CLMUL target feature to PCLMUL.
It was renamed in gcc/gas a while ago and causes all kinds of
confusion because it was named differently in llvm and clang.

llvm-svn: 157745
2012-05-31 14:34:17 +00:00
Rafael Espindola
97d7787788 Require intervals in the range metadata to be in a canonical form: They must
be non contiguous, non overlapping and sorted by the lower end.

While this is technically a backward incompatibility, every frontent currently
produces range metadata with a single interval and we don't have any pass
that merges intervals yet, so no existing bitcode files should be rejected by
this.

llvm-svn: 157741
2012-05-31 13:45:46 +00:00
Elena Demikhovsky
602f3a26d6 Added FMA3 Intel instructions.
I disabled FMA3 autodetection, since the result may differ from expected for some benchmarks.
I added tests for GodeGen and intrinsics.
I did not change llvm.fma.f32/64 - it may be done later.

llvm-svn: 157737
2012-05-31 09:20:20 +00:00
Duncan Sands
339bb61e32 Enhance the sinking code to handle diamond patterns. Patch by
Carlo Alberto Ferraris.

llvm-svn: 157736
2012-05-31 08:09:49 +00:00
Craig Topper
c1ac05dad5 Add intrinsic for pclmulqdq instruction.
llvm-svn: 157731
2012-05-31 04:37:40 +00:00