4873 Commits

Author SHA1 Message Date
Simon Dardis
d95df13399 Finish revert of "r304929, [mips] Add runtime options to enable/disable madd/sub.fmt"
The r304935 missed deleting the test case.

llvm-svn: 304936
2017-06-07 20:02:24 +00:00
Petar Jovanovic
53900b0221 Revert r304929 [mips] Add runtime options to enable/disable madd/sub.fmt
Revert r304929 since the test broke buildbots.

Original commit:

  [mips] Add runtime options to enable/disable madd.fmt and msub.fmt

  Add options to clang: -mmadd4 and -mno-madd4, use it to enable or disable
  generation of madd.fmt and similar instructions respectively, as per GCC.

  Patch by Stefan Maksimovic.

llvm-svn: 304935
2017-06-07 18:57:56 +00:00
Petar Jovanovic
c6d9b04cc3 [mips] Add runtime options to enable/disable madd.fmt and msub.fmt
Add options to clang: -mmadd4 and -mno-madd4, use it to enable or disable
generation of madd.fmt and similar instructions respectively, as per GCC.

Patch by Stefan Maksimovic.

Differential Revision: https://reviews.llvm.org/D33401

llvm-svn: 304929
2017-06-07 17:17:57 +00:00
Florian Hahn
cc524bf6ac [CodeGen] Add thumb-mode to target-features for arm/thumb triples.
Summary:
The thumb-mode target feature is used to force Thumb or ARM code
generation on a per-function basis. Explicitly adding +thumb-mode to
functions for thumbxx triples enables mixed ARM/Thumb code generation in
places where compilation units with thumbxx and armxx triples are merged
together (e.g. the IR linker or LTO).

For armxx triples, -thumb-mode is added in a similar fashion.

Reviewers: echristo, t.p.northover, kristof.beyls, rengolin

Reviewed By: echristo

Subscribers: rinon, aemerson, mehdi_amini, javed.absar, cfe-commits

Differential Revision: https://reviews.llvm.org/D33448

llvm-svn: 304897
2017-06-07 11:50:45 +00:00
Javed Absar
15b80a5b23 [ARM] Fix Neon vector type alignment to 64-bit
This is restricted version of patch - https://reviews.llvm.org/D33205
that I reverted as it was leading to ABI breaks on darwin etc.
This patch restricts the fix to AAPCS (Android remains 128-bit).
Reviewed by: Renato Golin, Stephen Hines
Differential Revision: https://reviews.llvm.org/D33786

llvm-svn: 304889
2017-06-07 10:02:02 +00:00
Florian Hahn
28f03bbcbb [ARM] Add support for target("arm") and target("thumb").
Summary:
This patch adds support for the target("arm") and target("thumb")
attributes, which can be used to force the compiler to generated ARM or
Thumb code for a function.

In LLVM, ARM or Thumb code generation can be controlled by the
thumb-mode target feature. But GCC already uses target("arm") and
target("thumb"), so we have to substitute "arm" with -thumb-mode and
"thumb" with +thumb-mode.


Reviewers: echristo, pcc, kristof.beyls

Reviewed By: echristo

Subscribers: ahatanak, aemerson, javed.absar, kristof.beyls, cfe-commits

Differential Revision: https://reviews.llvm.org/D33721

llvm-svn: 304781
2017-06-06 09:26:15 +00:00
Vedant Kumar
a44a6ac81f Revert "[AArch64] Add ARMv8.2-A FP16 vefctor intrinsics"
This reverts commit r304493. It breaks all the Darwin bots:
http://green.lab.llvm.org/green/job/clang-stage1-cmake-RA-incremental_check/37168

Failure:
Failing Tests (2):
    Clang :: CodeGen/aarch64-v8.2a-neon-intrinsics.c
    Clang :: CodeGen/arm_neon_intrinsics.c

llvm-svn: 304509
2017-06-02 01:22:14 +00:00
Tim Shen
a70ed1d693 [ThinLTO] Add x86 requires to thin_link_bitcode. NFC.
It already specifies the triples, so the intention was to test x86 for
now (or then).

Differential Revision: https://reviews.llvm.org/D33692

llvm-svn: 304501
2017-06-02 00:08:58 +00:00
Tim Shen
50fedec147 [ThinLTO] Wire up ThinLTO and new PM
Summary: This patch teaches clang to use and propagate new PM in ThinLTO.

Reviewers: davide, chandlerc, tejohnson

Subscribers: mehdi_amini, Prazek, inglorion, cfe-commits

Differential Revision: https://reviews.llvm.org/D33692

llvm-svn: 304496
2017-06-01 23:27:51 +00:00
Abderrazek Zaafrani
a44e5f601d [AArch64] Add ARMv8.2-A FP16 vefctor intrinsics
llvm-svn: 304493
2017-06-01 23:22:29 +00:00
Vedant Kumar
7f2e3d1eba Relax test to try and appease builders. NFC.
I'm not sure why, but on some bots, the order of two instructions are
swapped (as compared to the output on my machine). Loosen up the
CHECK-NEXT directives to deal with this.

Failing bot: http://lab.llvm.org:8011/builders/clang-with-lto-ubuntu/builds/3097

llvm-svn: 304486
2017-06-01 22:27:39 +00:00
Simon Pilgrim
a5dbbc6ead Don't assume that a store source is a vector type just because the destination is (PR26099)
llvm-svn: 304465
2017-06-01 20:13:34 +00:00
Vedant Kumar
a125eb55cb [ubsan] Add a check for pointer overflow UB
Check pointer arithmetic for overflow.

For some more background on this check, see:

  https://wdtz.org/catching-pointer-overflow-bugs.html
  https://reviews.llvm.org/D20322

Patch by Will Dietz and John Regehr!

This version of the patch is different from the original in a few ways:

  - It introduces the EmitCheckedInBoundsGEP utility which inserts
    checks when the pointer overflow check is enabled.

  - It does some constant-folding to reduce instrumentation overhead.

  - It does not check some GEPs in CGExprCXX. I'm not sure that
    inserting checks here, or in CGClass, would catch many bugs.

Possible future directions for this check:

  - Introduce CGF.EmitCheckedStructGEP, to detect overflows when
    accessing structures.

Testing: Apart from the added lit test, I ran check-llvm and check-clang
with a stage2, ubsan-instrumented clang. Will and John have also done
extensive testing on numerous open source projects.

Differential Revision: https://reviews.llvm.org/D33305

llvm-svn: 304459
2017-06-01 19:22:18 +00:00
Alexander Kornienko
50e3e123e8 Enable the ARM Neon intrinsics test by default.
The test being marked 'REQUIRES: long-tests' doesn't make sense. It's not the
first time the test is broken without being noticed by the committer. If the
test is too long, it should be shortened, split in multiple ones or removed
altogether. Keeping it as is is actively harmful.
(BTW, on my machine `ninja check-clang` takes 90-92 seconds with and without
this test. The difference in times is below the spread caused by random
factors.)

llvm-svn: 304302
2017-05-31 14:35:50 +00:00
Alexander Kornienko
915e3ab8f6 Revert "[ARM] Update long-test after r304201."
This reverts commit 304208, since r304201 has been reverted as well.

The test needs to be turned on by default to detect breakages earlier. Will
commit this change separately.

llvm-svn: 304301
2017-05-31 14:33:29 +00:00
Javed Absar
089f678784 Reverting Neon vector type 64-alignment fix
The patch caused ABI breaks on darwin/others.
Reverting to come back with a more restrictive patch.

llvm-svn: 304220
2017-05-30 17:09:47 +00:00
Diana Picus
6d5ac7af4a Fixup r304205 - Require PowerPC target
llvm-svn: 304211
2017-05-30 14:05:33 +00:00
Javed Absar
0841d620c5 Fix issue with test that caused bildbot failure
These tests did not specify the target. 
The failure was triggered by change - 
https://reviews.llvm.org/D33205
http://lab.llvm.org:8011/builders/clang-cmake-armv7-a15-full/builds/7314

which sets vector alignment to 8-byte for arm-targets (except for Android).
So, fixing the test to make it target specific. 

llvm-svn: 304210
2017-05-30 13:34:26 +00:00
Benjamin Kramer
88d73626cd [ARM] Update long-test after r304201.
llvm-svn: 304208
2017-05-30 12:44:48 +00:00
Benjamin Kramer
c796245431 [PPC] Make altivec conversion function macros.
The second argument must be a constant, otherwise instruction selection
will fail. always_inline is not enough for isel to always fold
everything away at -O0.

Sadly the overloading turned this into a big macro mess. Fixes PR33212.

llvm-svn: 304205
2017-05-30 11:37:29 +00:00
Javed Absar
3d92d7ab36 [ARM] Fix Neon vector type alignment to 64-bit
The maximum alignment for ARM NEON data types should be 64-bits as specified
in ARM procedure call standard document Sec. A.2 Notes.
This patch fixes it from its current larger natural default values, except
for Android (so as not to break existing ABI).
Reviewed by: Stephen Hines, Renato Golin.
Differential Revision: https://reviews.llvm.org/D33205

llvm-svn: 304201
2017-05-30 10:12:15 +00:00
Benjamin Kramer
e524ddeef3 Unbreak long test after r304127.
llvm-svn: 304167
2017-05-29 18:11:11 +00:00
Mehdi Amini
6aa9e9b41a IRGen: Add optnone attribute on function during O0
Amongst other, this will help LTO to correctly handle/honor files
compiled with O0, helping debugging failures.
It also seems in line with how we handle other options, like how
-fnoinline adds the appropriate attribute as well.

Differential Revision: https://reviews.llvm.org/D28404

llvm-svn: 304127
2017-05-29 05:38:20 +00:00
Arnold Schwaighofer
634e320376 CodeGen: Define Swift's legal vector types for AArch64, ARM
rdar://32401301

llvm-svn: 304017
2017-05-26 18:11:54 +00:00
Oren Ben Simhon
140c1fb9ec [X86] Adding avx512_vpopcntdq feature set and its intrinsics
AVX512_VPOPCNTDQ is a new feature set that was published by Intel.
The patch represents the Clang side of the addition of six intrinsics for two new machine instructions (vpopcntd and vpopcntq).
It also includes the addition of the new feature set.

Differential Revision: https://reviews.llvm.org/D33170

llvm-svn: 303857
2017-05-25 13:44:11 +00:00
Krzysztof Parzyszek
5960a57ef7 [CodeGen] Pessimize aliasing for member unions (and may-alias) objects
Use the TBAA info of the omnipotent char for these objects.

Differential Revision: https://reviews.llvm.org/D33328

llvm-svn: 303851
2017-05-25 12:55:47 +00:00
Tony Jiang
f70a913e13 Fix one test case faiulre in commit 303766.
It is clean when I build boostrap and run make checkall on my machine, I guess
it could be I only build bootstrap with assert, while the buildbots may build
without asserts, which could cause the difference.

llvm-svn: 303786
2017-05-24 18:12:11 +00:00
Tony Jiang
9aa2c0383d [PowerPC] Implement vec_xxsldwi builtin.
The vec_xxsldwi builtin is missing from altivec.h. This has been requested by
developers working on libvpx for VP9 support for Google.

The patch fixes PR: https://bugs.llvm.org/show_bug.cgi?id=32653
Differential Revision: https://reviews.llvm.org/D33236

llvm-svn: 303766
2017-05-24 15:54:13 +00:00
Tony Jiang
bbc48e9164 [PowerPC] Implement vec_xxpermdi builtin.
The vec_xxpermdi builtin is missing from altivec.h. This has been requested by
developers working on libvpx for VP9 support for Google.

The patch fixes PR: https://bugs.llvm.org/show_bug.cgi?id=32653
Differential Revision: https://reviews.llvm.org/D33053

llvm-svn: 303760
2017-05-24 15:13:32 +00:00
Dean Michael Berris
170429e290 [XRay][clang] Allow imbuing arg1 logging attribute via -fxray-always-instrument=
Summary:
This change allows us to add arg1 logging support to functions through
the special case list provided through -fxray-always-instrument=. This
is useful for adding arg1 logging to functions that are either in
headers that users don't have control over (i.e. cannot change the
source) or would rather not do.

It only takes effect when the pattern is matched through the "fun:"
special case, as a category. As in:

  fun:*pattern=arg1

Reviewers: pelikan, rnk

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D33392

llvm-svn: 303719
2017-05-24 05:46:36 +00:00
Simon Dardis
657188ab00 [mips] Make checks in CodeGen/mips-varargs.c less fragile
This test was failing on our fork of clang because it was not capturing
[[ARG]] in the N32 case. Therefore it used the value from the last function
which does not always have to be the same. All other cases were already
capturing ARG so this appears to be an oversight.
The test now uses -enable-var-scope to prevent such errors in the future.

Reviewers: sdardis, atanasyan

Patch by: Alexander Richardson

Differential Revision: https://reviews.llvm.org/D32425

llvm-svn: 303619
2017-05-23 09:42:50 +00:00
Teresa Johnson
acf4b09fee Adjust clang test for r303590
Forgot to commit this separately from the llvm change to use a new
module flag type for pic and pie levels. Should fix the bot errors

llvm-svn: 303593
2017-05-23 00:35:09 +00:00
Simon Atanasyan
2c87f5341d [mips] Support micromips attribute
This patch adds support for the `micromips` and `nomicromips` attributes
for MIPS targets.

Differential revision: https://reviews.llvm.org/D33363

llvm-svn: 303546
2017-05-22 12:47:43 +00:00
Matthias Braun
a451953224 CodeGenModule: Always output wchar_size, check LLVM assumptions.
Re-commit r303463 now that LLVM is fixed and adjust some lit tests.

llvm::TargetLibraryInfo needs to know the size of wchar_t to work on
functions like `wcslen`. This patch changes clang to always emit the
wchar_size module flag (it would only do so for ARM previously).
This also adds an `assert()` to ensure the LLVM defaults based on the
target triple are in sync with clang.

Differential Revision: https://reviews.llvm.org/D32982

llvm-svn: 303478
2017-05-20 01:29:55 +00:00
Matthias Braun
421b63dd70 Revert "CodeGenModule: Always output wchar_size, check LLVM assumptions."
Let's revert this for now (and with it the assert()) to get the bots
back to green until I have LLVM synced up properly.

This reverts commit r303463.

llvm-svn: 303474
2017-05-20 00:38:27 +00:00
Matthias Braun
bf4a869dfb CodeGenModule: Always output wchar_size, check LLVM assumptions.
llvm::TargetLibraryInfo needs to know the size of wchar_t to work on
functions like `wcslen`. This patch changes clang to always emit the
wchar_size module flag (it would only do so for ARM previously).
This also adds an `assert()` to ensure the LLVM defaults based on the
target triple are in sync with clang.

Differential Revision: https://reviews.llvm.org/D32982

llvm-svn: 303463
2017-05-19 22:37:15 +00:00
Yaxun Liu
6d96f16347 CodeGen: Cast alloca to expected address space
Alloca always returns a pointer in alloca address space, which may
be different from the type defined by the language. For example,
in C++ the auto variables are in the default address space. Therefore
cast alloca to the expected address space when necessary.

Differential Revision: https://reviews.llvm.org/D32248

llvm-svn: 303370
2017-05-18 18:51:09 +00:00
Evgeniy Stepanov
5c3e07f78d [asan] One more test for -fsanitize-address-globals-dead-stripping.
llvm-svn: 303114
2017-05-15 20:43:48 +00:00
Teresa Johnson
517729fb20 Remove ignore-empty-index-file option
Summary:
Clang changes to remove this option and replace with a parameter
always set in the context of a ThinLTO distributed backend.

Depends on D33133.

Reviewers: pcc

Subscribers: mehdi_amini, eraman, cfe-commits

Differential Revision: https://reviews.llvm.org/D33134

llvm-svn: 302940
2017-05-12 19:32:17 +00:00
James Y Knight
eb96e44aea [SPARC] Support 'f' and 'e' inline asm constraints.
Patch by Patrick Boettcher.

Differential Revision: https://reviews.llvm.org/D29117

llvm-svn: 302913
2017-05-12 16:01:23 +00:00
Reid Kleckner
43bbeb4c9f Issue diagnostics when returning FP values on x86_64 without SSE1/2
Avoid using report_fatal_error, because it will ask the user to file a
bug. If the user attempts to disable SSE on x86_64 and them use floating
point, that's a bug in their code, not a bug in the compiler.

This is just a start. There are other ways to crash the backend in this
configuration, but they should be updated to follow this pattern.

Differential Revision: https://reviews.llvm.org/D27522

llvm-svn: 302835
2017-05-11 22:43:02 +00:00
Petar Jovanovic
6f4cdb8912 Reland: [mips] Impose a threshold for coercion of aggregates
Modified MipsABIInfo::classifyArgumentType so that it now coerces
    aggregate structures only if the size of said aggregate is less than
    16/64 bytes, depending on the ABI.

    Patch by Stefan Maksimovic.

    Differential Revision: https://reviews.llvm.org/D32900

with minor changes (use regexp instead of the hardcoded values) to the test.

llvm-svn: 302670
2017-05-10 14:28:18 +00:00
Vedant Kumar
4b62b5cddd [ubsan] Mark overflow checks with !nosanitize
Sanitizer instrumentation generally needs to be marked with !nosanitize,
but we're not doing this properly for ubsan's overflow checks.

r213291 has more information about why this is needed.

llvm-svn: 302598
2017-05-09 23:34:49 +00:00
Evgeniy Stepanov
d991cdd50b [asan] A clang flag to enable ELF globals-gc.
This feature is subtly broken when the linker is gold 2.26 or
earlier. See the following bug for details:
  https://sourceware.org/bugzilla/show_bug.cgi?id=19002

Since the decision needs to be made at compilation time, we can not
test the linker version. The flag is off by default on ELF targets,
and on otherwise.

llvm-svn: 302591
2017-05-09 21:57:43 +00:00
Petar Jovanovic
753267b750 Revert r302547 ([mips] Impose a threshold for coercion of aggregates)
Reverting
  Modified MipsABIInfo::classifyArgumentType so that it now coerces
  aggregate structures only if the size of said aggregate is less than 16/64
  bytes, depending on the ABI.
as it broke clang-with-lto-ubuntu builder.

llvm-svn: 302555
2017-05-09 17:20:06 +00:00
Petar Jovanovic
125c03070e [mips] Impose a threshold for coercion of aggregates
Modified MipsABIInfo::classifyArgumentType so that it now coerces aggregate
structures only if the size of said aggregate is less than 16/64 bytes,
depending on the ABI.

Patch by Stefan Maksimovic.

Differential Revision: https://reviews.llvm.org/D32900

llvm-svn: 302547
2017-05-09 16:24:03 +00:00
Dean Michael Berris
42af651358 [XRay] Add __xray_customeevent(...) as a clang-supported builtin
Summary:
We define the `__xray_customeevent` builtin that gets translated to
IR calls to the correct intrinsic. The default implementation of this is
a no-op function. The codegen side of this follows the following logic:

- When `-fxray-instrument` is not provided in the driver, we elide all
calls to `__xray_customevent`.
- When `-fxray-instrument` is enabled and a function is marked as "never
instrumented", we elide all calls to `__xray_customevent` in that
function; if either marked as "always instrumented" or subject to
threshold-based instrumentation, we emit a call to the
`llvm.xray.customevent` intrinsic from LLVM for each
`__xray_customevent` occurrence in the function.

This change depends on D27503 (to land in LLVM first).

Reviewers: echristo, rsmith

Subscribers: mehdi_amini, pelikan, lrl, cfe-commits

Differential Revision: https://reviews.llvm.org/D30018

llvm-svn: 302492
2017-05-09 00:45:40 +00:00
Simon Pilgrim
3511348dbb [X86][LWP] Add clang support for LWP instructions.
This patch adds support for the the LightWeight Profiling (LWP) instructions which are available on all AMD Bulldozer class CPUs (bdver1 to bdver4).

Differential Revision: https://reviews.llvm.org/D32770

llvm-svn: 302418
2017-05-08 12:09:45 +00:00
Tim Northover
23bcad226c AArch64: fix weird edge case in ABI.
It turns out there are some sort-of-but-not-quite empty structs that break all
the rules. For example:

struct SuperEmpty { int arr[0]; };
struct SortOfEmpty { struct SuperEmpty e; };

Both of these have sizeof == 0, even in C++ mode, for GCC compatibility. The
first one also doesn't occupy a register when passed by value in GNU C++ mode,
unlike everything else.

On Darwin, we want to ignore the lot (and especially don't want to try to use
an i0 as we were).

llvm-svn: 302313
2017-05-05 22:36:06 +00:00
Reid Kleckner
6d2ea6ec80 [ms-inline-asm] Use the frontend size only for ambiguous instructions
This avoids problems on code like this:
  char buf[16];
  __asm {
    movups xmm0, [buf]
    mov [buf], eax
  }

The frontend size in this case (1) is wrong, and the register makes the
instruction matching unambiguous. There are also enough bytes available
that we shouldn't complain to the user that they are potentially using
an incorrectly sized instruction to access the variable.

Supersedes D32636 and D26586 and fixes PR28266

llvm-svn: 302179
2017-05-04 18:19:52 +00:00