24929 Commits

Author SHA1 Message Date
Quentin Colombet
06ef4e209d [RegBankSelect] Use const_iterator instead of iterator for repairReg.
The repairing code has no reason to change the source or destination of
the registers.

llvm-svn: 272163
2016-06-08 16:24:55 +00:00
Quentin Colombet
7a03de5210 [RegisterBankInfo] Introduce OperandsMapper class.
This helper class is used to encapsulate the necessary information
to remap an instruction.

llvm-svn: 272161
2016-06-08 16:18:13 +00:00
Quentin Colombet
a41272fb48 [RegBankSelect] Introduce a command line option to override the running mode.
When the command line option is set, it overrides any thing that the
target may have set. The rationale is that we get what we asked for.

Options are respectively regbankselect-fast and regbankselect-greedy for
fast and greedy mode.

llvm-svn: 272158
2016-06-08 15:49:23 +00:00
Quentin Colombet
6feaf82088 [RegBankSelect] Explain what it would take to support non-copy
repairing.

Copies are easy because we repair only when there is a mismatch. For
non-copy repairing, i.e., cases that involves breaking down or gathering
up the value, one of the operand may not have a register bank yet. Thus,
derivate a cost from that, requires more work.

llvm-svn: 272157
2016-06-08 15:40:32 +00:00
Benjamin Kramer
46e38f3678 Avoid copies of std::strings and APInt/APFloats where we only read from it
As suggested by clang-tidy's performance-unnecessary-copy-initialization.
This can easily hit lifetime issues, so I audited every change and ran the
tests under asan, which came back clean.

llvm-svn: 272126
2016-06-08 10:01:20 +00:00
Matt Arsenault
b1630a1487 Make LiveDebugValues preserve CFG
llvm-svn: 272117
2016-06-08 05:18:01 +00:00
Quentin Colombet
cfbdee2312 [RegisterBankInfo] Add a size argument for the cost of copy.
The cost of a copy may be different based on how many bits we have to
copy around. E.g., a 8-bit copy may be different than a 32-bit copy.

llvm-svn: 272084
2016-06-08 01:11:03 +00:00
Quentin Colombet
123a7a55e7 [RegisterBankInfo] Move a hidden function into a static method. NFC.
This will allow code reuse in the coming commits.

llvm-svn: 272083
2016-06-08 01:04:32 +00:00
Matthias Braun
3ef7df9cdf MIR: Fix parsing of stack object references in MachineMemOperands
The MachineMemOperand parser lacked the code to handle %stack.X
references (%fixed-stack.X was working).

llvm-svn: 272082
2016-06-08 00:47:07 +00:00
Etienne Bergeron
22bfa83208 [stack-protection] Add support for MSVC buffer security check
Summary:
This patch is adding support for the MSVC buffer security check implementation

The buffer security check is turned on with the '/GS' compiler switch.
  * https://msdn.microsoft.com/en-us/library/8dbf701c.aspx
  * To be added to clang here: http://reviews.llvm.org/D20347

Some overview of buffer security check feature and implementation:
  * https://msdn.microsoft.com/en-us/library/aa290051(VS.71).aspx
  * http://www.ksyash.com/2011/01/buffer-overflow-protection-3/
  * http://blog.osom.info/2012/02/understanding-vs-c-compilers-buffer.html


For the following example:
```
int example(int offset, int index) {
  char buffer[10];
  memset(buffer, 0xCC, index);
  return buffer[index];
}
```

The MSVC compiler is adding these instructions to perform stack integrity check:
```
        push        ebp  
        mov         ebp,esp  
        sub         esp,50h  
  [1]   mov         eax,dword ptr [__security_cookie (01068024h)]  
  [2]   xor         eax,ebp  
  [3]   mov         dword ptr [ebp-4],eax  
        push        ebx  
        push        esi  
        push        edi  
        mov         eax,dword ptr [index]  
        push        eax  
        push        0CCh  
        lea         ecx,[buffer]  
        push        ecx  
        call        _memset (010610B9h)  
        add         esp,0Ch  
        mov         eax,dword ptr [index]  
        movsx       eax,byte ptr buffer[eax]  
        pop         edi  
        pop         esi  
        pop         ebx  
  [4]   mov         ecx,dword ptr [ebp-4]  
  [5]   xor         ecx,ebp  
  [6]   call        @__security_check_cookie@4 (01061276h)  
        mov         esp,ebp  
        pop         ebp  
        ret  
```

The instrumentation above is:
  * [1] is loading the global security canary,
  * [3] is storing the local computed ([2]) canary to the guard slot,
  * [4] is loading the guard slot and ([5]) re-compute the global canary,
  * [6] is validating the resulting canary with the '__security_check_cookie' and performs error handling.

Overview of the current stack-protection implementation:
  * lib/CodeGen/StackProtector.cpp
    * There is a default stack-protection implementation applied on intermediate representation.
    * The target can overload 'getIRStackGuard' method if it has a standard location for the stack protector cookie.
    * An intrinsic 'Intrinsic::stackprotector' is added to the prologue. It will be expanded by the instruction selection pass (DAG or Fast).
    * Basic Blocks are added to every instrumented function to receive the code for handling stack guard validation and errors handling.
    * Guard manipulation and comparison are added directly to the intermediate representation.

  * lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
  * lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
    * There is an implementation that adds instrumentation during instruction selection (for better handling of sibbling calls).
      * see long comment above 'class StackProtectorDescriptor' declaration.
    * The target needs to override 'getSDagStackGuard' to activate SDAG stack protection generation. (note: getIRStackGuard MUST be nullptr).
      * 'getSDagStackGuard' returns the appropriate stack guard (security cookie)
    * The code is generated by 'SelectionDAGBuilder.cpp' and 'SelectionDAGISel.cpp'.

  * include/llvm/Target/TargetLowering.h
    * Contains function to retrieve the default Guard 'Value'; should be overriden by each target to select which implementation is used and provide Guard 'Value'.

  * lib/Target/X86/X86ISelLowering.cpp
    * Contains the x86 specialisation; Guard 'Value' used by the SelectionDAG algorithm.

Function-based Instrumentation:
  * The MSVC doesn't inline the stack guard comparison in every function. Instead, a call to '__security_check_cookie' is added to the epilogue before every return instructions.
  * To support function-based instrumentation, this patch is
    * adding a function to get the function-based check (llvm 'Value', see include/llvm/Target/TargetLowering.h),
      * If provided, the stack protection instrumentation won't be inlined and a call to that function will be added to the prologue.
    * modifying (SelectionDAGISel.cpp) do avoid producing basic blocks used for inline instrumentation,
    * generating the function-based instrumentation during the ISEL pass (SelectionDAGBuilder.cpp),
    * if FastISEL (not SelectionDAG), using the fallback which rely on the same function-based implemented over intermediate representation (StackProtector.cpp).

Modifications
  * adding support for MSVC (lib/Target/X86/X86ISelLowering.cpp)
  * adding support function-based instrumentation (lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp, .h)

Results

  * IR generated instrumentation:
```
clang-cl /GS test.cc /Od /c -mllvm -print-isel-input
```

```
*** Final LLVM Code input to ISel ***

; Function Attrs: nounwind sspstrong
define i32 @"\01?example@@YAHHH@Z"(i32 %offset, i32 %index) #0 {
entry:
  %StackGuardSlot = alloca i8*                                                  <<<-- Allocated guard slot
  %0 = call i8* @llvm.stackguard()                                              <<<-- Loading Stack Guard value
  call void @llvm.stackprotector(i8* %0, i8** %StackGuardSlot)                  <<<-- Prologue intrinsic call (store to Guard slot)
  %index.addr = alloca i32, align 4
  %offset.addr = alloca i32, align 4
  %buffer = alloca [10 x i8], align 1
  store i32 %index, i32* %index.addr, align 4
  store i32 %offset, i32* %offset.addr, align 4
  %arraydecay = getelementptr inbounds [10 x i8], [10 x i8]* %buffer, i32 0, i32 0
  %1 = load i32, i32* %index.addr, align 4
  call void @llvm.memset.p0i8.i32(i8* %arraydecay, i8 -52, i32 %1, i32 1, i1 false)
  %2 = load i32, i32* %index.addr, align 4
  %arrayidx = getelementptr inbounds [10 x i8], [10 x i8]* %buffer, i32 0, i32 %2
  %3 = load i8, i8* %arrayidx, align 1
  %conv = sext i8 %3 to i32
  %4 = load volatile i8*, i8** %StackGuardSlot                                  <<<-- Loading Guard slot
  call void @__security_check_cookie(i8* %4)                                    <<<-- Epilogue function-based check
  ret i32 %conv
}
```

  * SelectionDAG generated instrumentation:

```
clang-cl /GS test.cc /O1 /c /FA
```

```
"?example@@YAHHH@Z":                    # @"\01?example@@YAHHH@Z"
# BB#0:                                 # %entry
        pushl   %esi
        subl    $16, %esp
        movl    ___security_cookie, %eax                                        <<<-- Loading Stack Guard value
        movl    28(%esp), %esi
        movl    %eax, 12(%esp)                                                  <<<-- Store to Guard slot
        leal    2(%esp), %eax
        pushl   %esi
        pushl   $204
        pushl   %eax
        calll   _memset
        addl    $12, %esp
        movsbl  2(%esp,%esi), %esi
        movl    12(%esp), %ecx                                                  <<<-- Loading Guard slot
        calll   @__security_check_cookie@4                                      <<<-- Epilogue function-based check
        movl    %esi, %eax
        addl    $16, %esp
        popl    %esi
        retl
```

Reviewers: kcc, pcc, eugenis, rnk

Subscribers: majnemer, llvm-commits, hans, thakis, rnk

Differential Revision: http://reviews.llvm.org/D20346

llvm-svn: 272053
2016-06-07 20:15:35 +00:00
Haicheng Wu
4fa9f3ae45 Revert "[MBP] Reduce code size by running tail merging in MBP."
This reverts commit r271930, r271915, r271923.  They break a thumb selfhosting
bot.

llvm-svn: 272017
2016-06-07 15:17:21 +00:00
Reid Kleckner
6f3406df67 Re-land "[codeview] Emit information about global variables"
This reverts commit r271962 and reinstantes r271957.

MSVC's linker doesn't appear to like it if you have an empty symbol
substream, so only open a symbol substream if we're going to emit
something about globals into it.

Makes check-asan pass.

llvm-svn: 271965
2016-06-07 00:02:03 +00:00
Reid Kleckner
e8a236fc2e Revert "[codeview] Emit information about global variables"
This reverts commit r271957, it broke check-asan on Windows.

llvm-svn: 271962
2016-06-06 23:41:38 +00:00
Reid Kleckner
87eddf723d [codeview] Emit information about global variables
This currently emits everything as S_GDATA32, which isn't right for
things like thread locals, but it's a start.

llvm-svn: 271957
2016-06-06 23:23:47 +00:00
Haicheng Wu
77ea344786 [MBP] Reduce code size by running tail merging in MBP.
The code layout that TailMerging (inside BranchFolding) works on is not the
final layout optimized based on the branch probability. Generally, after
BlockPlacement, many new merging opportunities emerge.

This patch calls Tail Merging after MBP and calls MBP again if Tail Merging
merges anything.

Differential Revision: http://reviews.llvm.org/D20276

llvm-svn: 271925
2016-06-06 18:36:07 +00:00
Haicheng Wu
664b561f01 [BranchFolding] Replace MachineBlockFrequencyInfo with MBFIWrapper. NFC.
Differential Revision: http://reviews.llvm.org/D20184

llvm-svn: 271923
2016-06-06 18:35:41 +00:00
David Majnemer
8c46a4ceea [AsmPrinter, CodeView] There are some more ways of getting wchar_t
C++ has a builtin type called wchar_t.  Clang also provides a type
called __wchar_t in C mode.

In C mode, wchar_t can be a typedef to unsigned short.

llvm-svn: 271793
2016-06-04 15:40:33 +00:00
Matthias Braun
c25c9ccbcb MIR: Support MachineMemOperands without associated value
This is allowed (though used rarely) and useful to keep your tests
short.

llvm-svn: 271752
2016-06-04 00:06:31 +00:00
Xinliang David Li
ff2873742e Replace hard coded probability threshold with parameter /NFC
llvm-svn: 271751
2016-06-03 23:48:36 +00:00
Justin Bogner
07bf5349ee Re-apply "SDAG: Update ChainNodesMatched as nodes are deleted"
My first attempt at this had an overly aggressive assert - chain nodes
will only be removed, but we could hit the assert if a non-chain node
was CSE'd (NodeToMatch, for instance).

This reapplies r271706 by reverting r271713 and fixing an assert.

Original message:

Avoid relying on UB by looking into deleted nodes for a marker value.
Instead, update the list of chain nodes as we go.

llvm-svn: 271733
2016-06-03 20:47:40 +00:00
Justin Bogner
737c136176 Revert "SDAG: Update ChainNodesMatched as nodes are deleted"
Seeing failures in CodeGen/Generic/icmp-illegal.ll on quite a few
bots.

This reverts r271706.

llvm-svn: 271713
2016-06-03 19:40:06 +00:00
Justin Bogner
6f6d012e32 SDAG: Update ChainNodesMatched as nodes are deleted
Avoid relying on UB by looking into deleted nodes for a marker value.
Instead, update the list of chain nodes as we go.

llvm-svn: 271706
2016-06-03 18:50:11 +00:00
Justin Bogner
1785503dd3 SDAG: Replace some unreachable code with an assert. NFC
The current node shouldn't be (and isn't) removed partway through
selection.

llvm-svn: 271699
2016-06-03 18:09:53 +00:00
Reid Kleckner
a8d5740757 [codeview] Add basic record type translation
This only translates data members for now. Translating overloaded
methods is complicated, so I stopped short of doing that.

Reviewers: aaboud

Differential Revision: http://reviews.llvm.org/D20924

llvm-svn: 271680
2016-06-03 15:58:20 +00:00
Sanjay Patel
dba8b4c04d transform obscured FP sign bit ops into a fabs/fneg using TLI hook
This is effectively a revert of:
http://reviews.llvm.org/rL249702 - [InstCombine] transform masking off of an FP sign bit into a fabs() intrinsic call (PR24886)
and:
http://reviews.llvm.org/rL249701 - [ValueTracking] teach computeKnownBits that a fabs() clears sign bits
and a reimplementation as a DAG combine for targets that have IEEE754-compliant fabs/fneg instructions.

This is intended to resolve the objections raised on the dev list:
http://lists.llvm.org/pipermail/llvm-dev/2016-April/098154.html
and:
https://llvm.org/bugs/show_bug.cgi?id=24886#c4

In the interest of patch minimalism, I've only partly enabled AArch64. PowerPC, MIPS, x86 and others can enable later.

Differential Revision: http://reviews.llvm.org/D19391

llvm-svn: 271573
2016-06-02 20:01:37 +00:00
David Majnemer
b68f32f0cf [CodeView] Use None instead of Void if there is no subprogram
llvm-svn: 271566
2016-06-02 18:51:24 +00:00
Matt Arsenault
50451d49fc Use false for bool instead of 0
llvm-svn: 271562
2016-06-02 18:37:21 +00:00
Reid Kleckner
b9c80fd8b5 [codeview] Fix crash when handling qualified void types
The DIType* for void is the null pointer. A null DIType can never be a
qualified type, so we can just exit the loop at this point and go to
getTypeIndex(BaseTy).

Fixes PR27984

llvm-svn: 271550
2016-06-02 17:40:51 +00:00
David Majnemer
75c3ebfa02 [CodeView] Implement function-type indices
We still need to do something about member functions and calling
conventions.

Differential Revision: http://reviews.llvm.org/D20900

llvm-svn: 271541
2016-06-02 17:13:53 +00:00
Geoff Berry
66f6b65fed [PEI, AArch64] Use empty spaces in stack area for local stack slot allocation.
Summary:
If the target requests it, use emptry spaces in the fixed and
callee-save stack area to allocate local stack objects.

AArch64: Change last callee-save reg stack object alignment instead of
size to leave a gap to take advantage of above change.

Reviewers: t.p.northover, qcolombet, MatzeB

Subscribers: rengolin, mcrosier, llvm-commits, aemerson

Differential Revision: http://reviews.llvm.org/D20220

llvm-svn: 271527
2016-06-02 16:22:07 +00:00
Sanjay Patel
f509d85a6d [DAG] use getBitcast() to reduce code
Although this was intended to be NFC, the test case wiggle shows a change in
code scheduling/RA caused by a difference in the SDLoc() generation.

Depending on how you look at it, this is the (dis)advantage of exact checking
in regression tests.

llvm-svn: 271526
2016-06-02 16:01:15 +00:00
David Majnemer
1c2cb1ddd7 [CodeView] Use the right type index for long long
We used T_INT8 instead of T_QUAD.

llvm-svn: 271497
2016-06-02 07:02:32 +00:00
David Majnemer
afefa67310 [CodeView] Remove superfluous bitmath
llvm-svn: 271495
2016-06-02 06:21:42 +00:00
David Majnemer
d065e23dac [codeview] Return type indices for typedefs
Use the type index of the underlying type unless we have a typedef from
long to HRESULT; HRESULT typedefs are translated to T_HRESULT.

llvm-svn: 271494
2016-06-02 06:21:37 +00:00
Matt Arsenault
8f4d43a41f Make MachineCopyPropagation preserve CFG
This doesn't touch it as far as I can tell.

llvm-svn: 271445
2016-06-02 00:04:26 +00:00
Justin Bogner
f807dce6da SDAG: Drop a redundant replace and move the dead node removal closer. NFC
llvm-svn: 271429
2016-06-01 20:55:26 +00:00
Michael Kuperstein
738ae45ce8 [DAG] Improve legalization of INSERT_SUBVECTOR
When the index is known to be constant 0, insert directly into the the low half,
instead of spilling, performing the insert in-memory, and reloading.

Differential Revision: http://reviews.llvm.org/D20763

llvm-svn: 271428
2016-06-01 20:49:35 +00:00
Than McIntosh
4ef761aa35 Better fix for PR27903.
Summary:
Re-enable lifetime-start-on-first-use for stack coloring,
but explicitly disable it for slots with more than one start
or end lifetime marker.

Bug: 27903

Reviewers: wmi, tejohnson, qcolombet, gbiv

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D20739

llvm-svn: 271412
2016-06-01 17:55:10 +00:00
Reid Kleckner
846edb6fdc Fix the NDEBUG build
llvm-svn: 271411
2016-06-01 17:31:24 +00:00
Reid Kleckner
5acacbb04f [codeview] Translate basic DITypes to CV type records
Summary:
This is meant to be the tiniest step towards DIType to CV type index
translation that I could come up with. Whenever translation fails, we use type
index zero, which is the unknown type.

Reviewers: aaboud, zturner

Subscribers: llvm-commits, amccarth

Differential Revision: http://reviews.llvm.org/D20840

llvm-svn: 271408
2016-06-01 17:05:51 +00:00
Peter Collingbourne
b326986de0 DwarfDebug: Simplify. NFC.
llvm-svn: 271360
2016-06-01 02:58:40 +00:00
Petr Hosek
faef3207de [MC] Rename EmitFill to emitFill
This is to match the overloaded variants as well as the new style.

Differential Revision: http://reviews.llvm.org/D20690

llvm-svn: 271359
2016-06-01 01:59:58 +00:00
Matt Arsenault
5d06439c54 DAGCombiner: Fix broken size check in isAlias
This should have been converting the size to bytes, but wasn't really.
These should probably all be using getStoreSize instead.

I haven't been able to come up with a meaningful testcase for this.
I can trigger it using combinations of struct loads and stores,
but can't observe a difference in non-broken testcases.

isAlias is only really used during store merging, so I'm not sure how
to get into the vector splitting situation the comment describes
since store merging is only done before type legalization.

llvm-svn: 271356
2016-06-01 01:00:36 +00:00
Matthias Braun
f9acacaa92 CodeGen: Refactor renameDisconnectedComponents() as a pass
Refactor LiveIntervals::renameDisconnectedComponents() to be a pass.
Also change the name to "RenameIndependentSubregs":

- renameDisconnectedComponents() worked on a MachineFunction at a time
  so it is a natural candidate for a machine function pass.

- The algorithm is testable with a .mir test now.

- This also fixes a problem where the lazy renaming as part of the
  MachineScheduler introduced IMPLICIT_DEF instructions after the number
  of a nodes in a region were counted leading to a mismatch.

Differential Revision: http://reviews.llvm.org/D20507

llvm-svn: 271345
2016-05-31 22:38:06 +00:00
Ahmed Bougacha
96ef87e910 [CodeGen] Promote FMINNAN/FMAXNAN like other binops.
We think it's OK to generate half fminnan because it's legal for the
transform-to type (f32; r245196). However, PromoteFloatRes was missing
the case; simply promote like the other binops, including minnum.

llvm-svn: 271317
2016-05-31 18:50:25 +00:00
Ahmed Bougacha
e4b3812ec2 [CodeGen] Don't mark FMINNUM/FMAXNUM Expand twice. NFC.
They're already in the all_valuetypes() loop above.

llvm-svn: 271316
2016-05-31 18:50:21 +00:00
Reid Kleckner
fbdbe9e22b [codeview] Improve readability of type record assembly
Adds the method MCStreamer::EmitBinaryData, which is usually an alias
for EmitBytes. In the MCAsmStreamer case, it is overridden to emit hex
dump output like this:
        .byte   0x0e, 0x00, 0x08, 0x10
        .byte   0x03, 0x00, 0x00, 0x00
        .byte   0x00, 0x00, 0x00, 0x00
        .byte   0x00, 0x10, 0x00, 0x00

Also, when verbose asm comments are enabled, this patch prints the dump
output for each comment before its record, like this:
        # ArgList (0x1000) {
        #   TypeLeafKind: LF_ARGLIST (0x1201)
        #   NumArgs: 0
        #   Arguments [
        #   ]
        # }
        .byte   0x06, 0x00, 0x01, 0x12
        .byte   0x00, 0x00, 0x00, 0x00

This should make debugging easier and testing more convenient.

Reviewers: aaboud

Subscribers: majnemer, zturner, amccarth, aaboud, llvm-commits

Differential Revision: http://reviews.llvm.org/D20711

llvm-svn: 271313
2016-05-31 18:45:36 +00:00
Saleem Abdulrasool
d2f705ddf9 X86: permit using SjLj EH on x86 targets as an option
This adds support to the backed to actually support SjLj EH as an exception
model.  This is *NOT* the default model, and requires explicitly opting into it
from the frontend.  GCC supports this model and for MinGW can still be enabled
via the `--using-sjlj-exceptions` options.

Addresses PR27749!

llvm-svn: 271244
2016-05-31 01:48:07 +00:00
Rafael Espindola
fd82f0501f Add RelaxELFRelocations to TargetOptions.h.
It will be used in clang.

llvm-svn: 271161
2016-05-29 01:57:20 +00:00
Andrew Kaylor
04f8e06696 Update the stack coloring pass to remove lifetime intrinsics in the optnone/opt-bisect skip case.
Differential Revision: http://reviews.llvm.org/D20453

llvm-svn: 271068
2016-05-27 22:56:49 +00:00