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6 Commits

Author SHA1 Message Date
Ulrich Weigand
33435c4c9c [SystemZ] Add support for IBM z14 processor (2/3) 
This adds support for the new 32-bit vector float instructions of z14.
This includes:
- Enabling the instructions for the assembler/disassembler.
- CodeGen for the instructions, including new LLVM intrinsics.
- Scheduler description support for the instructions.
- Update to the vector cost function calculations.

In general, CodeGen support for the new v4f32 instructions closely
matches support for the existing v2f64 instructions.

llvm-svn: 308195
 2017-07-17 17:42:48 +00:00
Jonas Paulsson
8722ade770 [SystemZ] Modelling of costs of divisions with a constant power of 2. 
Such divisions will eventually be implemented with shifts which should
be reflected in the cost function.

Review: Ulrich Weigand
llvm-svn: 303254
 2017-05-17 12:46:26 +00:00
Renato Golin
ab85113a93 [SystemZ] Fix target specific tests 
llvm-svn: 300078
 2017-04-12 17:14:46 +00:00
Jonas Paulsson
9b4875434e [SystemZ] Updated test fp-cast.ll 
This did not get included in the previous commit for SystemZ cost functions.

llvm-svn: 300053
 2017-04-12 12:11:41 +00:00
Jonas Paulsson
fccc7d66c3 [SystemZ] TargetTransformInfo cost functions implemented. 
getArithmeticInstrCost(), getShuffleCost(), getCastInstrCost(),
getCmpSelInstrCost(), getVectorInstrCost(), getMemoryOpCost(),
getInterleavedMemoryOpCost() implemented.

Interleaved access vectorization enabled.

BasicTTIImpl::getCastInstrCost() improved to check for legal extending loads,
in which case the cost of the z/sext instruction becomes 0.

Review: Ulrich Weigand, Renato Golin.
https://reviews.llvm.org/D29631

llvm-svn: 300052
 2017-04-12 11:49:08 +00:00
Jonas Paulsson
facc4c5c7b [BasicTTIImpl] Bugfix in getIntrinsicInstrCost() 
Don't call getScalarizationOverhead(RetTy, true, false) if RetTy is void type.

Review: Hal Finkel
https://reviews.llvm.org/D31024

llvm-svn: 297954
 2017-03-16 14:05:34 +00:00