2280 Commits

Author SHA1 Message Date
Simon Pilgrim
0e51a125ea [X86] Add WriteEMMS scheduler class
Filled in the missing values from Btver2 SoG or Agner

llvm-svn: 331546
2018-05-04 18:16:13 +00:00
Simon Pilgrim
be51b20127 [X86] Add SchedWriteFRnd fp rounding scheduler classes
Split off from SchedWriteFAdd for fp rounding/bit-manipulation instructions.

Fixes an issue on btver2 which only had the ymm version using the JSTC pipe instead of JFPA.

llvm-svn: 331515
2018-05-04 12:59:24 +00:00
Simon Pilgrim
0aed731516 [X86][Znver1] Use SchedAlias to tag microcoded scheduler classes
Avoids extra entries in the class tables.

Found a typo that missed the MMX_PHSUBSW instruction.

llvm-svn: 331488
2018-05-03 22:12:23 +00:00
Martin Storsjo
e3b437935f [llvm-rc] Default to writing the output next to the input, if no output is specified
This matches what rc.exe does if no output is specified.

Differential Revision: https://reviews.llvm.org/D46239

llvm-svn: 331403
2018-05-02 21:15:24 +00:00
Martin Storsjo
ca16978967 [llvm-cvtres] Allow parameters preceded by '-' in addition to '/'
The real cvtres.exe also allows parameters in either form.

Differential Revision: https://reviews.llvm.org/D46358

llvm-svn: 331402
2018-05-02 21:15:13 +00:00
Paul Semel
41695f8e73 [llvm-objcopy] Add --discard-all (-x) option
llvm-svn: 331400
2018-05-02 20:19:22 +00:00
Paul Semel
2c0510f040 [llvm-objcopy] Add --weaken option
llvm-svn: 331397
2018-05-02 20:14:49 +00:00
Martin Storsjo
d1d046aa32 [llvm-rc] Add rudimentary support for codepages
Only support UTF-8 (since LLVM contains UTF-8 parsing support
already, and the code even does that already) and Windows-1252
(where most code points has the same value in unicode). Keep the
existing default as only allowing ASCII input.

Using the option type JoinedOrSeparate, since the real rc.exe
handles options in this form, even if llvm-rc uses Separate for
other similar existing options.

Rename the struct SearchParams to WriterParams since it's now used
for more than just include paths.

Add a missing getResourceTypeName method to the BundleResource class,
to fix error printing from within STRINGTABLE resources (used in
tests).

Differential Revision: https://reviews.llvm.org/D46238

llvm-svn: 331391
2018-05-02 19:43:44 +00:00
Simon Pilgrim
350c22c587 [X86][SNB] Fix scheduling of MMX integer multiply instructions.
The entries were being bound to the wrong class.

llvm-svn: 331388
2018-05-02 19:26:14 +00:00
Clement Courbet
a1a3095d88 [X86] Fix scheduling info for (V?)SQRTPDm on silvermont.
https://reviews.llvm.org/D46356

llvm-svn: 331356
2018-05-02 13:46:14 +00:00
Sam Clegg
7381216710 [WebAssembly] llvm-readobj: display symbols names in relocations
Differential Revision: https://reviews.llvm.org/D46296

llvm-svn: 331279
2018-05-01 16:35:16 +00:00
Jonas Devlieghere
4bbcb5ab04 [DebugInfo] Prevent infinite recursion for malformed DWARF
This prevents infinite recursion in DWARFDie::findRecursively for
malformed DWARF where a DIE references itself.

This fixes PR36257.

Differential revision: https://reviews.llvm.org/D43092

llvm-svn: 331200
2018-04-30 17:02:41 +00:00
Andrea Di Biagio
e047d3529b [llvm-mca] Correctly handle zero-latency stores that consume pipeline resources.
This fixes PR37293.

We can have scheduling classes with no write latency entries, that still consume
processor resources. We don't want to treat those instructions as zero-latency
instructions; they still have to be issued to the underlying pipelines, so they
still consume resource cycles.

This is likely to be a regression which I have accidentally introduced at
revision 330807. Now, if an instruction has a non-empty set of write processor
resources, we conservatively treat it as a normal (i.e. non zero-latency)
instruction.

llvm-svn: 331193
2018-04-30 15:55:04 +00:00
Andrea Di Biagio
77bd1c748a [llvm-mca] Regenerate test Atom/resources-sse3.s. NFC
Before this change, it wrongly specified -mcpu=slm instead of -mcpu=atom.

llvm-svn: 331170
2018-04-30 12:13:04 +00:00
Andrea Di Biagio
e9384eb13b [llvm-mca] Support for in-order CPU for -instruction-tables testing.
Added Intel Atom tests to verify that the tool correctly generates instruction
tables even if the CPU is in-order.

Fixes PR37282.

llvm-svn: 331169
2018-04-30 12:05:34 +00:00
Simon Pilgrim
8962c344f9 [llvm-mca][X86] Add BT resource tests to all models
llvm-svn: 331144
2018-04-29 15:45:31 +00:00
Simon Pilgrim
2d569361fc [llvm-mca][X86] Add add/adc + sub/sbb resource tests to all models
llvm-svn: 331140
2018-04-29 11:03:25 +00:00
Simon Pilgrim
318e9d39ab [llvm-mca][X86] Add double shift resource tests to all relevant models
llvm-svn: 331109
2018-04-28 15:18:49 +00:00
Simon Pilgrim
4d0187c893 [llvm-mca][X86] Add shift/rotate resource tests to all relevant models
I intend to add further instruction tests to the resources-x86_64.s test file as required, but this initial commit is to help remove a load of unnecessary InstRW overrides in a future patch

llvm-svn: 331108
2018-04-28 14:56:18 +00:00
Paul Semel
3a8a56b8b7 [llvm-objcopy] Add --weaken-symbol (-W) option
llvm-svn: 331070
2018-04-27 19:16:27 +00:00
Paul Semel
ee5be798da [llvm-objcopy] Add --globalize-symbol option
llvm-svn: 331068
2018-04-27 19:09:44 +00:00
Sam Clegg
e0658119ba typo
llvm-svn: 331006
2018-04-27 00:17:24 +00:00
Sam Clegg
d5504a0a62 [WebAssembly] Section symbols must have local binding
Summary: Also test for symbols information in test/MC/WebAssembly/debug-info.ll.

Subscribers: jfb, dschuff, jgravelle-google, aheejin, sunfish, JDevlieghere, llvm-commits

Differential Revision: https://reviews.llvm.org/D46160

llvm-svn: 331005
2018-04-27 00:17:21 +00:00
Alexander Shaposhnikov
40e9bdf9af [llvm-objcopy] Implement --redefine-sym option
This diff implements --redefine-sym option 
for changing the name of a symbol.

Test plan: make check-all

Differential revision: https://reviews.llvm.org/D46029

llvm-svn: 330973
2018-04-26 18:28:17 +00:00
Sam Clegg
6bb5a41f99 [WebAssembly] Add version to object file metadata
Summary: See https://github.com/WebAssembly/tool-conventions/issues/54

Subscribers: jfb, dschuff, jgravelle-google, aheejin, sunfish, llvm-commits

Differential Revision: https://reviews.llvm.org/D46069

llvm-svn: 330969
2018-04-26 18:15:32 +00:00
Paul Semel
b492494c0f [llvm-objcopy] Add --localize-symbol option
llvm-svn: 330963
2018-04-26 17:44:43 +00:00
Sam Clegg
8c4b0ce2b1 [WebAssembly] objdump: Don't assume all relocations have symbols
Subscribers: jfb, dschuff, jgravelle-google, aheejin, sunfish, llvm-commits

Differential Revision: https://reviews.llvm.org/D46134

llvm-svn: 330959
2018-04-26 17:05:04 +00:00
Sam Clegg
f676cdd515 [WebAssembly] Implement getRelocationValueString()
And use it in llvm-objdump.

Differential Revision: https://reviews.llvm.org/D46092

llvm-svn: 330957
2018-04-26 16:41:51 +00:00
Simon Pilgrim
7574ffd7bc [llvm-mca][X86] Updated fma3 tests after rL330820
llvm-svn: 330822
2018-04-25 13:19:04 +00:00
Andrea Di Biagio
93c49d5e58 [llvm-mca] Default to the native host cpu if flag -mcpu is not specified.
llvm-svn: 330809
2018-04-25 10:18:25 +00:00
Simon Pilgrim
27bc83e228 [X86] Split off PHMINPOSUW to their own schedule class
This also fixes Jaguar's schedule which was treating it as the WriteVecIMul default. 

llvm-svn: 330756
2018-04-24 18:49:25 +00:00
Sam Clegg
6f08c84ae5 [WebAssembly] Use section index in relocation section header
Rather than referring to sections my their code, use the
absolute index of the target section within the module.

See https://github.com/WebAssembly/tool-conventions/issues/52

Differential Revision: https://reviews.llvm.org/D45980

llvm-svn: 330749
2018-04-24 18:11:36 +00:00
Simon Pilgrim
f0945aa0e0 [X86][F16C] Add WriteCvtF2FSt scheduling class
Fixes the classification of VCVTPS2PHmr/VCVTPS2PHYmr which were tagged as WriteCvtF2FLd_WriteRMW (PR36887)

llvm-svn: 330737
2018-04-24 16:43:07 +00:00
Simon Pilgrim
828ef9e013 [X86][BtVer2] Fix VCVTPS2PHmr/VCVTPS2PHYmr latencies
These are stores, not loads, so don't need to account for load latency.

llvm-svn: 330735
2018-04-24 16:26:51 +00:00
Simon Pilgrim
f35b8ac196 [X86][IVB] Add F16C resource tests.
Note this is IvyBridge (which shares the model) NOT SandyBridge.

llvm-svn: 330734
2018-04-24 16:22:59 +00:00
Andrea Di Biagio
0626864fa4 [llvm-mca] Default the output asm dialect used by the instruction printer to the input asm dialect.
The instruction printer used by llvm-mca to generate the performance report now
defaults the output assembly format to the format used for the input assembly
file.

On x86, the asm format can be either AT&T or Intel, depending on the
presence/absence of directive `.intel_syntax`.

Users can still specify a different assembly dialect with the command line flag
-output-asm-variant=<uint>.

llvm-svn: 330733
2018-04-24 16:19:08 +00:00
Simon Pilgrim
16299273d0 [X86] Remove unnecessary FMA reg-mem InstRW scheduler overrides.
llvm-svn: 330720
2018-04-24 14:47:11 +00:00
Simon Pilgrim
f7d2a93d5f [X86] Add vector element insertion/extraction scheduler classes
Split off pinsr/pextr and extractps instructions.

(Mostly) fixes PR36887.

Note: It might be worth adding a WriteFInsertLd class as well in the future.

Differential Revision: https://reviews.llvm.org/D45929

llvm-svn: 330714
2018-04-24 13:21:41 +00:00
Alexander Shaposhnikov
d6884795d0 Recommit "[llvm-objcopy] Switch over to using TableGen for parsing arguments"
Add explicit dependency on ObjcopyTableGen 
and rerun the tests on Windows. 
I will double-check the build bots 
and revert this commit if necessary.

llvm-svn: 330685
2018-04-24 05:43:32 +00:00
Adrian Prantl
bbe980dfe1 Fix computeSymbolSizes SEGFAULT on invalid file
We use llvm-symbolizer in some production systems, and we run it
against all possibly related files, including some that are not
ELF. We noticed that for some of those invalid files, llvm-symbolizer
would crash with SEGFAULT. Here is an example of such a file.

It is due to that in computeSymbolSizes, a loop uses condition

  for (unsigned I = 0, N = Addresses.size() - 1; I < N; ++I) {

where if Addresses.size() is 0, N would overflow and causing the loop
to access invalid memory.

Instead of patching the loop conditions, the commit makes so that the
function returns early if Addresses is empty.

Validated by checking that llvm-symbolizer no longer crashes.

Patch by Teng Qin!

Differential Revision: https://reviews.llvm.org/D44285

llvm-svn: 330610
2018-04-23 16:08:01 +00:00
Simon Pilgrim
87ba905fe9 [llvm-mca][X86] Add BMI/LZCNT/POPCNT resource tests to all relevant models
The SandyBridge BMI tests are actually run on IvyBridge as that's the first lowest CPU that actually support the ISAs (but still use the SandyBridge model).

llvm-svn: 330556
2018-04-22 20:42:24 +00:00
Simon Pilgrim
96855ec39e [X86] Remove unnecessary WriteFVarBlend/WriteVarBlend InstRW overrides.
This also fixes some of the ReadAfterLd issues due to InstRW.

llvm-svn: 330544
2018-04-22 14:43:12 +00:00
Simon Pilgrim
5e9f1da0cd [llvm-mca][X86] Add POPCNT resource test
llvm-svn: 330540
2018-04-22 09:58:00 +00:00
Simon Pilgrim
e25aa02bc4 [llvm-mca][X86] Add AVX2 resource tests
llvm-svn: 330512
2018-04-21 16:12:42 +00:00
Simon Pilgrim
d73bd154d9 [llvm-mca][X86] Add SSE resource tests to all models
llvm-svn: 330506
2018-04-21 14:16:57 +00:00
Simon Pilgrim
26178d4336 [llvm-mca][X86] Add MMX resource tests
llvm-svn: 330502
2018-04-21 11:28:59 +00:00
Simon Pilgrim
1264066cd7 [llvm-mca][X86] Add X87 resource tests
llvm-svn: 330499
2018-04-21 10:36:19 +00:00
Simon Pilgrim
1803bfb75f [llvm-mca][X86] Add MMX/SSE/AES/CLMUL resource SandyBridge tests
llvm-svn: 330486
2018-04-20 22:04:11 +00:00
Alexander Shaposhnikov
52db4335b3 [llvm-objcopy] Fix sh_link
This diff fixes sh_link for various types of sections 
(i.e. for SHT_ARM_EXIDX, SHT_HASH). In particular, this change enables us
to use llvm-objcopy with clang -gsplit-dwarf for the target android-arm.

Test plan: make check-all

Differential revision: https://reviews.llvm.org/D45851

llvm-svn: 330478
2018-04-20 20:46:04 +00:00
Douglas Yung
51db3abac8 Fix test by allowing it to accept an upper or lower case letter as the first character.
Windows for some reason uses a lower case letter, while linux uses upper case.

llvm-svn: 330438
2018-04-20 15:23:57 +00:00