10 Commits

Author SHA1 Message Date
Nikita Popov
86755dd0bf [llvm] Use ConstantInt::getAllOnesValue()
Prefer getAllOnesValue() over get(-1). This is good practice to
avoid issues with sign extension for large types.
2025-12-09 12:02:39 +01:00
Nikita Popov
573ca36753
[IR] Replace alignment argument with attribute on masked intrinsics (#163802)
The `masked.load`, `masked.store`, `masked.gather` and `masked.scatter`
intrinsics currently accept a separate alignment immarg. Replace this
with an `align` attribute on the pointer / vector of pointers argument.

This is the standard representation for alignment information on
intrinsics, and is already used by all other memory intrinsics. This
means the signatures now match llvm.expandload, llvm.vp.load, etc.
(Things like llvm.memcpy used to have a separate alignment argument as
well, but were already migrated a long time ago.)

It's worth noting that the masked.gather and masked.scatter intrinsics
previously accepted a zero alignment to indicate the ABI type alignment
of the element type. This special case is gone now: If the align
attribute is omitted, the implied alignment is 1, as usual. If ABI
alignment is desired, it needs to be explicitly emitted (which the
IRBuilder API already requires anyway).
2025-10-20 08:50:09 +00:00
Rahul Joshi
74b7abf154
[IRBuilder] Add new overload for CreateIntrinsic (#131942)
Add a new `CreateIntrinsic` overload with no `Types`, useful for
creating calls to non-overloaded intrinsics that don't need additional
mangling.
2025-03-31 08:10:34 -07:00
Mats Jun Larsen
416f1c465d
[IR] Replace of PointerType::get(Type) with opaque version (NFC) (#123617)
In accordance with https://github.com/llvm/llvm-project/issues/123569

In order to keep the patch at reasonable size, this PR only covers for
the llvm subproject, unittests excluded.
2025-01-21 00:32:56 +09:00
Kazu Hirata
4048c64306
[llvm] Remove redundant control flow statements (NFC) (#115831)
Identified with readability-redundant-control-flow.
2024-11-12 10:09:42 -08:00
Jay Foad
8d13e7b8c3
[AMDGPU] Qualify auto. NFC. (#110878)
Generated automatically with:
$ clang-tidy -fix -checks=-*,llvm-qualified-auto $(find
lib/Target/AMDGPU/ -type f)
2024-10-03 13:07:54 +01:00
Chaitanya
33f1aedef8
[AMDGPU] Update instrumentAddress method to support aligned size and unusual size accesses. (#104804)
This PR updates instrumentAddress api to support properly aligned sizes
and unsual size accesses. Changes ported from asan pass.
2024-08-21 10:31:42 +05:30
Jeremy Morse
bde243259b Revert "[Asan] Provide TTI hook to provide memory reference infromation of target intrinsics. (#97070)"
This reverts commit e8ad87c7d06afe8f5dde2e4c7f13c314cb3a99e9.
This reverts commit d3c9bb0cf811424dcb8c848cf06773dbdde19965.

A few buildbots trip up on asan-rvv-intrinsics.ll. I've also reverted
the follow-up commit d3c9bb0cf8.

https://lab.llvm.org/buildbot/#/builders/46/builds/2895
2024-08-08 12:26:05 +01:00
Jie Fu
d3c9bb0cf8 [AMDGPU] Fix build failure after #97070 (NFC)
/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUAsanInstrumentation.h:55:21:
error: use of undeclared identifier 'InterestingMemoryOperand'
    SmallVectorImpl<InterestingMemoryOperand> &Interesting);
                    ^
2024-08-08 14:11:16 +08:00
Chaitanya
e6c20e11e7
[AMDGPU] Move AMDGPUAsanInstrumentation outside of utils (#100323)
#98863 merged AMDGPUAsanInstrumentation module which missed
TransformUtils to be linked to AMDGPUUtils.
This PR moves AMDGPUAsanInstrumentation files outside utils folder and
adds them to AMDGPUCodegen lib.
2024-07-24 18:06:10 +05:30