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3 Commits

Author SHA1 Message Date
Matt Arsenault
1cc4991412 AMDGPU: Fix inconsistent lowering of select of vectors 
f32 vectors would use a sequence of BFI instructions instead
of unrolled cmp + select. This was better in the case of a VALU
select with SGPR inputs, but we don't have a way of dealing with that
in the DAG.

llvm-svn: 270731
 2016-05-25 17:34:58 +00:00
Tom Stellard
e48fe2a27a AMDGPU/SI: Add support for shrinking v_cndmask_b32_e32 instructions 
Reviewers: arsenm

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D11061

llvm-svn: 242146
 2015-07-14 14:15:03 +00:00
Tom Stellard
45bb48ea19 R600 -> AMDGPU rename 
llvm-svn: 239657
 2015-06-13 03:28:10 +00:00