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Author	SHA1	Message	Date
Samuel Parker	7bff37783f	[SDAG] Check fminnum/fmaxnum for non-zero operand. Currently, in TargetLowering, if the target does not support fminnum, we lower to fminimum if neither operand could be a NaN. But this isn't quite correct because fminnum and fminimum treat +/-0 differently; so, we need to prove that one of the operands isn't a zero, or we don't have signed zeros. Differential Revision: https://reviews.llvm.org/D143256	2023-02-07 10:54:23 +00:00
James Greenhalgh	f0de8d0940	[Arm] Do not lower vmax/vmin to Neon instructions On some Arm cores there is a performance penalty when forwarding from an S register to a D register. Calculating VMAX in a D register creates false forwarding hazards, so don't do that unless we're on a core which specifically asks for it. Patch by James Greenhalgh Differential Revision: https://reviews.llvm.org/D75248	2020-03-10 10:48:48 +00:00

Author

SHA1

Message

Date

Samuel Parker

7bff37783f

[SDAG] Check fminnum/fmaxnum for non-zero operand.

Currently, in TargetLowering, if the target does not support fminnum, we lower
to fminimum if neither operand could be a NaN. But this isn't quite correct
because fminnum and fminimum treat +/-0 differently; so, we need to prove that
one of the operands isn't a zero, or we don't have signed zeros.

Differential Revision: https://reviews.llvm.org/D143256

2023-02-07 10:54:23 +00:00

James Greenhalgh

f0de8d0940

[Arm] Do not lower vmax/vmin to Neon instructions

On some Arm cores there is a performance penalty when forwarding from an
S register to a D register.  Calculating VMAX in a D register creates
false forwarding hazards, so don't do that unless we're on a core which
specifically asks for it.

Patch by James Greenhalgh

Differential Revision: https://reviews.llvm.org/D75248

2020-03-10 10:48:48 +00:00

2 Commits