355 Commits

Author SHA1 Message Date
Aiden Grossman
47e62e846b Revert "[APFloat] Fix getExactInverse for DoubleAPFloat"
This reverts commit f4941319cba19d7691baa6ec783c84be4d847637.

This broke llvm/test/CodeGen/Thumb2/mve-vcvt-fixed-to-float.ll which
took out a ton of buildbots and also broke premerge.
2025-08-14 04:39:50 +00:00
David Majnemer
f4941319cb [APFloat] Fix getExactInverse for DoubleAPFloat
Some background: getExactInverse()'s callers expect that
the result is not subnormal.

DoubleAPFloat implemented getExactInverse() by going through
semPPCDoubleDoubleLegacy.

This means that numbers like 0x1p1022 which would have a normal inverse
in semPPCDoubleDouble would not in semPPCDoubleDoubleLegacy.

This commit refactors the logic into a single method on APFloat which
uses getExactLog2Abs() and scalbn() to calculate the inverse without
having to compute a reciprocal and test if it is inexact.
This approach works for both IEEEFloat and DoubleAPFloat.
2025-08-13 11:39:53 -07:00
David Majnemer
acef1db3b2 [APFloat] Remove some overly optimistic assertions
An earlier draft of DoubleAPFloat::convertToSignExtendedInteger had
arranged for overflow to be handled in a different way.  However, these
assertions are now possible if Hi+Lo are out of range and Lo != 0.

A test has been added to defend against a regression.
2025-08-12 18:32:58 -07:00
David Majnemer
f6d143fd1f [APFloat] Properly implement frexp(DoubleAPFloat)
The prior implementation did not consider that the Lo component may
underflow when it undergoes scaling.  This means that we need to
carefully handle things like binade crossings or how to handle
roundTowardZero when Hi and Lo have different signs.

Particularly annoying is roundTiesToAway when Hi and Lo have different
signs.  It basically requires us to implement roundTiesTowardZero.
2025-08-12 17:03:27 -07:00
David Majnemer
e722ef4956 Reapply "[APFloat] Properly implement DoubleAPFloat::convertToSignExtendedInteger"
This reverts commit 8b44945a9231d4d7be0858a1c5d9c13d397bc512.

The compilation failure under !NDEBUG has been fixed.
2025-08-12 17:01:49 -07:00
Kazu Hirata
8b44945a92 Revert "[APFloat] Properly implement DoubleAPFloat::convertToSignExtendedInteger"
This reverts commit 052c38be824d9dabb1e8fb64c1c7c3908d786e83.

I'm getting:

llvm/lib/Support/APFloat.cpp:5627:29: error:
use of undeclared identifier 'Parts'
 5627 |     assert(DstPartsCount <= Parts.size() && "Integer too big");
      |                             ^
1 error generated.
2025-08-10 00:36:29 -07:00
David Majnemer
052c38be82 [APFloat] Properly implement DoubleAPFloat::convertToSignExtendedInteger
Use DoubleAPFloat::roundToIntegral to get a pair of APFloat values which
hold integral values.  Then we sum the pair, taking care to make sure
that we handle edge cases like (hi=2^128, lo=-1) and ensuring that they
fit in an unsigned i128.
2025-08-09 23:23:01 -07:00
David Majnemer
0a23b22d1d [APFloat] Properly implement DoubleAPFloat::roundToIntegral
The previous implementation did not correctly handle double-doubles like
0x1p100 + 0x1p1 as the low order component would need more than a
106-bit significand to represent.
2025-08-06 10:42:07 -07:00
David Majnemer
9fdb5e1fef [APFloat] Properly implement next for DoubleAPFloat
Rather than converting to the legacy 106-bit format, perform next() on the
low APFloat. Of course, we need to renormalize the two APFloats if
either of the two constraints are violated:
1. abs(low) <= ulp(high)/2
2. high = rtne(high + low)

Should renormalization be needed, it will increment the high component
and set low to the smallest value which obeys these rules.
2025-08-01 12:34:33 -07:00
Rahul Joshi
a76bf4da53
[NFC][ADT/Support] Add {} for else when if body has {} (#140758) 2025-05-21 13:19:09 -07:00
Kazu Hirata
7470131b43
[llvm] Use StringRef::consume_front (NFC) (#139458) 2025-05-11 10:28:49 -07:00
Yingwei Zheng
e710a5a9f2
[InstCombine] Fold fneg/fabs patterns with ppc_f128 (#130557)
This patch is needed by
https://github.com/llvm/llvm-project/pull/130496.
2025-04-14 14:30:00 +08:00
beetrees
8b9c91ec7d
[APFloat] Fix IEEEFloat::addOrSubtractSignificand and IEEEFloat::normalize (#98721)
Fixes #63895
Fixes #104984

Before this PR, `addOrSubtractSignificand` presumed that the loss came
from the side being subtracted, and didn't handle the case where lhs ==
rhs and there was loss. This can occur during FMA. This PR fixes the
situation by correctly determining where the loss came from and handling
it appropriately.

Additionally, `normalize` failed to adjust the exponent when the
significand is zero but `lost_fraction != lfExactlyZero`. This meant
that the test case from #63895 was rounded incorrectly as the loss
wasn't adjusted to account for the exponent being below the minimum
exponent. This PR fixes this by only skipping the exponent adjustment if
the significand is zero and there was no lost fraction.

(Note to reviewer: I don't have commit access)
2025-03-10 09:44:27 +07:00
Peter Collingbourne
c72ebeeb7f
ADT: Switch to a raw pointer for DoubleAPFloat::Floats.
In order for the union APFloat::Storage to permit access to the
semantics field when another union member is stored there, all members
of Storage must be standard layout. This is not necessarily the case
for DoubleAPFloat which may be non-standard layout because there is no
requirement that its std::unique_ptr member is standard layout. Fix this
by converting Floats to a raw pointer.

Reviewers: arsenm

Reviewed By: arsenm

Pull Request: https://github.com/llvm/llvm-project/pull/129981
2025-03-05 21:15:08 -08:00
Yingwei Zheng
44d1dbd24c
[X86][DAGCombiner] Skip x87 fp80 values in combineFMulOrFDivWithIntPow2 (#128618)
f80 is not a valid IEEE floating-point type.
Closes https://github.com/llvm/llvm-project/issues/128528.
2025-02-25 22:03:17 +08:00
Congcong Cai
ad56f6267f
[APFloat][NFC]extract fltSemantics::isRepresentableBy to header (#122636)
isRepresentableBy is useful to check float point type compatibility
2025-01-14 06:12:04 +08:00
Matthias Springer
f50ce316ec
[llvm][NFC] APFloat: Add missing semantics to enum (#117291)
* Add missing semantics to the `Semantics` enum.
* Move all documentation of the semantics to the header file.
* Also rename some functions for consistency.
2024-12-04 14:58:59 -08:00
Matthias Springer
309c890921
[llvm] APFloat: Add helpers to query NaN/inf semantics (#116315)
`APFloat` changes extracted from #116176 as per reviewer comments.
2024-11-16 11:48:05 +09:00
Matthias Springer
2f55de4e31
[llvm] APFloat: Query hasNanOrInf from semantics (#116158)
Whether a floating point type supports NaN or infinity can be queried
from its semantics. No need to hard-code a list of types.
2024-11-15 09:29:54 +09:00
Kazu Hirata
4048c64306
[llvm] Remove redundant control flow statements (NFC) (#115831)
Identified with readability-redundant-control-flow.
2024-11-12 10:09:42 -08:00
Sergey Kozub
7b308b18c3
Fix bitcasting E8M0 APFloat to APInt (#113298)
Fixes a bug in APFloat handling of E8M0 type (zero mantissa).

Related PRs:
- https://github.com/llvm/llvm-project/pull/107127
- https://github.com/llvm/llvm-project/pull/111028
2024-10-22 19:15:29 +02:00
Ariel-Burton
3b7091bcf3
[APFloat] add predicates to fltSemantics for hasZero and hasSignedRepr (#111451)
We add static methods to APFloatBase to allow the hasZero and
hasSignedRepr properties of fltSemantics to be obtained.
2024-10-09 08:37:40 -04:00
Yingwei Zheng
6004f5550c
[ADT][APFloat] Make sure EBO is performed on APFloat (#111641)
Since both APFloat and (Double)IEEEFloat inherit from APFloatBase, empty
base optimization is not performed by GCC/Clang (Minimal reproducer:
https://godbolt.org/z/dY8cM3Wre). This patch removes inheritance
relation between (Double)IEEEFloat and APFloatBase to make sure EBO is
performed on APFloat. After this patch, the size of `ConstantFPRange`
will be reduced from 72 to 56.

Address comment
https://github.com/llvm/llvm-project/pull/111544#discussion_r1792398427.
2024-10-09 16:39:02 +08:00
Durgadoss R
99f527d280
[APFloat] Add APFloat support for E8M0 type (#107127)
This patch adds an APFloat type for unsigned E8M0 format. This format is
used for representing the "scale-format" in the MX specification:
(section 5.4)

https://www.opencompute.org/documents/ocp-microscaling-formats-mx-v1-0-spec-final-pdf

This format does not support {Inf, denorms, zeroes}. Like FP32, this
format's exponents are 8-bits (all bits here) and the bias value is 127.
However, it differs from IEEE-FP32 in that the minExponent is -127
(instead of -126). There are updates done in the APFloat utility
functions to handle these constraints for this format.

* The bias calculation is different and convertIEEE* APIs are updated to
handle this.
* Since there are no significand bits, the isSignificandAll{Zeroes/Ones}
methods are updated accordingly.
* Although the format does not have any precision, the precision bit in
the fltSemantics is set to 1 for consistency with APFloat's internal
representation.
* Many utility functions are updated to handle the fact that this format
does not support Zero.
* Provide a separate initFromAPInt() implementation to handle the quirks
of the format.
* Add specific tests to verify the range of values for this format.

Signed-off-by: Durgadoss R <durgadossr@nvidia.com>
2024-10-02 23:04:21 +05:30
Yingwei Zheng
fa824dc0dd
[LLVM][IR] Add constant range support for floating-point types (#86483)
This patch adds basic constant range support for floating-point types to enable range-based optimizations.
2024-09-25 13:58:23 +08:00
NAKAMURA Takumi
3ef64f7ab5 Revert "Enable logf128 constant folding for hosts with 128bit long double (#104929)"
ConstantFolding behaves differently depending on host's `HAS_IEE754_FLOAT128`.
LLVM should not change the behavior depending on host configurations.

This reverts commit 14c7e4a1844904f3db9b2dc93b722925a8c66b27.
(llvmorg-20-init-3262-g14c7e4a18449 and llvmorg-20-init-3498-g001e423ac626)
2024-08-25 08:30:23 +09:00
Matthew Devereau
14c7e4a184
Enable logf128 constant folding for hosts with 128bit long double (#104929)
This is a reland of (#96287). This patch attempts to reduce the reverted
patch's clang compile time by removing #includes of float128.h and
inlining convertToQuad functions instead.
2024-08-22 10:12:59 +01:00
Nikita Popov
6300233de1 Revert "Reland logf128 constant folding (#103217)"
This reverts commit 3cab7c555ad6451f2b1b4dc918a4b4f4e4a3e45d.

The modified test fails on ppc64le buildbots.
2024-08-14 12:30:33 +02:00
Matthew Devereau
3cab7c555a
Reland logf128 constant folding (#103217)
This is a reland of #96287. This change makes tests in logf128.ll ignore
the sign of NaNs for negative value tests and moves an #include <cmath>
to be blocked behind #ifndef _GLIBCXX_MATH_H.
2024-08-14 08:55:52 +01:00
Nikita Popov
a15de17772 Revert "Enable logf128 constant folding for hosts with 128bit floats (#96287)"
This reverts commit ccb2b011e577e861254f61df9c59494e9e122b38.

Causes buildbot failures, e.g. on ppc64le builders.
2024-08-09 15:12:11 +02:00
Matthew Devereau
ccb2b011e5
Enable logf128 constant folding for hosts with 128bit floats (#96287)
Hosts which support a float size of 128 bits can benefit from constant
fp128 folding.
2024-08-09 11:12:43 +01:00
Alexander Pivovarov
abc2fe31fc
[APFloat] Add support for f8E3M4 IEEE 754 type (#99698)
This PR adds `f8E4M3` type to APFloat.

`f8E3M4` type  follows IEEE 754 convention

```c
f8E3M4 (IEEE 754)
- Exponent bias: 3
- Maximum stored exponent value: 6 (binary 110)
- Maximum unbiased exponent value: 6 - 3 = 3
- Minimum stored exponent value: 1 (binary 001)
- Minimum unbiased exponent value: 1 − 3 = −2
- Precision specifies the total number of bits used for the significand (mantissa), 
    including implicit leading integer bit = 4 + 1 = 5
- Follows IEEE 754 conventions for representation of special values
- Has Positive and Negative zero
- Has Positive and Negative infinity
- Has NaNs

Additional details:
- Max exp (unbiased): 3
- Min exp (unbiased): -2
- Infinities (+/-): S.111.0000
- Zeros (+/-): S.000.0000
- NaNs: S.111.{0,1}⁴ except S.111.0000
- Max normal number: S.110.1111 = +/-2^(6-3) x (1 + 15/16) = +/-2^3 x 31 x 2^(-4) = +/-15.5
- Min normal number: S.001.0000 = +/-2^(1-3) x (1 + 0) = +/-2^(-2)
- Max subnormal number: S.000.1111 = +/-2^(-2) x 15/16 = +/-2^(-2) x 15 x 2^(-4) = +/-15 x 2^(-6)
- Min subnormal number: S.000.0001 = +/-2^(-2) x 1/16 =  +/-2^(-2) x 2^(-4) = +/-2^(-6)
```

Related PRs:
- [PR-97179](https://github.com/llvm/llvm-project/pull/97179) [APFloat]
Add support for f8E4M3 IEEE 754 type
2024-07-30 00:11:10 -07:00
Alexander Pivovarov
f363317702
[APFloat] Add support for f8E4M3 IEEE 754 type (#97179)
This PR adds `f8E4M3` type to APFloat.

`f8E4M3` type  follows IEEE 754 convention

```c
f8E4M3 (IEEE 754)
- Exponent bias: 7
- Maximum stored exponent value: 14 (binary 1110)
- Maximum unbiased exponent value: 14 - 7 = 7
- Minimum stored exponent value: 1 (binary 0001)
- Minimum unbiased exponent value: 1 − 7 = −6
- Precision specifies the total number of bits used for the significand (mantisa), 
    including implicit leading integer bit = 3 + 1 = 4
- Follows IEEE 754 conventions for representation of special values
- Has Positive and Negative zero
- Has Positive and Negative infinity
- Has NaNs

Additional details:
- Max exp (unbiased): 7
- Min exp (unbiased): -6
- Infinities (+/-): S.1111.000
- Zeros (+/-): S.0000.000
- NaNs: S.1111.{001, 010, 011, 100, 101, 110, 111}
- Max normal number: S.1110.111 = +/-2^(7) x (1 + 0.875) = +/-240
- Min normal number: S.0001.000 = +/-2^(-6)
- Max subnormal number: S.0000.111 = +/-2^(-6) x 0.875 = +/-2^(-9) x 7
- Min subnormal number: S.0000.001 = +/-2^(-6) x 0.125 = +/-2^(-9)
```

Related PRs:
- [PR-97118](https://github.com/llvm/llvm-project/pull/97118) Add f8E4M3
IEEE 754 type to mlir
2024-07-17 23:33:52 -07:00
Ariel-Burton
bbc6504b3d
[NFC] [APFloat] Refactor IEEEFloat::toString (#97117)
This PR lifts the body of IEEEFloat::toString out to a standalone
function. We do this to facilitate code sharing with other floating
point types, e.g., the forthcoming support for HexFloat.

There is no change in functionality.
2024-07-04 08:43:45 -04:00
Alexander Pivovarov
2628a5fd24
Rename f8E4M3 to f8E4M3FN in mlir.extras.types py package (#97102)
Currently `f8E4M3` is mapped to `Float8E4M3FNType`.

This PR renames `f8E4M3` to `f8E4M3FN` to accurately reflect the actual
type.

This PR is needed to avoid names conflict in upcoming PR which will add
IEEE 754 `Float8E4M3Type`.
https://github.com/llvm/llvm-project/pull/97118 Add f8E4M3 IEEE 754 type

Maksim, can you review this PR? @makslevental ?
2024-06-29 12:48:11 -07:00
Durgadoss R
880d37038c
[APFloat] Add APFloat support for FP4 data type (#95392)
This patch adds APFloat type support for the E2M1
FP4 datatype. The definitions for this format are
detailed in section 5.3.3 of the OCP specification,
which can be accessed here:

https://www.opencompute.org/documents/ocp-microscaling-formats-mx-v1-0-spec-final-pdf

Signed-off-by: Durgadoss R <durgadossr@nvidia.com>
2024-06-14 14:17:37 +05:30
Durgadoss R
b1fe03f084
[APFloat] Add APFloat support for FP6 data types (#94735)
This patch adds APFloat type support for two FP6 data types,
E2M3 and E3M2. The definitions for the two formats are detailed
in section 5.3.2 of the OCP specification, which can be accessed here:

https://www.opencompute.org/documents/ocp-microscaling-formats-mx-v1-0-spec-final-pdf

Signed-off-by: Durgadoss R <durgadossr@nvidia.com>
2024-06-11 13:16:51 +05:30
Matthew Devereau
3613b26831
Constant Fold logf128 calls (#90611)
This is a second attempt to land #84501 which failed on several targets.

This patch adds the HAS_IEE754_FLOAT128 define which makes the check for
typedef'ing float128 more precise by checking whether __uint128_t is
available and checking if the host does not use __ibm128 which is
prevalent on power pc targets and replaces IEEE754 float128s.
2024-05-29 06:13:02 +01:00
Nikita Popov
595de12ff3
[APFloat] Replace partsCount array with single variable (NFC) (#91910)
We only ever use the last element of this array, so there shouldn't be a
need to store the preceding elements as well.
2024-05-14 09:44:49 +09:00
Kazu Hirata
7ee6288312
[Support] Use StringRef::operator== instead of StringRef::equals (NFC) (#91042)
I'm planning to remove StringRef::equals in favor of
StringRef::operator==.

- StringRef::operator== outnumbers StringRef::equals by a factor of 25
  under llvm/ in terms of their usage.

- The elimination of StringRef::equals brings StringRef closer to
  std::string_view, which has operator== but not equals.

- S == "foo" is more readable than S.equals("foo"), especially for
  !Long.Expression.equals("str") vs Long.Expression != "str".
2024-05-04 08:46:48 -07:00
Matt Devereau
efce8a05aa Revert "Constant Fold logf128 calls"
This reverts commit 088aa81a545421933254f19cd3c8914a0373b493.
2024-05-01 12:18:39 +00:00
Matt Devereau
088aa81a54 Constant Fold logf128 calls
This is a second attempt to land #84501 which failed on several targets.

This patch adds the HAS_IEE754_FLOAT128 define which makes the check for
typedef'ing float128 more precise by checking whether __uint128_t is available
and checking if the host does not use __ibm128 which is prevalent on power pc
targets and replaces IEEE754 float128s.
2024-05-01 11:55:54 +00:00
Matt Devereau
c26e9bf8fa Revert "Constant Fold Logf128 calls (#84501)"
This reverts commit e90bc9cfd4d22c89dd993f62ede700ae25df49c5.
2024-04-18 11:20:54 +00:00
Matthew Devereau
e90bc9cfd4
Constant Fold Logf128 calls (#84501)
This patch enables constant folding for 128 bit floating-point logf
calls. This is achieved by querying if the host system has the logf128()
symbol available with a CMake test. If so, replace the runtime call with
the compile time value returned from logf128.
2024-04-18 10:19:01 +01:00
Simon Pilgrim
bcb685e119 [Support] Use StringRef::starts_with/ends_with instead of startswith/endswith. NFC.
startswith/endswith wrap starts_with/ends_with and will eventually go away (to more closely match string_view)
2023-11-03 18:19:33 +00:00
Matt Arsenault
8a02fd3f94 APFloat: Add getExactLog2Abs
Like the recently added getExactLog2 except ignore the sign bit.

https://reviews.llvm.org/D158102
2023-08-23 19:16:41 -04:00
Matt Arsenault
0b57c3a7b8 APFloat: Add getExactLog2
https://reviews.llvm.org/D157108
2023-08-07 18:40:16 -04:00
Jeremy Furtek
55c2211a23 [APFloat] Add APFloat semantic support for TF32
This diff adds APFloat support for a semantic that matches the TF32 data type
used by some accelerators (most notably GPUs from both NVIDIA and AMD).

For more information on the TF32 data type, see https://blogs.nvidia.com/blog/2020/05/14/tensorfloat-32-precision-format/.
Some intrinsics that support the TF32 data type were added in https://reviews.llvm.org/D122044.

For some discussion on supporting common semantics in `APFloat`, see similar
efforts for 8-bit formats at https://reviews.llvm.org/D146441, as well as
https://discourse.llvm.org/t/rfc-adding-the-amd-graphcore-maybe-others-float8-formats-to-apfloat/67969.

A subsequent diff will extend MLIR to use this data type. (Those changes are
not part of this diff to simplify the review process.)

Reviewed By: mehdi_amini

Differential Revision: https://reviews.llvm.org/D151923
2023-06-23 10:54:49 +02:00
Matt Arsenault
6966859059 ValueTracking: Implement computeKnownFPClass for fpext 2023-04-21 07:02:55 -04:00
David Majnemer
3d11652bbe [APFloat] Refactor common code for APFloat<->APInt conversion
All the IEEE formats are quite similar, we can merge their code
effectively by writing it parametrically via the fltSemantics object.

We can metaprogram the implementation such that this parametricity is
zero-cost.
2023-04-04 19:12:10 +00:00