709 Commits

Author SHA1 Message Date
weiwei chen
55ff96abfa
[X86][Test] Reorder PassMgrF and OS. (#134481)
Reordering `OS` and `PassMgrF` should fix the asan failure that's caused
by OS being destroyed before `PassMgrF` deletes the AsmPrinter.

As shown in[ this asan run
](https://lab.llvm.org/buildbot/#/builders/52/builds/7340/steps/12/logs/stdio)

```
  This frame has 15 object(s):
    [32, 48) 'PassMgrF' (line 154)
    [64, 1112) 'Buf' (line 155)
    [1248, 1304) 'OS' (line 156) <== Memory access at offset 1280 is inside this variable
```
which indicates an ordering problem. 

This should help to fix all the sanitizer failures caused by the test
`X86MCInstLowerTest.cpp` that's introduced by [this
PR](https://github.com/llvm/llvm-project/pull/133352#issuecomment-2780173791).
2025-04-05 19:41:52 -04:00
weiwei chen
1f72fa29ec
[X86Backend][M68KBackend] Make Ctx in X86MCInstLower (M68KInstLower) the same as AsmPrinter.OutContext (#133352)
In `X86MCInstLower::LowerMachineOperand`, a new `MCSymbol` can be
created in `GetSymbolFromOperand(MO)` where `MO.getType()` is
`MachineOperand::MO_ExternalSymbol`
```
  case MachineOperand::MO_ExternalSymbol:
    return LowerSymbolOperand(MO, GetSymbolFromOperand(MO));
```
at
725a7b664b/llvm/lib/Target/X86/X86MCInstLower.cpp (L196)

However, this newly created symbol will not be marked properly with its
`IsExternal` field since `Ctx.getOrCreateSymbol(Name)` doesn't know if
the newly created `MCSymbol` is for `MachineOperand::MO_ExternalSymbol`.



Looking at other backends, for example `Arch64MCInstLower` is doing for
handling `MC_ExternalSymbol`


14c36db16f/llvm/lib/Target/AArch64/AArch64MCInstLower.cpp (L366-L367)


14c36db16f/llvm/lib/Target/AArch64/AArch64MCInstLower.cpp (L145-L148)

It creates/gets the MCSymbol from `AsmPrinter.OutContext` instead of
from `Ctx`. Moreover, `Ctx` for `AArch64MCLower` is the same as
`AsmPrinter.OutContext`.
8e7d6baf0e/llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp (L100).
This applies to almost all the other backends except X86 and M68k.

```
$git grep "MCInstLowering("
lib/Target/AArch64/AArch64AsmPrinter.cpp💯      : AsmPrinter(TM, std::move(Streamer)), MCInstLowering(OutContext, *this),
lib/Target/AMDGPU/AMDGPUMCInstLower.cpp:223:  AMDGPUMCInstLower MCInstLowering(OutContext, STI, *this);
lib/Target/AMDGPU/AMDGPUMCInstLower.cpp:257:  AMDGPUMCInstLower MCInstLowering(OutContext, STI, *this);
lib/Target/AMDGPU/R600MCInstLower.cpp:52:  R600MCInstLower MCInstLowering(OutContext, STI, *this);
lib/Target/ARC/ARCAsmPrinter.cpp:41:        MCInstLowering(&OutContext, *this) {}
lib/Target/AVR/AVRAsmPrinter.cpp:196:  AVRMCInstLower MCInstLowering(OutContext, *this);
lib/Target/BPF/BPFAsmPrinter.cpp:144:    BPFMCInstLower MCInstLowering(OutContext, *this);
lib/Target/CSKY/CSKYAsmPrinter.cpp:41:    : AsmPrinter(TM, std::move(Streamer)), MCInstLowering(OutContext, *this) {}
lib/Target/Lanai/LanaiAsmPrinter.cpp:147:  LanaiMCInstLower MCInstLowering(OutContext, *this);
lib/Target/Lanai/LanaiAsmPrinter.cpp:184:  LanaiMCInstLower MCInstLowering(OutContext, *this);
lib/Target/MSP430/MSP430AsmPrinter.cpp:149:  MSP430MCInstLower MCInstLowering(OutContext, *this);
lib/Target/Mips/MipsAsmPrinter.h:126:      : AsmPrinter(TM, std::move(Streamer)), MCInstLowering(*this) {}
lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp:695:    WebAssemblyMCInstLower MCInstLowering(OutContext, *this);
lib/Target/X86/X86MCInstLower.cpp:2200:  X86MCInstLower MCInstLowering(*MF, *this);
```

This patch makes `X86MCInstLower` and `M68KInstLower` to have their
`Ctx` from `AsmPrinter.OutContext` instead of getting it from
`MF.getContext()` to be consistent with all the other backends.

I think since normal use case (probably anything other than our
un-conventional case) only handles one llvm module all the way through
in the codegen pipeline till the end of code emission (AsmPrint),
`AsmPrinter.OutContext` is the same as MachineFunction's MCContext, so
this change is an NFC.

----

This fixes an error while running the generated code in ORC JIT for our
use case with
[MCLinker](https://youtu.be/yuSBEXkjfEA?si=HjgjkxJ9hLfnSvBj&t=813) (see
more details below):
https://github.com/llvm/llvm-project/pull/133291#issuecomment-2759200983

We (Mojo) are trying to do a MC level linking so that we break llvm
module into multiple submodules to compile and codegen in parallel
(technically into *.o files with symbol linkage type change), but
instead of archive all of them into one `.a` file, we want to fix the
symbol linkage type and still produce one *.o file. The parallel codegen
pipeline generates the codegen data structures in their own `MCContext`
(which is `Ctx` here). So if function `f` and `g` got split into
different submodules, they will have different `Ctx`. And when we try to
create an external symbol with the same name for each of them with
`Ctx.getOrCreate(SymName)`, we will get two different `MCSymbol*`
because `f` and `g`'s `MCContext` are different and they can't see each
other. This is unfortunately not what we want for external symbols.
Using `AsmPrinter.OutContext` helps, since it is shared, if we try to
get or create the `MCSymbol` there, we'll be able to deduplicate.
2025-04-04 22:44:07 -04:00
Tim Gymnich
1d0005a69a
[GlobalISel][NFC] Rename GISelKnownBits to GISelValueTracking (#133466)
- rename `GISelKnownBits` to `GISelValueTracking` to analyze more than
just `KnownBits` in the future
2025-03-29 11:51:29 +01:00
Ethan Kaji
6b00ae6359
[DAG] SDPatternMatch - add matchers for reassociatable binops (#119985)
fixes https://github.com/llvm/llvm-project/issues/118847

implements matchers for reassociatable opcodes as well as helpers for
commonly used reassociatable binary matchers.

---------

Co-authored-by: Min-Yih Hsu <min@myhsu.dev>
2025-03-21 13:05:06 -07:00
Nikita Popov
f137c3d592
[TargetRegistry] Accept Triple in createTargetMachine() (NFC) (#130940)
This avoids doing a Triple -> std::string -> Triple round trip in lots
of places, now that the Module stores a Triple.
2025-03-12 17:35:09 +01:00
David Green
9bac1b63ac
[GlobalISel] Add and use a m_GAddLike pattern matcher. NFC (#125435)
This adds a Flags parameter to the BinaryOp_match, allowing it to detect
different flags like Disjoint. A m_GDisjointOr is added to detect Or's
with disjoint flags, and G_AddLike is then either a m_GADD or
m_GDisjointOr.

The rest is trying to allow matching `const MachineInstr&`, as opposed
to non-const references.
2025-03-10 22:03:36 +00:00
Daniel Paoliello
16e051f0b9
[win] NFC: Rename EHCatchret to EHCont to allow for EH Continuation targets that aren't catchret instructions (#129953)
This change splits out the renaming and comment updates from #129612 as a non-functional change.
2025-03-06 09:28:44 -08:00
Nikita Popov
cc539138ac
[CodeGen] Use __extendhfsf2 and __truncsfhf2 by default (#126880)
The standard libcalls for half to float and float to half conversion are
__extendhfsf2 and __truncsfhf2. However, LLVM currently uses
__gnu_h2f_ieee and __gnu_f2h_ieee instead. As far as I can tell, these
libcalls are an ARM-ism and only provided by libgcc on that platform.
compiler-rt always provides both libcalls.

Use the standard libcalls by default, and only use the __gnu libcalls on
ARM.
2025-02-19 10:16:57 +01:00
Shubham Sandeep Rastogi
92f916faba
Add a pass to collect dropped var statistics for MIR (#126686)
This patch attempts to reland
https://github.com/llvm/llvm-project/pull/120780 while addressing the
issues that caused the patch to be reverted.

Namely:

1. The patch had included code from the llvm/Passes directory in the
llvm/CodeGen directory.

2. The patch increased the backend compile time by 2% due to adding a
very expensive include in MachineFunctionPass.h

The patch has been re-structured so that there is no dependency between
the llvm/Passes and llvm/CodeGen directory, by moving the base class,
`class DroppedVariableStats` to the llvm/IR directory.

The expensive include in MachineFunctionPass.h has been changed to
contain forward declarations instead of other header includes which was
pulling a ton of code into MachineFunctionPass.h and should resolve any
issues when it comes to compile time increase.
2025-02-12 14:08:18 -08:00
Rahul Joshi
0f674cce82
[NFC][LLVM] Remove unused TargetIntrinsicInfo class (#126003)
Remove `TargetIntrinsicInfo` class as its practically unused (its pure
virtual with no subclasses) and its references in the code.
2025-02-10 14:56:30 -08:00
Alan Li
220004d2f8
[GISel] Add more FP opcodes to CSE (#123949)
Resubmit, previously PR has compilation issues.
2025-01-22 23:00:08 -08:00
Danial Klimkin
c938436f71
Revert "[GISel] Add more FP opcodes to CSE (#123624)" (#123954)
This reverts commit 43177b524ee06dfc09cbc357ff277d4f53f5dc15.
2025-01-22 16:21:05 +01:00
lialan
43177b524e
[GISel] Add more FP opcodes to CSE (#123624)
This fixes #122724
2025-01-22 06:20:42 -08:00
Mats Jun Larsen
97d691b4b3
[IR][unittests] Replace of PointerType::get(Type) with opaque version (NFC) (#123621)
In accordance with https://github.com/llvm/llvm-project/issues/123569
2025-01-21 17:40:18 +09:00
Simon Pilgrim
bacfdcd7e0
[DAG] Add SDPatternMatch::m_BitCast matcher (#123327)
Simplifies a future patch
2025-01-17 12:22:07 +00:00
Jameson Nash
f6b0555a43
[AsmPrinter] Reintroduce full AsmPrinterHandler API (#122297)
This restores the functionality of AsmPrinterHandlers to what it was
prior to https://github.com/llvm/llvm-project/pull/96785. The attempted
hack there of adding a duplicate DebugHandlerBase handling added a lot
of hidden state and assumptions, which just segfaulted when we tried to
continuing using this API. Instead, this just goes back to the old
design, but adds a separate array for the basic EH handles. The
duplicate array is identical to the other array of handler, but which
doesn't get their begin/endInstruction callbacks called. This still
saves the negligible but measurable amount of virtual function calls as
was the goal of #96785, while restoring the API to the pre-LLVM-19
status quo.
2025-01-16 17:00:06 +01:00
Amr Hesham
1d58699f5c
[SDPatternMatch] Add Matcher m_Undef (#122521)
Add Matcher `m_Undef`

Fixes: #122439
2025-01-11 13:23:37 +01:00
Thor Preimesberger
c1c50c7a3e
[SDPatternMatch] Add matchers m_ExtractSubvector and m_InsertSubvector (#120212)
Fixes #118846
2025-01-09 15:20:48 -08:00
Aidan Goldfarb
f3bc8c34c9
Add SD matchers and unit test coverage for ISD::VECTOR_SHUFFLE (#119592)
This PR resolves #118845. I aimed to mirror the implementation
`m_Shuffle()` in
[PatternMatch.h](https://github.com/llvm/llvm-project/blob/main/llvm/include/llvm/IR/PatternMatch.h).

Updated
[SDPatternMatch.h](https://github.com/llvm/llvm-project/blob/main/llvm/include/llvm/CodeGen/SDPatternMatch.h)
- Added `struct m_Mask` to match masks (`ArrayRef<int>`)
- Added two `m_Shuffle` functions. One to match independently of mask,
and one to match considering mask.
- Added `struct SDShuffle_match` to match `ISD::VECTOR_SHUFFLE`
considering mask

Updated
[SDPatternMatchTest.cpp](https://github.com/llvm/llvm-project/blob/main/llvm/unittests/CodeGen/SelectionDAGPatternMatchTest.cpp)
- Added `matchVecShuffle` test, which tests the behavior of both
`m_Shuffle()` functions

- - -

I am not sure if my test coverage is complete. I am not sure how to test
a `false` match, simply test against a different instruction? [Other
tests
](https://github.com/llvm/llvm-project/blob/main/llvm/unittests/CodeGen/SelectionDAGPatternMatchTest.cpp#L175),
such as for `VSelect`, test against `Select`. I am not sure if there is
an analogous instruction to compare against for `VECTOR_SHUFFLE`. I
would appreciate some pointers in this area. In general, please
liberally critique this PR!

---------

Co-authored-by: Aidan <aidan.goldfarb@mail.mcgill.ca>
2025-01-06 13:57:19 -05:00
Min-Yih Hsu
a74f825a7a
[MIPatternMatch] Add m_DeferredReg/Type (#121218)
This pattern does the same thing as m_SpecificReg/Type except the value
it matches against origniated from an earlier pattern in the same
mi_match expression.

This patch also changes how commutative patterns are handled: in order
to support m_DefferedReg/Type, we always have to run the LHS-pattern
before the RHS one.
2024-12-30 09:23:51 -08:00
Min-Yih Hsu
831e1ac12e
[MIPatternMatch] Add m_GUMin and m_GUMax (#121068)
And make all unsigned and signed versions of min/max matchers
commutative, since we already made a precedent of m_GAdd that is
commutative by default.
2024-12-26 09:28:17 -08:00
Min-Yih Hsu
d21f300f06
[MIPatternMatch] Fix incorrect argument type of m_Type (#121074)
m_Type is supposed to extract the underlying value type (equality type
comparison is covered by m_SpecificType), therefore it should take a LLT
reference as its argument rather than passing by value.

This was originated from de256478e61d6488db751689af82d280ba114a6f, which
refactored out a good chunk of LLT reference usages. And it's just so
happen that (for some reasons) no one is using m_Type and no test was
covering it.
2024-12-26 09:09:02 -08:00
Vikash Gupta
c21a3776c9
[GlobalIsel] [Utility] [NFC] Added isConstantOrConstantSplatVectorFP to handle float constants. (#120935)
Needed for #120104
2024-12-26 18:57:19 +05:30
NAKAMURA Takumi
d328d41061 Revert "Add a pass to collect dropped var stats for MIR (#120780)"
This reverts commit 3bf91ad2a9c75dd045961e45fdd830fd7b7a5455.
(llvmorg-20-init-16123-g3bf91ad2a9c7)

`llvm/CodeGen` should not depend on `llvm/Passes`.
2024-12-21 12:42:26 +09:00
Shubham Sandeep Rastogi
3bf91ad2a9
Add a pass to collect dropped var stats for MIR (#120780)
This patch uses the DroppedVariableStats class to add dropped variable
statistics for MIR passes.

Reland 1c082c9cd12efaa67a32c5da89a328c458ed51c5
2024-12-20 10:08:54 -08:00
Shubham Sandeep Rastogi
e7e622f153 Revert "Move DroppedVariableStats to CodeGen lib (#120650)"
This reverts commit 4307198d51487cc16f98eebb2113caf4a1905914.

Broke bot ppc64le-clang-multistage-test:

undefined reference to
`llvm::DroppedVariableStats::populateVarIDSetAndInlinedMap in
In function `llvm::DroppedVariableStatsIR::visitEveryInstruction
2024-12-19 19:59:34 -08:00
Shubham Sandeep Rastogi
4307198d51
Move DroppedVariableStats to CodeGen lib (#120650)
To get Dropped variable statistics for MIR, we need to move the base
class DroppedVariableStats code to the CodeGen library because we cannot
have CodeGen link against Passes.

Also moved the code for the virtual functions to the header because
clang/lib/CodeGen doesn't link against llvm/lib/CodeGen however it does
link against Passes which contains the `class StandardInstrumentations`
code but not the definition for the virtual functions leading to the
error about not finding vtable for `class DroppedVariableStatsIR`
2024-12-19 18:09:14 -08:00
Chris White
ecdf0dac56
[DAG] SDPatternMatch - Add m_ExtractElt and m_InsertElt matchers (#119430)
Resolves #118844
2024-12-13 15:36:53 -08:00
Shubham Sandeep Rastogi
077cc3deee Revert "Move DroppedVariableStatsIRTest.cpp to CodeGen folder"
This reverts commit 10ed7d94b52c21317a1e02ef1e2c3ff2b2d08301.

Revert "Reland 2de78815604e9027efd93cac27c517bf732587d2 (#119650)"

This reverts commit 0e80f9a1b51e0e068adeae1278d59cd7baacd5d8.

This is because the clang-ppc64le-linux-multistage bot breaks with error

undefined reference to `vtable for llvm::DroppedVariableStatsIR'
2024-12-11 23:10:14 -08:00
Shubham Sandeep Rastogi
10ed7d94b5 Move DroppedVariableStatsIRTest.cpp to CodeGen folder 2024-12-11 20:05:24 -08:00
Owen Anderson
6f3f08abdc
CodeGen: Eliminate dynamic relocations in the register superclass tables. (#119487)
This reapplies #119122 with a fix for UBSAN errors in the X86 backend
related
to incrementing a nullptr.
2024-12-12 10:17:32 +13:00
Owen Anderson
e940353fd2 Revert "CodeGen: Eliminate dynamic relocations in the register superclass tables. (#119122)"
Reverting due to UBSan failures in X86RegisterInfo::getLargestLegalSuperClass

This reverts commit c4873819a98f59ce4e2664f94c73c2dfec3393f8.
2024-12-11 13:45:17 +13:00
Owen Anderson
c4873819a9
CodeGen: Eliminate dynamic relocations in the register superclass tables. (#119122) 2024-12-11 12:36:51 +13:00
Jon Roelofs
b6c22a4e58
Add processor aliases back to -print-supported-cpus and -mcpu=help (#118581)
They were accidentally dropped in
https://github.com/llvm/llvm-project/pull/96249

rdar://140853882
2024-12-09 09:18:31 -08:00
Shubham Sandeep Rastogi
abc4183c73 Revert "Reland "[NFC] Move DroppedVariableStats to its own file and redesign it to be extensible (#118546)" (#119048)"
This reverts commit 37606b4c22654ab66eee8f89448a117f3534f2f4.

Broke the llvm-nvptx-nvidia-ubuntu bot with error: the vtable symbol may
 be undefined because the class is missing its key function
2024-12-06 23:19:39 -08:00
Shubham Sandeep Rastogi
37606b4c22
Reland "[NFC] Move DroppedVariableStats to its own file and redesign it to be extensible (#118546)" (#119048)
Move the virtual destructor definition to the cpp file and see if that
gets rid of the undefined vtable error.
2024-12-06 23:13:30 -08:00
Shubham Sandeep Rastogi
259bdc0033 Revert "Reland "[NFC] Move DroppedVariableStats to its own file and redesign it to be extensible. (#117042)" (#118546)"
This reverts commit 0c8928d456ac3ef23ed25bfc9e5d491dd7b62a11.

Broke Bot: https://lab.llvm.org/buildbot/#/builders/76/builds/5008

error: undefined reference to `vtable for llvm::DroppedVariableStatsIR'
2024-12-03 16:50:53 -08:00
Shubham Sandeep Rastogi
0c8928d456
Reland "[NFC] Move DroppedVariableStats to its own file and redesign it to be extensible. (#117042)" (#118546)
Removed the virtual destructor in the derived
class DroppedVariableStatsIR
2024-12-03 14:13:06 -08:00
Shubham Sandeep Rastogi
80987ef4b6 Revert "Reland [NFC] Move DroppedVariableStats to its own file and redesign it to be extensible. (#117042)"
This reverts commit acf3b1aa932b2237c181686e52bc61584a80a3ff.

Broke https://lab.llvm.org/buildbot/#/builders/76/builds/5002

tools/clang/lib/CodeGen/CMakeFiles/obj.clangCodeGen.dir/BackendUtil.cpp.o:(.toc+0x258): undefined reference to `vtable for llvm::DroppedVariableStatsIR'
2024-12-03 12:51:24 -08:00
Shubham Sandeep Rastogi
d8b5af4504 Revert "Reland "Add a pass to collect dropped var stats for MIR" (#117044)"
This reverts commit 249755cedb17ffa707253edcef1a388f807caa35.

Broke https://lab.llvm.org/buildbot/#/builders/160/builds/9420

Note: This is test shard 99 of 154.
[==========] Running 2 tests from 2 test suites.
[----------] Global test environment set-up.
[----------] 1 test from DroppedVariableStatsMIR
[ RUN      ] DroppedVariableStatsMIR.InlinedAt

--
exit: -11
2024-12-03 12:50:13 -08:00
Shubham Sandeep Rastogi
249755cedb
Reland "Add a pass to collect dropped var stats for MIR" (#117044)
Moved the MIR Test to the unittests/CodeGen folder

This is patch is part of a stack of patches, and follows
https://github.com/llvm/llvm-project/pull/117042

I moved the MIR test to the unittests/CodeGen folder 

I am trying to reland https://github.com/llvm/llvm-project/pull/115566
2024-12-03 12:37:30 -08:00
Shubham Sandeep Rastogi
acf3b1aa93
Reland [NFC] Move DroppedVariableStats to its own file and redesign it to be extensible. (#117042)
Moved the IR unit test to the CodeGen folder to resolve linker errors:

`error: undefined reference to 'vtable for
llvm::DroppedVariableStatsIR'`

This patch is trying to reland
https://github.com/llvm/llvm-project/pull/115563
2024-12-03 10:39:40 -08:00
Matin Raayai
bb3f5e1fed
Overhaul the TargetMachine and LLVMTargetMachine Classes (#111234)
Following discussions in #110443, and the following earlier discussions
in https://lists.llvm.org/pipermail/llvm-dev/2017-October/117907.html,
https://reviews.llvm.org/D38482, https://reviews.llvm.org/D38489, this
PR attempts to overhaul the `TargetMachine` and `LLVMTargetMachine`
interface classes. More specifically:
1. Makes `TargetMachine` the only class implemented under
`TargetMachine.h` in the `Target` library.
2. `TargetMachine` contains target-specific interface functions that
relate to IR/CodeGen/MC constructs, whereas before (at least on paper)
it was supposed to have only IR/MC constructs. Any Target that doesn't
want to use the independent code generator simply does not implement
them, and returns either `false` or `nullptr`.
3. Renames `LLVMTargetMachine` to `CodeGenCommonTMImpl`. This renaming
aims to make the purpose of `LLVMTargetMachine` clearer. Its interface
was moved under the CodeGen library, to further emphasis its usage in
Targets that use CodeGen directly.
4. Makes `TargetMachine` the only interface used across LLVM and its
projects. With these changes, `CodeGenCommonTMImpl` is simply a set of
shared function implementations of `TargetMachine`, and CodeGen users
don't need to static cast to `LLVMTargetMachine` every time they need a
CodeGen-specific feature of the `TargetMachine`.
5. More importantly, does not change any requirements regarding library
linking.

cc @arsenm @aeubanks
2024-11-14 13:30:05 -08:00
Phoebe Wang
c72a751dab
[X86][AMX] Support AMX-TRANSPOSE (#113532)
Ref.: https://cdrdv2.intel.com/v1/dl/getContent/671368
2024-11-01 16:45:03 +08:00
Yingwei Zheng
cf9d1c1486
[SDAG] Simplify SDNodeFlags with bitwise logic (#114061)
This patch allows using enumeration values directly and simplifies the
implementation with bitwise logic. It addresses the comment in
https://github.com/llvm/llvm-project/pull/113808#discussion_r1819923625.
2024-10-31 08:10:07 +08:00
David Green
83ae171722
[AArch64] Add ComputeNumSignBits for VASHR. (#113957)
As with a normal ISD::SRA node, they take the number of sign bits of the
incoming value and increase it by the shifted amount.
2024-10-29 21:02:32 +00:00
Alex Rønne Petersen
ad4a582fd9
[llvm] Consistently respect naked fn attribute in TargetFrameLowering::hasFP() (#106014)
Some targets (e.g. PPC and Hexagon) already did this. I think it's best
to do this consistently so that frontend authors don't run into
inconsistent results when they emit `naked` functions. For example, in
Zig, we had to change our emit code to also set `frame-pointer=none` to
get reliable results across targets.

Note: I don't have commit access.
2024-10-18 09:35:42 +04:00
Simon Pilgrim
49fa91edf7 [DAG] SDPatternMatch - add missing ROTL/ROTR matchers 2024-10-16 11:57:18 +01:00
Simon Pilgrim
d3d2d72549 [DAG] SDPatternMatch - add missing BSWAP/CTPOP/CTTZ matchers 2024-10-16 11:52:58 +01:00
c8ef
854ded9b24
Reapply "[DAG] Enhance SDPatternMatch to match integer minimum and maximum patterns in addition to the existing ISD nodes." (#112203)
This patch adds icmp+select patterns for integer min/max matchers in
SDPatternMatch, similar to those in IR PatternMatch.

Reapply #111774.

Closes #108218.
2024-10-15 21:07:06 +08:00