11 Commits

Author SHA1 Message Date
Simon Pilgrim
e9f9467da0 [X86] X86FixupInstTunings - add VPERMILPDri -> VSHUFPDrri mapping
Similar to the original VPERMILPSri -> VSHUFPSrri mapping added in D143787, replacing VPERMILPDri -> VSHUFPDrri should never be any slower and saves an encoding byte.

The sibling VPERMILPDmi -> VPSHUFDmi mapping is trickier as we need the same shuffle mask in every lane (and it needs to be adjusted) - I haven't attempted that yet but we can investigate it in the future if there's interest.

Fixes #61060

Differential Revision: https://reviews.llvm.org/D148999
2023-04-23 11:48:50 +01:00
Simon Pilgrim
2347276673 [X86] X86FixupInstTuning.cpp - fix comment in ProcessVPERMILPSri. NFC.
PERMILPS is only available on AVX or later (VEX/EVEX encoding)
2023-04-23 10:32:17 +01:00
Noah Goldstein
d65720652d [X86] Add inst fixup for unpckps -> unpckdq.
`unpckps` has the same performance as `unpckpd` (only port5) wereas
`unpckdq` can run on p15 on some newer architectures.

`unpckdq` is in the integer domain, so only do the transform if the
target has no bypass delay on shuffles (SKL+).

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D147729
2023-04-10 00:17:00 -05:00
Noah Goldstein
c3f01f13b1 [X86] Add inst fixup for unpckpd -> unpckqdq.
`unpckqdq` seems to be treated as a shuffle from bypass delay
perspective (which makes sense it appears to have shared shuffle units
for all micro-arch).

`unpckqdq` is slightly preferable to `shufpd` as it saves 1-byte of
code size and can be used to replace the micro-fused `rm` version. So,
if the target has no bypass delay, we should do `unpckpd` ->
`unpckqdq` instead of `shufpd.

Reviewed By: pengfei

Differential Revision: https://reviews.llvm.org/D147728
2023-04-10 00:16:57 -05:00
Noah Goldstein
2ce1698a34 [X86] Fix perf bug in permilps -> shufd in X86FixupInstTuning.
We shouldn't do the transformation if we either have bypass delay OR
the new opcode has worse performance. Previous code was incorrectly
using AND.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D147727
2023-04-10 00:16:54 -05:00
Phoebe Wang
2ffdfb5f9d [X86] Fix problem in D147541
Differential Revision: https://reviews.llvm.org/D147775
2023-04-07 22:02:16 +08:00
Noah Goldstein
fd347ceac4 [X86] Add InstFixup for masked unpck{l|h}pd -> masked shufpd
This is a follow up D147507 which removed the prior transformation to
`shufps` which was incorrect as the mask was for 64-bit double
elements, not 32-bit float elements. Using `shufpd` for the
replacement, however, preserves the mask semantics and has the same
benefits as `shufps`.

Reviewed By: pengfei, RKSimon

Differential Revision: https://reviews.llvm.org/D147541
2023-04-06 01:36:42 -05:00
Phoebe Wang
f7deb69f22 [X86] Disable masked UNPCKLPD/UNPCKHPD -> SHUFPS transformation
UNPCKLPD/UNPCKHPD is a 64-bit element operation. The masked version
doesn't match SHUFPS in lanes.
This reverts part of D144763.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D147507
2023-04-04 15:55:38 +08:00
Noah Goldstein
8ac8c579e2 [X86] Add masked predicate execution variants for instructions in X86FixupInstTuning
Masked variants of UNPCKLPD, UNPCKHPD, and PERMILPS were missing and
be transformed with the same logic as their non-masked counterparts.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D144763
2023-03-08 11:57:41 -06:00
Noah Goldstein
6b29a6f27d [X86] Add support for using Sched/Codesize information to X86FixupInstTuning Pass.
Use this to handle new transform: `{v}unpck{l|h}pd` -> `{v}shufps`. We
need the sched information here as `{v}shufps` is 1 more byte of code
size, so we only want to make this transformation if `{v}shufps` is
actually faster.

Differential Revision: https://reviews.llvm.org/D144570
2023-03-08 11:57:38 -06:00
Noah Goldstein
69a322fed1 Add new pass X86FixupInstTuning for fixing up machine-instruction selection.
There are a variety of cases where we want more control over the exact
instruction emitted. This commit creates a new pass to fixup
instructions after the DAG has been lowered. The pass is only meant to
replace instructions that are guranteed to be interchangable, not to
do analysis for special cases.

Handling these instruction changes in in X86ISelLowering of
X86ISelDAGToDAG isn't ideal, as its liable to either break existing
patterns that expected a certain instruction or generate infinite
loops.

As well, operating as the MachineInstruction level allows us to access
scheduling/code size information for making the decisions.

Currently only implements `{v}permilps` -> `{v}shufps/{v}shufd` but
more transforms can be added.

Differential Revision: https://reviews.llvm.org/D143787
2023-02-27 18:53:25 -06:00