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590 Commits

Author SHA1 Message Date
Chris Lattner
41e423a6f5 fix this to use a valid triple. 
llvm-svn: 45509
 2008-01-02 22:21:45 +00:00
Chris Lattner
5d998c5712 verify that aligned common support doesn't break. 
llvm-svn: 45495
 2008-01-02 19:48:24 +00:00
Duncan Sands
57a60f0466 Fix PR1833 - eh.exception and eh.selector return two 
values, which means doing extra legalization work.
It would be easier to get this kind of thing right if
there was some documentation...

llvm-svn: 45472
 2007-12-31 18:35:50 +00:00
Chris Lattner
d2b8a36f0e One readme entry is done, one is really easy (Evan, want to investigate 
eliminating the llvm.x86.sse2.loadl.pd intrinsic?), one shuffle optzn
may be done (if shufps is better than pinsw, Evan, please review), and
we already know about LICM of simple instructions.

llvm-svn: 45407
 2007-12-29 19:31:47 +00:00
Chris Lattner
0d90c8f016 upgrade this test 
llvm-svn: 45406
 2007-12-29 19:24:06 +00:00
Chris Lattner
3b6a82118b Fold comparisons against a constant nan, and optimize ORD/UNORD 
comparisons with a constant.  This allows us to compile isnan to:

_foo:
	fcmpu cr7, f1, f1
	mfcr r2
	rlwinm r3, r2, 0, 31, 31
	blr 

instead of:

LCPI1_0:					;  float
	.space	4
_foo:
	lis r2, ha16(LCPI1_0)
	lfs f0, lo16(LCPI1_0)(r2)
	fcmpu cr7, f1, f0
	mfcr r2
	rlwinm r3, r2, 0, 31, 31
	blr 

llvm-svn: 45405
 2007-12-29 08:37:08 +00:00
Chris Lattner
33de0c6e92 this xform is implemented. 
llvm-svn: 45404
 2007-12-29 08:19:39 +00:00
Chris Lattner
07ccbfa64a Codegen: 
as:

_bar:
	pushl	%esi
	subl	$8, %esp
	movl	16(%esp), %esi
	call	L_foo$stub
	fstps	(%esi)
	addl	$8, %esp
	popl	%esi
	#FP_REG_KILL
	ret

instead of:

_bar:
	pushl	%esi
	subl	$8, %esp
	movl	16(%esp), %esi
	call	L_foo$stub
	fstpl	(%esi)
	cvtsd2ss	(%esi), %xmm0
	movss	%xmm0, (%esi)
	addl	$8, %esp
	popl	%esi
	#FP_REG_KILL
	ret

llvm-svn: 45401
 2007-12-29 06:57:38 +00:00
Chris Lattner
8013bd339b avoid going through a stack slot to convert from fpstack to xmm reg 
if we are just going to store it back anyway.  This improves things 
like:
double foo();
void bar(double *P) { *P = foo(); }

llvm-svn: 45399
 2007-12-29 06:41:28 +00:00
Chris Lattner
bc13df19a8 one fewer uncond branch with my codegenprepare hack for single-mbb backedges. 
llvm-svn: 45360
 2007-12-26 17:23:47 +00:00
Gordon Henriksen
d89e645c38 Tests for changes made in r45356, where IPO optimizations would drop 
collector algorithms.

llvm-svn: 45357
 2007-12-26 02:47:37 +00:00
Gordon Henriksen
b969c5981b GC poses hazards to the inliner. Consider: 
define void @f() {
            ...
            call i32 @g()
            ...
    }

    define void @g() {
            ...
    }

The hazards are:

  - @f and @g have GC, but they differ GC. Inlining is invalid. This
    may never occur.
  - @f has no GC, but @g does. g's GC must be propagated to @f.

The other scenarios are safe:

  - @f and @g have the same GC.
  - @f and @g have no GC.
  - @g has no GC.

This patch adds inliner checks for the former two scenarios.

llvm-svn: 45351
 2007-12-25 03:10:07 +00:00
Gordon Henriksen
fb56bde933 Noting and enforcing that GC intrinsics are valid only within a 
function with GC.

This will catch the error when the inliner inlines a function with
GC into a caller with no GC.

llvm-svn: 45350
 2007-12-25 02:31:26 +00:00
Gordon Henriksen
9157c499fc Adjusting verification of "llvm.gc*" intrinsic prototypes to match 
LangRef.

llvm-svn: 45349
 2007-12-25 02:02:10 +00:00
Evan Cheng
ddc9af11f0 Remove xfail. This is fixed. 
llvm-svn: 45254
 2007-12-20 02:25:21 +00:00
Scott Michel
5f1470f03a More working CellSPU tests: 
- vec_const.ll: Vector constant loads
- immed64.ll: i64, f64 constant loads

llvm-svn: 45242
 2007-12-20 00:44:13 +00:00
Scott Michel
5ecac82f71 CellSPU testcase, extract_elt.ll: extract vector element. 
llvm-svn: 45219
 2007-12-19 21:17:42 +00:00
Scott Michel
a246e09aa0 More working CellSPU test cases: 
- call.ll: Function call
- ctpop.ll: Count population
- dp_farith.ll: DP arithmetic
- eqv.ll: Equivalence primitives
- fcmp.ll: SP comparisons
- fdiv.ll: SP division
- fneg-fabs.ll: SP negation, aboslute value
- int2fp.ll: Integer -> SP conversion
- rotate_ops.ll: Rotation primitives
- select_bits.ll: (a & c) | (b & ~c) bit selection
- shift_ops.ll: Shift primitives
- sp_farith.ll: SP arithmentic

llvm-svn: 45217
 2007-12-19 20:50:49 +00:00
Scott Michel
098c113bc8 Two more test cases: or_ops.ll (arithmetic or operations) and vecinsert.ll 
(vector insertions)

llvm-svn: 45216
 2007-12-19 20:15:47 +00:00
Scott Michel
9b834469e0 Add new immed16.ll test case, fix CellSPU errata to make test case work. 
llvm-svn: 45196
 2007-12-19 07:35:06 +00:00
Evan Cheng
483a969ece Fix PR1872: SrcValue and SrcValueOffset should not be used to compute load / store node id. 
llvm-svn: 45167
 2007-12-18 19:38:14 +00:00
Evan Cheng
91e0fc9cb4 FIX for PR1799: When a load is unfolded from an instruction, check if it is a new node. If not, do not create a new SUnit. 
llvm-svn: 45157
 2007-12-18 08:42:10 +00:00
Scott Michel
8172f85e2f i32 immediate constant test case for CellSPU 
llvm-svn: 45134
 2007-12-17 23:45:52 +00:00
Scott Michel
c5cccb9e60 - Restore some i8 functionality in CellSPU 
- New test case: nand.ll

llvm-svn: 45130
 2007-12-17 22:32:34 +00:00
Duncan Sands
b5a79d0eaa Make invokes of inline asm legal. Teach codegen 
how to lower them (with no attempt made to be
efficient, since they should only occur for
unoptimized code).

llvm-svn: 45108
 2007-12-17 18:08:19 +00:00
Evan Cheng
23d2d4dc6c Make better use of instructions that clear high bits; fix various 2-wide shuffle bugs. 
llvm-svn: 45058
 2007-12-15 03:00:47 +00:00
Scott Michel
0aa7133f82 Start committing working test cases for CellSPU. 
llvm-svn: 45050
 2007-12-15 00:38:50 +00:00
Evan Cheng
0e6408124e Fix ctlz and cttz. llvm definition requires them to return number of bits in of the src type when value is zero. 
llvm-svn: 45029
 2007-12-14 08:30:15 +00:00
Evan Cheng
e9fbc3f014 Implement ctlz and cttz with bsr and bsf. 
llvm-svn: 45024
 2007-12-14 02:13:44 +00:00
Evan Cheng
37c36ed79a Be extra careful with extension use optimation. Now turned on by default. 
llvm-svn: 44981
 2007-12-13 03:32:53 +00:00
Evan Cheng
827d30db19 Fold some and + shift in x86 addressing mode. 
llvm-svn: 44970
 2007-12-13 00:43:27 +00:00
Evan Cheng
6e68381e02 Implicit def instructions, e.g. X86::IMPLICIT_DEF_GR32, are always re-materializable and they should not be spilled. 
llvm-svn: 44960
 2007-12-12 23:12:09 +00:00
Dan Gohman
7a7742c2fe Allow vector integer constants to be created with 
SelectionDAG::getConstant, in the same way as vector floating-point
constants. This allows the legalize expansion code for @llvm.ctpop and
friends to be usable with vector types.

llvm-svn: 44954
 2007-12-12 22:21:26 +00:00
Evan Cheng
0f42730722 Use shuffles to implement insert_vector_elt for i32, i64, f32, and f64. 
llvm-svn: 44929
 2007-12-12 07:55:34 +00:00
Evan Cheng
0a1254f634 Add a test case for -optimize-ext-uses. 
llvm-svn: 44928
 2007-12-12 07:54:08 +00:00
Evan Cheng
2a98956796 Lower a build_vector with all constants into a constpool load unless it can be done with a move to low part. 
llvm-svn: 44921
 2007-12-12 06:45:40 +00:00
Evan Cheng
4fbf459549 - Improved v8i16 shuffle lowering. It now uses pshuflw and pshufhw as much as 
possible before resorting to pextrw and pinsrw.
- Better codegen for v4i32 shuffles masquerading as v8i16 or v16i8 shuffles.
- Improves (i16 extract_vector_element 0) codegen by recognizing
  (i32 extract_vector_element 0) does not require a pextrw.

llvm-svn: 44836
 2007-12-11 01:46:18 +00:00
Christopher Lamb
d202e03fe5 Improve branch folding by recgonizing that explict successor relationships impact the value of fall-through choices. 
llvm-svn: 44785
 2007-12-10 07:24:06 +00:00
Gordon Henriksen
71183b6739 Adding a collector name attribute to Function in the IR. These 
methods are new to Function:

  bool hasCollector() const;
  const std::string &getCollector() const;
  void setCollector(const std::string &);
  void clearCollector();

The assembly representation is as such:

  define void @f() gc "shadow-stack" { ...

The implementation uses an on-the-side table to map Functions to 
collector names, such that there is no overhead. A StringPool is 
further used to unique collector names, which are extremely
likely to be unique per process.

llvm-svn: 44769
 2007-12-10 03:18:06 +00:00
Gordon Henriksen
ad80af9677 Upgrading this test to 2.0 .ll syntax. 
llvm-svn: 44738
 2007-12-09 15:03:01 +00:00
Chris Lattner
f47015bc74 Fix a significant code quality regression I introduced on PPC64 quite 
a while ago.  We now produce:

_foo:
	mflr r0
	std r0, 16(r1)
	ld r2, 16(r1)
	std r2, 0(r3)
	ld r0, 16(r1)
	mtlr r0
	blr 

instead of:

_foo:
	mflr r0
	std r0, 16(r1)
	lis r0, 0
	ori r0, r0, 16
	ldx r2, r1, r0
	std r2, 0(r3)
	ld r0, 16(r1)
	mtlr r0
	blr 

for:

void foo(void **X) {
  *X = __builtin_return_address(0);
}

on ppc64.

llvm-svn: 44701
 2007-12-08 07:04:58 +00:00
Chris Lattner
f6a8156e4f implement __builtin_return_addr(0) on ppc. 
llvm-svn: 44700
 2007-12-08 06:59:59 +00:00
Evan Cheng
bfd373a53e Much improved v8i16 shuffles. (Step 1). 
llvm-svn: 44676
 2007-12-07 08:07:39 +00:00
Evan Cheng
26593a04db New test case. 
llvm-svn: 44672
 2007-12-07 01:48:46 +00:00
Evan Cheng
5cb41390ab Fix a bogus test case. 
llvm-svn: 44668
 2007-12-06 22:12:45 +00:00
Evan Cheng
8393dc7378 Turning simple splitting on. Start testing new coalescer heuristics as new llcbeta. 
llvm-svn: 44660
 2007-12-06 08:54:31 +00:00
Chris Lattner
eedaf92fcf third time around: instead of disabling this completely, 
only disable it if we don't know it will be obviously profitable.
Still fixme, but less so. :)

llvm-svn: 44658
 2007-12-06 07:47:55 +00:00
Chris Lattner
b5fdfb9612 Actually, disable this code for now. More analysis and improvements to 
the X86 backend are needed before this should be enabled by default.

llvm-svn: 44657
 2007-12-06 07:44:31 +00:00
Chris Lattner
7c709a5d08 implement a readme entry, compiling the code into: 
_foo:
	movl	$12, %eax
	andl	4(%esp), %eax
	movl	_array(%eax), %eax
	ret

instead of:

_foo:
	movl	4(%esp), %eax
	shrl	$2, %eax
	andl	$3, %eax
	movl	_array(,%eax,4), %eax
	ret

As it turns out, this triggers all the time, in a wide variety of
situations, for example, I see diffs like this in various programs:

-       movl    8(%eax), %eax
-       shll    $2, %eax
-       andl    $1020, %eax
-       movl    (%esi,%eax), %eax
+       movzbl  8(%eax), %eax
+       movl    (%esi,%eax,4), %eax


-       shll    $2, %edx
-       andl    $1020, %edx
-       movl    (%edi,%edx), %edx
+       andl    $255, %edx
+       movl    (%edi,%edx,4), %edx

Unfortunately, I also see stuff like this, which can be fixed in the
X86 backend:

-       andl    $85, %ebx
-       addl    _bit_count(,%ebx,4), %ebp
+       shll    $2, %ebx
+       andl    $340, %ebx
+       addl    _bit_count(%ebx), %ebp

llvm-svn: 44656
 2007-12-06 07:33:36 +00:00
Chris Lattner
dfa39289a5 fix this when run on non x86 hosts. 
llvm-svn: 44645
 2007-12-06 01:05:52 +00:00