7224 Commits

Author SHA1 Message Date
Sanjay Patel
7d3a37a4b4 [InstCombine] add tests for demanded bits of sub; NFC 2022-10-26 17:23:33 -04:00
Sanjay Patel
1bd856fbe5 [InstCombine] add tests for demanded bits of sub; NFC 2022-10-26 14:04:46 -04:00
Matt Arsenault
8acddef90d SimplifyLibCalls: Add missing testcase for sincospi
Part of issue 58604. Test should have been part of
50fe87a5c8597eb72e6055356fa7dad364756ff7
2022-10-25 17:06:08 -07:00
zhongyunde
620cff096a [InstCombine] Fold series of instructions into mull for more types
Relax the constraint of wide/vectors types.
Address the comment https://reviews.llvm.org/D136015?id=469189#inline-1314520

Reviewed By: spatel, chfast
Differential Revision: https://reviews.llvm.org/D136661
2022-10-25 23:04:46 +08:00
Sanjay Patel
5dcfc32822 [InstCombine] allow more commutative matches for logical-and to select fold
This is a sibling transform to the fold just above it. That was changed
to allow the corresponding commuted patterns with:
307307456277
e1bd759ea567
8628e6df7000
2022-10-24 16:40:43 -04:00
Philip Reames
c782a93773 [Instcombine] Add coverage for demanded bits of insertelement 2022-10-24 13:17:33 -07:00
Craig Topper
1edc51b56a [InstCombine] Explicitly check for scalable TypeSize.
Instead of assuming it is a fixed size.

Reviewed By: peterwaller-arm

Differential Revision: https://reviews.llvm.org/D136517
2022-10-24 12:29:06 -07:00
zhongyunde
81713e893a [InstCombine] Fold series of instructions into mull
The following sequence should be folded into in0 * in1
      In0Lo = in0 & 0xffffffff; In0Hi = in0 >> 32;
      In1Lo = in1 & 0xffffffff; In1Hi = in1 >> 32;
      m01 = In1Hi * In0Lo; m10 = In1Lo * In0Hi; m00 = In1Lo * In0Lo;
      addc = m01 + m10;
      ResLo = m00 + (addc >> 32);

Reviewed By: spatel, RKSimon
Differential Revision: https://reviews.llvm.org/D136015
2022-10-25 01:09:37 +08:00
Ahmed Bougacha
bddd9b6b91 [InstCombine] Combine ptrauth sign/resign + auth/resign intrinsics.
(sign|resign) + (auth|resign) can be folded by omitting the middle
sign+auth component if the key and discriminator match.

Differential Revision: https://reviews.llvm.org/D132383
2022-10-24 08:03:14 -07:00
Sanjay Patel
56c6b612ae [InstCombine] vary commuted patterns for mul fold; NFC
Try to get better coverage for the pattern-matching
possibilities in D136015.
2022-10-24 09:14:46 -04:00
Sanjay Patel
41c42f5b18 [InstCombine] adjust mul tests to avoid reliance on other folds; NFC
This gets the tests closer to the form that we are
trying to test in D136015. Note that the IR has
changed, but the check lines have not changed.

This also shows that the desired commuted pattern
coverage is not as expected.
2022-10-24 09:14:46 -04:00
Benjamin Maxwell
fc28971fb9 Add nocapture to pointer parameters of masked stores/loads
The lack of this attribute (particularly on the load intrinsics)
prevented InstCombine from optimizing away allocas and memcpys
for arrays that could be read directly from rodata.

This now also includes a new test to check the masked load/store
intrinsics have the expected attributes (specifically nocapture).

Differential Revision: https://reviews.llvm.org/D135656
2022-10-24 11:15:55 +00:00
zhongyunde
770d5e89ba [tests] precommit tests for D136015
Address the commit https://reviews.llvm.org/D136015#inline-1313479

Reviewed By: spatel
Differential Revision: https://reviews.llvm.org/D136340
2022-10-23 21:36:43 +08:00
Mike Hommey
86e57e66da [InstCombine] Bail out of casting calls when a conversion from/to byval is involved.
Fixes #58307

Reviewed By: nikic

Differential Revision: https://reviews.llvm.org/D135738
2022-10-23 09:49:48 +02:00
Sanjay Patel
8628e6df70 [InstCombine] use freeze to enable poison-safe logic->select fold
Without a freeze, this transform can leak poison to the output:
https://alive2.llvm.org/ce/z/GJuF9i

This makes the transform as uniform as possible, and it can help
reduce patterns like issue #58313 (although that particular
example probably still needs another transform).

Differential Revision: https://reviews.llvm.org/D136527
2022-10-22 10:42:14 -04:00
Sanjay Patel
db40f9b774 [InstCombine] add test for logical-ands to select; NFC 2022-10-22 10:42:14 -04:00
Paweł Bylica
119c34e7f9
[InstCombine][test] Add tests for mul combinations
Tests taken from https://reviews.llvm.org/D56214 and ported to
InstCombine for https://reviews.llvm.org/D136015.
2022-10-22 16:25:50 +02:00
Sanjay Patel
e1bd759ea5 [InstCombine] allow more matches for logical-ands --> select
This allows patterns with real 'and' instructions because
those are safe to transform:
https://alive2.llvm.org/ce/z/7-U_Ak
2022-10-22 08:15:50 -04:00
Sanjay Patel
3073074562 [InstCombine] allow more commutative matches for logical-and to select fold
When the common value is part of either select condition,
this is safe to reduce. Otherwise, it is not poison-safe
(with the select form of the pattern):
https://alive2.llvm.org/ce/z/FxQTzB

This is another patch motivated by issue #58313.
2022-10-21 13:29:13 -04:00
Sanjay Patel
d7fecf26f4 [InstCombine] allow some commutative matches for logical-and to select fold
This is obviously correct for real logic instructions,
and it also works for the poison-safe variants that use
selects:
https://alive2.llvm.org/ce/z/wyHiwX

This is motivated by the lack of 'xor' folding seen in issue #58313.
This more general fold should help reduce some of those patterns,
but I'm not sure if this specific case does anything for that
particular example.
2022-10-21 11:28:38 -04:00
Bjorn Pettersson
211cf8a384 [test] Use -passes in more Transforms tests
Another step towards getting rid of dependencies to the legacy
pass manager.

Primary change here is to just do -passes=foo instead of -foo in
simple situations (when running a single transform pass). But also
updated a few test running multiple passes.

Also removed some "duplicated" RUN lines in a few tests that where
using both -foo and -passes=foo syntax. No need to do the same kind
of testing twice.
2022-10-21 17:02:02 +02:00
Philip Reames
656e53e544 [instcombine] Add basic test coverage for demanded bits of scalable vectors 2022-10-21 07:59:04 -07:00
Sanjay Patel
bf75e937bb [InstCombine] match logical and/or more generally in fold to select
This allows the regular bitwise logic opcodes in addition to the
poison-safe select variants:
https://alive2.llvm.org/ce/z/8xB9gy

Handling commuted variants safely is likely trickier, so that's
left to another patch.
2022-10-21 09:03:36 -04:00
Sanjay Patel
5a53fe846b [InstCombine] add tests for logical selects; NFC 2022-10-21 09:03:35 -04:00
William Huang
6c767cef5a [InstCombine] Canonicalize GEP of GEP by swapping constant-indexed GEP to the back
Canonicalize GEP of GEP by swapping GEP with some suffix constant indices to the back (and GEP with all constant indices to the back of that), this allows more constant index GEP merging to happen. Exceptions are: If swapping violates use-def relations, or anti-optimizes LICM

For constant indexed GEP of GEP, if they cannot be merged directly, they will be casted to i8* and merged.

Reviewed By: nikic

Differential Revision: https://reviews.llvm.org/D125845
2022-10-20 17:41:26 +00:00
Nabeel Omer
e1fd6d49a3 [InstCombine] Fix assert condition in foldSelectShuffleOfSelectShuffle
Bug introduced in e239198cdbbf.

The assert() is making an assumption that the resulting shuffle mask
will always select elements from both vectors, this is untrue in the
case of two shuffles being folded if the former shuffle has a mask with
undef elements in it. In such a case folding the shuffles might result
in a mask which only selects from one of the vectors because the other
elements (in the mask) are undef.

Differential Revision: https://reviews.llvm.org/D136256
2022-10-20 12:10:54 +00:00
Sanjay Patel
44b7da89d7 [InstCombine] fmul nnan X, 0.0 --> copysign(0.0, X)
https://alive2.llvm.org/ce/z/ybgM5F

Differential Revision: https://reviews.llvm.org/D136166
2022-10-18 11:34:02 -04:00
uabkaka
da137d041b [SimplifyLibCalls] Add NoUndef/NonNull/Dereferenceable attributes to iprintf/siprintf
When SimplifyLibCalls fail to optimize printf and sprintf it add
NoUndef/NonNull/Dereferenceable attributes. This patch add the same attributes
if SimplifyLibCalls optimize printf/sprintf into the integer only
iprintf/siprintf.

Reviewed By: nikic

Differential Revision: https://reviews.llvm.org/D136140
2022-10-18 16:36:35 +02:00
Sanjay Patel
149379d538 [InstCombine] add tests for fmul nnan with 0.0; NFC 2022-10-18 10:20:08 -04:00
Daniel Sanders
021e6e05d3 [instsimplify] Move (extelt (inselt Vec, Value, Index), Index) -> Value from InstCombine
As requested in https://reviews.llvm.org/D135625#3858141

Differential Revision: https://reviews.llvm.org/D136099
2022-10-17 15:22:06 -07:00
Nikita Popov
779fd39684 Reapply [InstCombine] Switch foldOpIntoPhi() to use InstSimplify
Relative to the previous attempt, this is rebased over the
InstSimplify fix in ac74e7a7806480a000c9a3502405c3dedd8810de,
which addresses the miscompile reported in PR58401.

-----

foldOpIntoPhi() currently only folds operations into the phi if all
but one operands constant-fold. The two exceptions to this are freeze
and select, where we allow more general simplification.

This patch makes foldOpIntoPhi() generally simplification based and
removes all the instruction-specific logic. We just try to simplify
the instruction for each operand, and for the (potentially) one
non-simplified operand, we move it into the new block with adjusted
operands.

This fixes https://github.com/llvm/llvm-project/issues/57448, which
was my original motivation for the change.

Differential Revision: https://reviews.llvm.org/D134954
2022-10-17 16:11:05 +02:00
Nikita Popov
291924a6f9 [InstCombine] Add test for PR58401 (NFC) 2022-10-17 15:36:54 +02:00
Florian Hahn
699396131f
Revert "Reapply [InstCombine] Switch foldOpIntoPhi() to use InstSimplify"
This reverts commit 333246b48ea4a70842e78c977cc92d365720465f.

It looks like this patch causes a mis-compile:
https://github.com/llvm/llvm-project/issues/58401

Fixes #58401.
2022-10-17 12:56:28 +01:00
Max Kazantsev
95935d3f6d [Test] Add tests showing that instcombine does not deal with freeze(load !range) 2022-10-17 12:08:49 +07:00
Max Kazantsev
221411ea12 [Test][NFC] Regenerate test check using update_tests script 2022-10-17 12:07:46 +07:00
Sanjay Patel
e5ee0b06d6 [InstCombine] try to determine "exact" for sdiv
If the divisor is a power-of-2 or negative-power-of-2 and the dividend
is known to have >= trailing zeros than the divisor, the division is exact:
https://alive2.llvm.org/ce/z/UGBksM (general proof)
https://alive2.llvm.org/ce/z/D4yPS- (examples based on regression tests)

This isn't the most direct optimization (we could create ashr in these
examples instead of relying on existing folds for exact divides), but
it's possible that there's a more general constraint than just a pow2
divisor, so this might be extended in the future.

This should solve issue #58348.

Differential Revision: https://reviews.llvm.org/D135970
2022-10-16 10:59:56 -04:00
Sanjay Patel
78e3aeda3c [InstCombine] add tests for sdiv with (neg)pow2 divisor; NFC 2022-10-16 10:59:56 -04:00
Sanjay Patel
d85505a932 [InstCombine] fold logical and/or to xor
(A | B) & ~(A & B) --> A ^ B

https://alive2.llvm.org/ce/z/qpFMns

We already have the equivalent fold for real
logic instructions, but this pattern may occur
with selects too.

This is part of solving issue #58313.
2022-10-13 16:12:20 -04:00
Sanjay Patel
b78306c9f7 [InstCombine] add tests for logical select xor folds; NFC
issue #58313
2022-10-13 16:12:20 -04:00
Benjamin Maxwell
14b9505be9 Add test to show missed optimization for masked load/stores
This test shows instcombine failing to remove a alloca and memcpy for
for a constant array that is read with a masked load.

This will be addressed in a subsequent commit.
2022-10-12 17:43:54 +00:00
Sanjay Patel
23fa3031ff [InstCombine] add test for udiv with shl divisor; NFC
This would solve an example from issue #58137 more
generally, but it may require adding a canonicalization
for shift + shift to shift + add.
2022-10-12 11:53:02 -04:00
Sanjay Patel
7b9482df3d [InstCombine] fold sdiv with common shl amount in operands
(X << Z) / (Y << Z) --> X / Y

https://alive2.llvm.org/ce/z/CLKzqT

This requires a surprising "nuw" constraint because we have
to guard against immediate UB via signed-div overflow with
-1 divisor.

This extends 008a89037a49ca0d9 and is another transform
derived from issue #58137.
2022-10-12 11:32:15 -04:00
Sanjay Patel
008a89037a [InstCombine] fold udiv with common shl amount in operands
(X << Z) / (Y << Z) --> X / Y

https://alive2.llvm.org/ce/z/E5eaxU

This fixes the motivating example from issue #58137,
but it is not the most general transform. We should
probably also convert left-shift in the divisor to
right-shift in the dividend for that, but that exposes
another missed canonicalization for shifts and adds.
2022-10-12 11:12:26 -04:00
Sanjay Patel
fe97f95036 [InstCombine] propagate "exact" through folds of div
These folds were added recently with:
6b869be8100d
8da2fa856f1b
...but they didn't account for the "exact" attribute,
and that can be safely propagated:
https://alive2.llvm.org/ce/z/F_WhnR
https://alive2.llvm.org/ce/z/ft9Cgr
2022-10-12 09:25:05 -04:00
Sanjay Patel
2639caf560 [InstCombine] add "exact" to div tests to show missing propagation; NFC 2022-10-12 09:25:04 -04:00
Sanjay Patel
bc032c7f53 [InstCombine] add tests for div with shl operands; NFC 2022-10-12 09:25:04 -04:00
Cullen Rhodes
388cacb341 [AArch64][SVE] Add instcombine for PTEST_ANY(X=OP(PG,...), X) -> PTEST_ANY(PG, X))
Given this is an OR reduction the two are equivalent and later
optimizations (AArch64InstrInfo::optimizePTestInstr) may rewrite the
sequence to use the flag-setting variant of instruction X, to remove the
PTEST altogether.

Reviewed By: paulwalker-arm, bsmith

Differential Revision: https://reviews.llvm.org/D134946
2022-10-12 09:14:08 +00:00
Cullen Rhodes
5b5756e6e3 [AArch64][SVE] NFC: auto-generate llvm/test/Transforms/InstCombine/AArch64/sve-intrinsics-ptest.ll 2022-10-12 09:14:08 +00:00
Sanjay Patel
7ec604a317 [InstCombine] try harder to cancel out mul/div
((Op1 * X) / Y) / Op1 --> X / Y
https://alive2.llvm.org/ce/z/JYxWjA

InstSimplify handles the more basic mul+div pattern with
shared operand, but we don't seem to have any reassociation
folds to handle cases where the common op is further away.

This is a generalization of 9cff4711ac72 and another
transform derived from issue #58137.
2022-10-11 09:51:51 -04:00
Sanjay Patel
5185c5db0e [InstCombine] add tests for div with common mul operand; NFC 2022-10-11 09:51:51 -04:00