566 Commits

Author SHA1 Message Date
Jeremy Furtek
b56e65d318 [mlir][arith] Initial support for fastmath flag attributes in the Arithmetic dialect (v2)
This diff adds initial (partial) support for "fastmath" attributes for floating
point operations in the arithmetic dialect. The "fastmath" attributes are
implemented using a default-valued bit enum. The defined flags currently mirror
the fastmath flags in the LLVM dialect (and in LLVM itself). Extending the
set of flags (if necessary) is left as a future task.

In this diff:
- Definition of FastMathAttr as a custom attribute in the Arithmetic dialect
  that inherits from the EnumAttr class.
- Definition of ArithFastMathInterface, which is an interface that is
  implemented by operations that have an arith::fastmath attribute.
- Declaration of a default-valued fastmath attribute for unary and (some) binary
  floating point operations in the Arithmetic dialect.
- Conversion code to lower arithmetic fastmath flags to LLVM fastmath flags

NOT in this diff (but planned or currently in progress):
- Documentation of flag meanings
- Addition of FastMathAttr attributes to other dialects that might lower to the
  Arithmetic dialect (e.g. Math and Complex)
- Folding/rewrite implementations that are enabled by fastmath flags
- Specification of fastmath values from Python bindings (pending other in-
  progress diffs)

Reviewed By: mehdi_amini, vzakhari

Differential Revision: https://reviews.llvm.org/D126305
2022-10-26 11:56:16 -07:00
River Riddle
9af92ed8a0 [mlir:LLVM] Rewrite the LLVMIR export to use the debug info attributes
This has been a long standing TODO, and actually enables users to generate
debug information for LLVM using the LLVM dialect; as opposed to our
dummy placeholder that generated just enough for line table information.

Differential Revision: https://reviews.llvm.org/D136543
2022-10-24 22:31:41 -07:00
rkayaith
ed90f8026e [mlir-translate] Support parsing operations other than 'builtin.module' as top-level
This adds a '--no-implicit-module' option, which disables the insertion
of a top-level 'builtin.module' during parsing.

The translation APIs are also updated to take/return 'Operation*'
instead of 'ModuleOp', to allow other operation types to be used. To
simplify translations which are restricted to specific operation types,
'TranslateFromMLIRRegistration' has an overload which performs the
necessary cast and error checking.

Reviewed By: rriddle

Differential Revision: https://reviews.llvm.org/D134237
2022-10-21 15:54:06 -04:00
Nikita Popov
87549e61da [LLVMIR] Use helper methods to set/check readnone attribute (NFC)
This makes the code forward-compatible to the memory attribute.
2022-10-21 16:23:52 +02:00
Victor Perez
70e3f0e10e [mlir][llvm] Handle llvm.noundef attribute when converting to LLVM IR
Translate LLVMIR llvm.noundef attribute to its equivalent in LLVM IR.

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D136324
2022-10-20 12:59:47 +01:00
Tobias Gysi
3ee58598c5 [mlir][llvm] Use longer variable names in LLVM IR import (NFC).
Rename single letter member variables and function arguments to use
longer names in ConvertFromLLVMIR.cpp. Also drop some uses of auto in
favor our spelling out the type and refactor some llvm::enumerate loops.

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D136246
2022-10-20 08:26:38 +03:00
Tobias Gysi
3883615906 [mlir][llvm] Ordered traversal in LLVM IR import.
The revision performs a topological sort of the blocks to
ensure the operations are processed in dominance order.
After the change, we do not need to introduce dummy
instructions if an operand has not yet been processed.
Additionally, the revision also moves and simplifies the
control-flow related tests to a separate test file.

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D136230
2022-10-19 12:57:09 +03:00
Dominik Adamski
ccd314d320 [OpenMP][OMPIRBuilder] Add generation of SIMD align assumptions to OMPIRBuilder
Currently generation of align assumptions for OpenMP simd construct is done
outside OMPIRBuilder for C code and it is not supported for Fortran.

According to OpenMP 5.0 standard (2.9.3) only pointers and arrays can be
aligned for C code.

If given aligned variable is pointer, then Clang generates the following set
of the LLVM IR isntructions to support simd align clause:

; memory allocation for pointer address:
%A.addr = alloca ptr, align 8
; some LLVM IR code
; Alignment instructions (alignment is equal to 32):
%0 = load ptr, ptr %A.addr, align 8
call void @llvm.assume(i1 true) [ "align"(ptr %0, i64 32) ]

If given aligned variable is array, then Clang generates the following set
of the LLVM IR isntructions to support simd align clause:

; memory allocation for array:
%B = alloca [10 x i32], align 16
; some LLVM IR code
; Alignment instructions (alignment is equal to 32):
%arraydecay = getelementptr inbounds [10 x i32], ptr %B, i64 0, i64 0
call void @llvm.assume(i1 true) [ "align"(ptr %arraydecay, i64 32) ]

OMPIRBuilder was modified to generate aligned assumptions. It generates only
llvm.assume calls. Frontend is responsible for generation of aligned pointer
and getting the default alignment value if user does not specify it in aligned
clause.

Unit and regression tests were added to check if aligned clause was handled correctly.

Differential Revision: https://reviews.llvm.org/D133578

Reviewed By: jdoerfert
2022-10-18 02:04:18 -05:00
Tobias Gysi
5942456a30 [mlir][llvm] Add support for importing masked intrinsics from LLVM IR.
The revision adds support for importing the masked load/store and
gather/scatter intrinsics from LLVM IR. To enable the import, the
revision also includes an extension of the mlirBuilder code generation
to support variadic arguments.

Depends on D136057

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D136058
2022-10-17 15:53:47 +03:00
River Riddle
cdfeeb8a40 [mlir:ODS] Generate unwrapped operation attribute setters
This allows for setting an attribute using the underlying C++ type,
which is generally much nicer to interact with than the attribute type.

Differential Revision: https://reviews.llvm.org/D135838
2022-10-14 15:57:51 -07:00
Tobias Gysi
9f13900371 [mlir][llvm] Use tablegen to import atomic ops from LLVM IR.
The revision imports the atomic operations using
tablegen generated builders. Additionally, it moves their tests to
the instructions.ll test file.

Depends on D135880

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D135944
2022-10-14 15:25:55 +03:00
Tobias Gysi
ea9cae03d7 [mlir][llvm] Use tablegen to import shufflevector from LLVM IR.
The revision imports the shuffle vector operation using
tablegen generated builders. Additionally, it moves its test to
the instructions.ll test file.

Depends on D135874

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D135880
2022-10-14 14:46:05 +03:00
Tobias Gysi
7114185f4e [mlir][llvm] Use tablegen to import extract/insert ops from LLVM IR.
The revision imports the extract and insert value operations using
tablegen generated builders. Additionally, it moves the tests to
the instructions.ll test file.

Reviewed By: ftynse, dcaballe

Differential Revision: https://reviews.llvm.org/D135874
2022-10-14 10:09:21 +03:00
Tobias Gysi
cc49a74a7b [mlir][llvm] Use TableGen to import compare ops from LLVM IR.
The revision imports compare operations using TableGen generated
builders, instead of using the special handlers defined by the Importer.
It therefore adds a new llvmArgIndexes field that allows to specify
a mapping between MLIR argument and LLVM IR operand indexes if they do
not match. Additionally, the FCmp op is extended with an additional
builder and all compare operations are extended with verification
traits to ensure the operands types match. These extensions simplify
the logic of the newly introduced builders and are in line with the
compare operations define by the arithmetic dialect.

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D135855
2022-10-13 15:31:04 +03:00
Tobias Gysi
8446f24ef0 [mlir][llvm] Tablegen based operation import from LLVM IR.
The revision uses tablegen generated builders to convert the most common
LLVM IR instructions to MLIR LLVM dialect operations. All instructions
with special handlers, except for alloca and fence, still use manual
handlers. The revision also introduces an additional "instructions.ll"
test file to test the import of instructions that have tablegen builders
(except for the resume instruction whose test remains untouched). A part
of the test cases are new, for example the integer instruction test,
while others are migrated from the "basic.ll" test file.

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D135709
2022-10-12 14:36:41 +03:00
Tobias Gysi
a2122a09cf [mlir][llvm] Introduce a mapValue function in LLVMIR import (nfc).
The revision adds a mapValue function to the Importer, which can be used
in the MLIR builders to provide controlled accesses to the result
mapping of the imported instructions. Additionally, the change allows us
to avoid accessing a private member variable of the Importer class,
which simplifies future refactorings that aim at factoring out a
conversion interface (similar to the MLIR to LLVM translation). The
revision also renames the variables used when emitting the MLIR builders
to prepare the generalization to non-intrinsic instructions. In
particular, it renames callInst to inst and it passes in the instruction
arguments using an llvmOperands array rather than accessing the call
arguments directly.

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D135645
2022-10-11 16:22:13 +03:00
Tobias Gysi
d85f6e5d57 [mlir][llvmir] Import intrinsics with attributes from LLVMIR.
The revision adds support to specify custom import functions for
LLVM IR intrinsics with immediate arguments that translate to MLIR
attributes. It takes an approach similar to the MLIR to LLVM translation
that uses a tablegen defined build method. The default implementation
of this newly introduced "mlirBuilder" assumes all intrinsic arguments
translate to operands. Specific intrinsics, such as
llvm.lifetime.start/stop then define a custom builder that converts
their immediate arguments to MLIR attributes.

Depends on D135349

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D135350
2022-10-07 14:30:30 +03:00
Tobias Gysi
f47d5dce61 [mlir][llvmir] Simpler error handling in ConvertFromLLVMIR (nfc).
The revision renames some methods of the Importer and changes
the error handling to be closer the ModuleTranslation. In particular,
processValue -> lookupValue and processType -> convertType
now fail if the translation fails (instead of returning an error),
which simplifies the error handling.

The revision prepares a follow up commit that will import
LLVMIR intrinsics using tablegen.

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D135349
2022-10-06 17:33:09 +03:00
Dominik Adamski
6842d35012 [OpenMP][OMPIRBuilder] Add support for order(concurrent) to OMPIRBuilder for SIMD directive
If 'order(concurrent)' clause is specified, then the iterations of SIMD loop
can be executed concurrently.

This patch adds support for LLVM IR codegen via OMPIRBuilder for SIMD loop
with 'order(concurrent)' clause. The functionality added to OMPIRBuilder is
similar to the functionality implemented in 'CodeGenFunction::EmitOMPSimdInit'.

Reviewed By: jdoerfert
Differential Revision: https://reviews.llvm.org/D134046

Signed-off-by: Dominik Adamski <dominik.adamski@amd.com>
2022-10-04 08:30:00 -05:00
changkaiyan
c4cc755c72 [mlir][mlir-translation] patch for standalone-translation command line description missing.
Differential Revision: https://reviews.llvm.org/D134696

	modified:   mlir/examples/standalone/standalone-translate/standalone-translate.cpp
	modified:   mlir/include/mlir/Tools/mlir-translate/Translation.h
	modified:   mlir/lib/Target/Cpp/TranslateRegistration.cpp
	modified:   mlir/lib/Target/LLVMIR/ConvertFromLLVMIR.cpp
	modified:   mlir/lib/Target/LLVMIR/ConvertToLLVMIR.cpp
	modified:   mlir/lib/Target/SPIRV/TranslateRegistration.cpp
	modified:   mlir/lib/Tools/mlir-translate/Translation.cpp
2022-10-04 09:14:40 +08:00
Tobias Gysi
12b68ad886 [mlir][llvmir] Add filename debug info when converting from LLVMIR.
The revision enriches the debug locations generated during LLVMIR to MLIR translation with file name information and adds a separate test to exercise the debug location translation.

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D135069
2022-10-03 15:14:37 +03:00
River Riddle
4fb4e12bab [mlir:OpenMP][NFC] Update OpenMP API to use prefixed accessors
This doesn't flip the switch for prefix generation yet, that'll be
done in a followup.
2022-09-30 15:27:11 -07:00
River Riddle
f9806b3e3e [mlir:OpenACC][NFC] Update OpenACC API to use prefixed accessors
This doesn't flip the switch for prefix generation yet, that'll be
done in a followup.
2022-09-30 15:27:10 -07:00
Jakub Kuderski
abc362a107 [mlir][arith] Change dialect name from Arithmetic to Arith
Suggested by @lattner in https://discourse.llvm.org/t/rfc-define-precise-arith-semantics/65507/22.

Tested with:
`ninja check-mlir check-mlir-integration check-mlir-mlir-spirv-cpu-runner check-mlir-mlir-vulkan-runner check-mlir-examples`

and `bazel build --config=generic_clang @llvm-project//mlir:all`.

Reviewed By: lattner, Mogball, rriddle, jpienaar, mehdi_amini

Differential Revision: https://reviews.llvm.org/D134762
2022-09-29 11:23:28 -04:00
Min-Yih Hsu
b4869f2fa7 [mlir][LLVMIR] Fix incorrect result type from llvm.fcmp
If any of the operands for FCmpOp is a vector, returns a vector<Nxi1>,
rather than an i1 type result.

Differential Revision: https://reviews.llvm.org/D134449
2022-09-27 09:56:54 -07:00
Min-Yih Hsu
ddc67856ee [mlir][LLVMIR] Add translation of AtomicRMW/CmpXchg from LLVM IR
Add support for translating AtomicRMWInst and AtomicCmpXchgInst from
LLVM IR.

Differential Revision: https://reviews.llvm.org/D134450
2022-09-26 15:07:30 -07:00
Jakub Kuderski
5ab6ef758f [mlir][spirv] Change dialect name from 'spv' to 'spirv'
Tested with `check-mlir` and `check-mlir-integration`.

Issue: https://github.com/llvm/llvm-project/issues/56863

Reviewed By: antiagainst

Differential Revision: https://reviews.llvm.org/D134620
2022-09-26 10:58:30 -04:00
Jakub Kuderski
90a1632d0b [mlir][spirv] Switch to kEmitAccessorPrefix_Predixed
Fixes https://github.com/llvm/llvm-project/issues/57887

Reviewed By: antiagainst

Differential Revision: https://reviews.llvm.org/D134580
2022-09-24 00:37:06 -04:00
Min-Yih Hsu
006a752a3c [mlir][LLVMIR] Do not create pseudo debug file name using llvm::Instruction
Previously in mlir-translate, if debug info was absent in a
llvm::Instruction, we tried to create one using the name of its defined
value in a textual LLVM IR file as the (pseudo) debug file name.
However, in order to get that name, we need to call out to LLVM's
SlotTracker, which, surprisingly, took a lot of time. Judging from
the usefulness of such pseudo debug file name and the performance penalty
during translation, this patch simply use "imported-bitcode" as the
debug file name in these case. Eliminating the need of using (expensive)
LLVM value numbering.

Differential Revision: https://reviews.llvm.org/D134305
2022-09-21 09:46:58 -07:00
rkayaith
aa00e3e6c1 [mlir][llvm] Support pointer entries in data layout translation
This adds support for pointer DLTI entries in LLVMIR export, e.g.
```
// translated to: p0:32:64:128
#dlti.dl_entry<!llvm.ptr, dense<[32,64,128]> : vector<3xi32>>
// translated to: p1:32:32:32:64
#dlti.dl_entry<!llvm.ptr<1>, dense<[32,32,32,64]> : vector<4xi32>>
```

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D133434
2022-09-21 11:16:15 -04:00
Nirvedh Meshram
7f19e59a6e [mlir][spirv] Add casting ops to/from generic storage space
Reviwed By: antiagainst

Differential Revision: https://reviews.llvm.org/D134217
2022-09-20 14:57:06 -07:00
Hanhan Wang
aac844a4b1 [mlir] Improve bitEnumContains methods.
839b436c93
changes the behavior. Based on the discussion, we also want to support
"and" behavior. The revision changes it into two functions, bitEnumContainsAny
and bitEnumContainsAll.

Reviewed By: krzysz00, antiagainst

Differential Revision: https://reviews.llvm.org/D133507
2022-09-09 11:56:36 -07:00
Shraiysh Vaishay
80c1be8d14 [mlir][OpenMP] Translation to LLVM IR for omp.taskgroup
This patch adds translation from OpenMP Dialect to LLVM IR for
omp.taskgroup. This patch also adds missing tests for the clauses in
omp.taskgroup operation.

Reviewed By: peixin

Differential Revision: https://reviews.llvm.org/D130157
2022-08-31 04:55:01 +00:00
Alexander Batashev
79c2094881 [mlir][LLVMIR] Parse some type attributes for LLVM function parameters
With the transition to opaque pointers, type information has been
transferred to function parameter attributes. This patch adds correct
parsing for some of those arguments and fixes some tests, that
previously used UnitAttr for those.

Differential Revision: https://reviews.llvm.org/D132366
2022-08-25 11:06:51 +03:00
Slava Zakharin
13cb085ca1 [mlir] Support llvm.readnone attribute for all FunctionOpInterface ops.
The attribute is translated into LLVM's function attribute 'readnone'.
There is no explicit verification regarding conflicting 'readnone'
and function attributes from 'passthrough', though, LLVM would assert
if they are incompatible during LLVM IR creation.

Differential Revision: https://reviews.llvm.org/D131457
2022-08-24 10:12:37 -07:00
Prabhdeep Singh Soni
b8055c5115 [MLIR][OpenMP] Add support for safelen clause
This supports translation from MLIR to LLVM IR using OMPIRBuilder for
OpenMP safelen clause in SIMD construct.

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D132245
2022-08-24 12:30:54 -04:00
Prabhdeep Singh Soni
4fce38cde2 Revert "[MLIR][OpenMP] Add support for safelen clause"
This reverts commit 172fe1706d83832a330170f43fe52aab1b75e7de.
2022-08-24 12:30:54 -04:00
Prabhdeep Singh Soni
172fe1706d [MLIR][OpenMP] Add support for safelen clause
This supports translation from MLIR to LLVM IR using OMPIRBuilder for
OpenMP safelen clause in SIMD construct.
2022-08-24 12:23:31 -04:00
Prabhdeep Singh Soni
cfef6561a7 Revert "Add support for safelen clause"
This reverts commit 3dd4d6a0cec85d96af0340a48aaacf638215fe76.
2022-08-24 12:15:41 -04:00
Prabhdeep Singh Soni
3dd4d6a0ce Add support for safelen clause
This supports translation from MLIR to LLVM IR using OMPIRBuilder for
OpenMP safelen clause in SIMD construct.
2022-08-24 12:06:00 -04:00
Prabhdeep Singh Soni
bce94ea551 [OMPIRBuilder] Add support for safelen clause
This patch adds OMPIRBuilder support for the safelen clause for the
simd directive.

Reviewed By: shraiysh, Meinersbur

Differential Revision: https://reviews.llvm.org/D131526
2022-08-18 15:43:08 -04:00
Jeff Niu
b2ccfb4d95 [mlir][LLVMIR] Change ShuffleVectorOp to use assembly format
This patch moves `LLVM::ShuffleVectorOp` to assembly format and in the
process drops the extra type that can be inferred (both operand types
are required to be the same) and switches to a dense integer array.

The syntax change:

```
// Before
%0 = llvm.shufflevector %0, %1 [0 : i32, 0 : i32, 0 : i32, 0 : i32] : vector<4xf32>, vector<4xf32>
// After
%0 = llvm.shufflevector %0, %1 [0, 0, 0, 0] : vector<4xf32>
```

Reviewed By: dcaballe

Differential Revision: https://reviews.llvm.org/D132038
2022-08-18 12:46:04 -04:00
Nirvedh Meshram
b8f62dc22a [MLIR][SPIRV] Add intel joint matrix ops
Reviewed By: antiagainst

Differential Revision: https://reviews.llvm.org/D131586
2022-08-15 23:49:45 +00:00
Jeff Niu
58a47508f0 (Reland) [mlir] Switch segment size attributes to DenseI32ArrayAttr
This reland includes changes to the Python bindings.

Switch variadic operand and result segment size attributes to use the
dense i32 array. Dense integer arrays were introduced primarily to
represent index lists. They are a better fit for segment sizes than
dense elements attrs.

Depends on D131801

Reviewed By: rriddle

Differential Revision: https://reviews.llvm.org/D131803
2022-08-12 19:44:52 -04:00
Alex Zinenko
e8e718fa4b Revert "[mlir] Switch segment size attributes to DenseI32ArrayAttr"
This reverts commit 30171e76f0e5ea8037bc4d1450dd3e12af4d9938.

Breaks Python tests in MLIR, missing C API and Python changes.
2022-08-12 10:22:47 +02:00
Jeff Niu
30171e76f0 [mlir] Switch segment size attributes to DenseI32ArrayAttr
Switch variadic operand and result segment size attributes to use the
dense i32 array. Dense integer arrays were introduced primarily to
represent index lists. They are a better fit for segment sizes than
dense elements attrs.

Depends on D131738

Reviewed By: mehdi_amini

Differential Revision: https://reviews.llvm.org/D131702
2022-08-11 20:56:45 -04:00
Jeff Niu
5c5af910fe [mlir][LLVMIR] "Modernize" Insert/ExtractValueOp
This patch "modernizes" the LLVM `insertvalue` and `extractvalue`
operations to use DenseI64ArrayAttr, since they only require an array of
indices and previously there was confusion about whether to use i32 or
i64 arrays, and to use assembly format.

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D131537
2022-08-10 12:51:11 -04:00
Lei Zhang
a29fffc475 [mlir][spirv] Migrate to use specalized enum attributes
Previously we are using IntegerAttr to back all SPIR-V enum
attributes. Therefore we all such attributes are showed like
IntegerAttr in IRs, which is barely readable and breaks
roundtripability of the IR. This commit changes to use
`EnumAttr` as the base directly so that we can have separate
attribute definitions and better IR printing.

Reviewed By: kuhar

Differential Revision: https://reviews.llvm.org/D131311
2022-08-09 14:14:54 -04:00
Lei Zhang
4bd25d0b81 [mlir][spirv] Refresh base definitions to latest spec (v1.6)
This commit updates all SPIR-V enum definitions to match the latest
specification (v1.6 revision 2). Along the way, fixed some issues
in `gen_spirv_dialect.py` and added a new script for refreshing
all op definitions for such cases.

Reviewed By: kuhar

Differential Revision: https://reviews.llvm.org/D131293
2022-08-08 12:22:32 -04:00
Eugene Zhulenev
5f1c7e2cc5 [mlir] Use SymbolTableCollection to lookup referenced symbol in AddressOfOp
Depends On D131285

Reviewed By: Mogball

Differential Revision: https://reviews.llvm.org/D131291
2022-08-05 14:05:03 -07:00