462 Commits

Author SHA1 Message Date
Tobias Gysi
606634967d [mlir][llvm] Tighten LLVM dialect intrinsic type constraints.
The revision specifies more precise argument and result type
constraints for many of the llvm intrinsics. Additionally, add
tests to verify intrinsics with invalid arguments/result result
in a verification error.

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D136360
2022-10-26 11:27:06 +03:00
River Riddle
9af92ed8a0 [mlir:LLVM] Rewrite the LLVMIR export to use the debug info attributes
This has been a long standing TODO, and actually enables users to generate
debug information for LLVM using the LLVM dialect; as opposed to our
dummy placeholder that generated just enough for line table information.

Differential Revision: https://reviews.llvm.org/D136543
2022-10-24 22:31:41 -07:00
Benjamin Maxwell
fc28971fb9 Add nocapture to pointer parameters of masked stores/loads
The lack of this attribute (particularly on the load intrinsics)
prevented InstCombine from optimizing away allocas and memcpys
for arrays that could be read directly from rodata.

This now also includes a new test to check the masked load/store
intrinsics have the expected attributes (specifically nocapture).

Differential Revision: https://reviews.llvm.org/D135656
2022-10-24 11:15:55 +00:00
Jeff Niu
8c8775e938 [mlir][llvm] Move LLVMArrayType to a TypeDef
This moves the `LLVMArrayType` to a `TypeDef`. The main side-effect of
this change is that the syntax `array<4xi32>` is no longer allowed. It
was previously parsed and then printed as `array<4 x i32>`. Now the
syntax must be the latter.

Reviewed By: rriddle

Differential Revision: https://reviews.llvm.org/D136473
2022-10-21 12:57:16 -07:00
rkayaith
ed90f8026e [mlir-translate] Support parsing operations other than 'builtin.module' as top-level
This adds a '--no-implicit-module' option, which disables the insertion
of a top-level 'builtin.module' during parsing.

The translation APIs are also updated to take/return 'Operation*'
instead of 'ModuleOp', to allow other operation types to be used. To
simplify translations which are restricted to specific operation types,
'TranslateFromMLIRRegistration' has an overload which performs the
necessary cast and error checking.

Reviewed By: rriddle

Differential Revision: https://reviews.llvm.org/D134237
2022-10-21 15:54:06 -04:00
Victor Perez
70e3f0e10e [mlir][llvm] Handle llvm.noundef attribute when converting to LLVM IR
Translate LLVMIR llvm.noundef attribute to its equivalent in LLVM IR.

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D136324
2022-10-20 12:59:47 +01:00
Tobias Gysi
3883615906 [mlir][llvm] Ordered traversal in LLVM IR import.
The revision performs a topological sort of the blocks to
ensure the operations are processed in dominance order.
After the change, we do not need to introduce dummy
instructions if an operand has not yet been processed.
Additionally, the revision also moves and simplifies the
control-flow related tests to a separate test file.

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D136230
2022-10-19 12:57:09 +03:00
Tobias Gysi
b3ed69d37c [mlir][llvm] Import matrix, vector, and assume intrinsics from LLVM IR.
The revision adds support to import:
- matrix intrinsics
- vector reduce fadd/fmul intrinsics
- assume intrinsics
from LLVM IR.

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D136137
2022-10-18 11:11:03 +03:00
Jeremy Furtek
dd38f89980 [mlir][LLVMIR] Update LLVMIR fastmath to use EnumAttr tblgen classes
This diff updates the `fastmath` attribute in the LLVMIR dialect to use `tblgen`
classes that were developed after the initial LLVMIR `fastmath` implementation.
Using the `EnumAttr` `tblgen` classes brings the LLVMIR `fastmath` attribute in
line with other dialects, and eliminates some of the custom printing and parsing
code in the LLVMIR dialect.

Subsequent commits will further reduce the custom processing code for the LLVMIR
`fastmath` attribute by unifying printing/parsing functionality between the
LLVMIR and `arith` `fastmath` attributes. (The actual attributes will remain
separate, but the printing and parsing will be made generic, and will be usable
by other dialects/attributes.)

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D135289
2022-10-17 15:03:47 -07:00
Tobias Gysi
5942456a30 [mlir][llvm] Add support for importing masked intrinsics from LLVM IR.
The revision adds support for importing the masked load/store and
gather/scatter intrinsics from LLVM IR. To enable the import, the
revision also includes an extension of the mlirBuilder code generation
to support variadic arguments.

Depends on D136057

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D136058
2022-10-17 15:53:47 +03:00
Jeff Niu
7c3439b74c [mlir][llvm] Add llvm.intr.is.fpclass
This intrinsic allows testing for inf, nan, etc. on floating point
values.

Reviewed By: rriddle

Differential Revision: https://reviews.llvm.org/D135969
2022-10-14 16:22:59 -07:00
Tobias Gysi
9f13900371 [mlir][llvm] Use tablegen to import atomic ops from LLVM IR.
The revision imports the atomic operations using
tablegen generated builders. Additionally, it moves their tests to
the instructions.ll test file.

Depends on D135880

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D135944
2022-10-14 15:25:55 +03:00
Tobias Gysi
ea9cae03d7 [mlir][llvm] Use tablegen to import shufflevector from LLVM IR.
The revision imports the shuffle vector operation using
tablegen generated builders. Additionally, it moves its test to
the instructions.ll test file.

Depends on D135874

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D135880
2022-10-14 14:46:05 +03:00
Tobias Gysi
7114185f4e [mlir][llvm] Use tablegen to import extract/insert ops from LLVM IR.
The revision imports the extract and insert value operations using
tablegen generated builders. Additionally, it moves the tests to
the instructions.ll test file.

Reviewed By: ftynse, dcaballe

Differential Revision: https://reviews.llvm.org/D135874
2022-10-14 10:09:21 +03:00
Tobias Gysi
cc49a74a7b [mlir][llvm] Use TableGen to import compare ops from LLVM IR.
The revision imports compare operations using TableGen generated
builders, instead of using the special handlers defined by the Importer.
It therefore adds a new llvmArgIndexes field that allows to specify
a mapping between MLIR argument and LLVM IR operand indexes if they do
not match. Additionally, the FCmp op is extended with an additional
builder and all compare operations are extended with verification
traits to ensure the operands types match. These extensions simplify
the logic of the newly introduced builders and are in line with the
compare operations define by the arithmetic dialect.

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D135855
2022-10-13 15:31:04 +03:00
Tobias Gysi
8446f24ef0 [mlir][llvm] Tablegen based operation import from LLVM IR.
The revision uses tablegen generated builders to convert the most common
LLVM IR instructions to MLIR LLVM dialect operations. All instructions
with special handlers, except for alloca and fence, still use manual
handlers. The revision also introduces an additional "instructions.ll"
test file to test the import of instructions that have tablegen builders
(except for the resume instruction whose test remains untouched). A part
of the test cases are new, for example the integer instruction test,
while others are migrated from the "basic.ll" test file.

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D135709
2022-10-12 14:36:41 +03:00
Tobias Gysi
d85f6e5d57 [mlir][llvmir] Import intrinsics with attributes from LLVMIR.
The revision adds support to specify custom import functions for
LLVM IR intrinsics with immediate arguments that translate to MLIR
attributes. It takes an approach similar to the MLIR to LLVM translation
that uses a tablegen defined build method. The default implementation
of this newly introduced "mlirBuilder" assumes all intrinsic arguments
translate to operands. Specific intrinsics, such as
llvm.lifetime.start/stop then define a custom builder that converts
their immediate arguments to MLIR attributes.

Depends on D135349

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D135350
2022-10-07 14:30:30 +03:00
Tobias Gysi
12b68ad886 [mlir][llvmir] Add filename debug info when converting from LLVMIR.
The revision enriches the debug locations generated during LLVMIR to MLIR translation with file name information and adds a separate test to exercise the debug location translation.

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D135069
2022-10-03 15:14:37 +03:00
Min-Yih Hsu
ddc67856ee [mlir][LLVMIR] Add translation of AtomicRMW/CmpXchg from LLVM IR
Add support for translating AtomicRMWInst and AtomicCmpXchgInst from
LLVM IR.

Differential Revision: https://reviews.llvm.org/D134450
2022-09-26 15:07:30 -07:00
Jakub Kuderski
ce82530cd0 Revert "[mlir][spirv] Change td def/class prefix from SPV to SPIRV"
This reverts commit a2052b8794cb5abac131cd62f68505eebcfaffcb.

This commit renamed some Vulkan identifiers that shouldn't have been
renamed, e.g., `SPV_KHR_storage_buffer_storage_class`.
2022-09-26 12:40:35 -04:00
Jakub Kuderski
a2052b8794 [mlir][spirv] Change td def/class prefix from SPV to SPIRV
Tested with `check-mlir` and `check-mlir-integration`.

Fixes: https://github.com/llvm/llvm-project/issues/56863

Reviewed By: antiagainst

Differential Revision: https://reviews.llvm.org/D134649
2022-09-26 11:42:49 -04:00
Jakub Kuderski
5ab6ef758f [mlir][spirv] Change dialect name from 'spv' to 'spirv'
Tested with `check-mlir` and `check-mlir-integration`.

Issue: https://github.com/llvm/llvm-project/issues/56863

Reviewed By: antiagainst

Differential Revision: https://reviews.llvm.org/D134620
2022-09-26 10:58:30 -04:00
Min-Yih Hsu
006a752a3c [mlir][LLVMIR] Do not create pseudo debug file name using llvm::Instruction
Previously in mlir-translate, if debug info was absent in a
llvm::Instruction, we tried to create one using the name of its defined
value in a textual LLVM IR file as the (pseudo) debug file name.
However, in order to get that name, we need to call out to LLVM's
SlotTracker, which, surprisingly, took a lot of time. Judging from
the usefulness of such pseudo debug file name and the performance penalty
during translation, this patch simply use "imported-bitcode" as the
debug file name in these case. Eliminating the need of using (expensive)
LLVM value numbering.

Differential Revision: https://reviews.llvm.org/D134305
2022-09-21 09:46:58 -07:00
rkayaith
aa00e3e6c1 [mlir][llvm] Support pointer entries in data layout translation
This adds support for pointer DLTI entries in LLVMIR export, e.g.
```
// translated to: p0:32:64:128
#dlti.dl_entry<!llvm.ptr, dense<[32,64,128]> : vector<3xi32>>
// translated to: p1:32:32:32:64
#dlti.dl_entry<!llvm.ptr<1>, dense<[32,32,32,64]> : vector<4xi32>>
```

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D133434
2022-09-21 11:16:15 -04:00
Nirvedh Meshram
7f19e59a6e [mlir][spirv] Add casting ops to/from generic storage space
Reviwed By: antiagainst

Differential Revision: https://reviews.llvm.org/D134217
2022-09-20 14:57:06 -07:00
Vitaly Buka
bbef90ace4 [IRBuilder] Use PoisonValue in CreateMasked*
Followup to 72b776168c7c80d2035c7226488462dcffc97e75

Reviewed By: nlopes

Differential Revision: https://reviews.llvm.org/D133967
2022-09-19 11:01:41 -07:00
Stanley Winata
7d23d1e640 [mlir][spirv] Lower arith max/min ops to OpenCL ones
Reviewed By: antiagainst

Differential Revision: https://reviews.llvm.org/D132881
2022-09-19 13:34:09 -04:00
Jeff Niu
e63b574ff6 [mlir][LLVMIR] Add lifetime start and end marker instrinsics
This patch adds the `llvm.intr.lifetime.start` and `llvm.intr.lifetime.end`
intrinsics which are used to indicate to LLVM the lifetimes of allocated
memory.

These ops have the requirement that the first argument (the size) be an
"immediate argument". I added an OpTrait to check this, but it is
possible that an approach like GEPArg would work too.

Reviewed By: rriddle, dcaballe

Differential Revision: https://reviews.llvm.org/D133867
2022-09-14 13:15:14 -07:00
Jakub Kuderski
817de304d5 [mlir][spirv] Change vendor op mnemonics to spv.VENDOR.name
Make vendor ops more consistent with the naming scheme within the SPIR-V
dialect.

Issue: https://github.com/llvm/llvm-project/issues/56863

Reviewed By: antiagainst

Differential Revision: https://reviews.llvm.org/D133247
2022-09-06 13:35:08 -04:00
Lei Zhang
4c726d3bbf [mlir][spirv] Define various spv.GroupNonUniformShuffle ops
Reviewed By: kuhar

Differential Revision: https://reviews.llvm.org/D133041
2022-09-02 17:07:16 -04:00
Shraiysh Vaishay
80c1be8d14 [mlir][OpenMP] Translation to LLVM IR for omp.taskgroup
This patch adds translation from OpenMP Dialect to LLVM IR for
omp.taskgroup. This patch also adds missing tests for the clauses in
omp.taskgroup operation.

Reviewed By: peixin

Differential Revision: https://reviews.llvm.org/D130157
2022-08-31 04:55:01 +00:00
Alexander Batashev
79c2094881 [mlir][LLVMIR] Parse some type attributes for LLVM function parameters
With the transition to opaque pointers, type information has been
transferred to function parameter attributes. This patch adds correct
parsing for some of those arguments and fixes some tests, that
previously used UnitAttr for those.

Differential Revision: https://reviews.llvm.org/D132366
2022-08-25 11:06:51 +03:00
Slava Zakharin
13cb085ca1 [mlir] Support llvm.readnone attribute for all FunctionOpInterface ops.
The attribute is translated into LLVM's function attribute 'readnone'.
There is no explicit verification regarding conflicting 'readnone'
and function attributes from 'passthrough', though, LLVM would assert
if they are incompatible during LLVM IR creation.

Differential Revision: https://reviews.llvm.org/D131457
2022-08-24 10:12:37 -07:00
Prabhdeep Singh Soni
b8055c5115 [MLIR][OpenMP] Add support for safelen clause
This supports translation from MLIR to LLVM IR using OMPIRBuilder for
OpenMP safelen clause in SIMD construct.

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D132245
2022-08-24 12:30:54 -04:00
Prabhdeep Singh Soni
4fce38cde2 Revert "[MLIR][OpenMP] Add support for safelen clause"
This reverts commit 172fe1706d83832a330170f43fe52aab1b75e7de.
2022-08-24 12:30:54 -04:00
Prabhdeep Singh Soni
172fe1706d [MLIR][OpenMP] Add support for safelen clause
This supports translation from MLIR to LLVM IR using OMPIRBuilder for
OpenMP safelen clause in SIMD construct.
2022-08-24 12:23:31 -04:00
Prabhdeep Singh Soni
cfef6561a7 Revert "Add support for safelen clause"
This reverts commit 3dd4d6a0cec85d96af0340a48aaacf638215fe76.
2022-08-24 12:15:41 -04:00
Prabhdeep Singh Soni
3dd4d6a0ce Add support for safelen clause
This supports translation from MLIR to LLVM IR using OMPIRBuilder for
OpenMP safelen clause in SIMD construct.
2022-08-24 12:06:00 -04:00
Jacques Pienaar
7d273fde11 [mlir] Populate default attributes on op creation
Default attributes were only handled by ODS accessors generated with the
intention that these behave as if set attributes. This addresses the
long standing TODO to address this inconsistency. Moving the
initialization to construction vs every access. Removing need for
duplicated default attribute population in python bindings.

Switch some of the OpenMP ones to optional attribute with default as the
currently set default values are not legal. May need to dig more there.

Switched LinAlg generated ones to optional attribute with default as its
quite widely used and unclear where it falls on two different
interpretations.

Differential Revision: https://reviews.llvm.org/D130916
2022-08-22 16:49:46 -07:00
Archibald Elliott
3a729069e4 [IR] Update llvm.prefetch to match docs
The current llvm.prefetch intrinsic docs state "The rw, locality and
cache type arguments must be constant integers."

This change:
- Makes arg 3 (cache type) an ImmArg
- Improves the verifier error messages to reference the incorrect
  argument.
- Fixes two tests which contradict the docs.

This is needed as the lowering to GlobalISel is different for ImmArgs
compared to other constants. The non-ImmArgs create a G_CONSTANT MIR
instruction, the for ImmArgs the constant is put directly on the
intrinsic's MIR instruction as an immediate.

Differential Revision: https://reviews.llvm.org/D132042
2022-08-19 09:11:17 +01:00
Jeff Niu
b2ccfb4d95 [mlir][LLVMIR] Change ShuffleVectorOp to use assembly format
This patch moves `LLVM::ShuffleVectorOp` to assembly format and in the
process drops the extra type that can be inferred (both operand types
are required to be the same) and switches to a dense integer array.

The syntax change:

```
// Before
%0 = llvm.shufflevector %0, %1 [0 : i32, 0 : i32, 0 : i32, 0 : i32] : vector<4xf32>, vector<4xf32>
// After
%0 = llvm.shufflevector %0, %1 [0, 0, 0, 0] : vector<4xf32>
```

Reviewed By: dcaballe

Differential Revision: https://reviews.llvm.org/D132038
2022-08-18 12:46:04 -04:00
Nirvedh Meshram
6b8952554c [mlir][spirv] Modify intel joint matrix ops
Adding more supported storage classes in pointer type
Removing support for arithmetic ops as this is not available on the tensor hardware

Reviwed By: antiagainst

Differential Revision: https://reviews.llvm.org/D132039
2022-08-17 18:40:59 +00:00
Dominik Adamski
19bd4789b9 [NFC][OpenMP] Update simd loop collapse support description
Simdloop collapse clause is supported in the same way
as colllapse clause for worksharing loops.

Reviewed By: kiranchandramohan

Differential Revision: https://reviews.llvm.org/D131674

Signed-off-by: Dominik Adamski <dominik.adamski@amd.com>
2022-08-17 03:57:22 -05:00
Nirvedh Meshram
b8f62dc22a [MLIR][SPIRV] Add intel joint matrix ops
Reviewed By: antiagainst

Differential Revision: https://reviews.llvm.org/D131586
2022-08-15 23:49:45 +00:00
Lei Zhang
6f4f9e316c [mlir][spirv] Add a test covering load/store with memory operands
Reviewed By: kuhar

Differential Revision: https://reviews.llvm.org/D131904
2022-08-15 17:48:33 -04:00
Jeff Niu
58a47508f0 (Reland) [mlir] Switch segment size attributes to DenseI32ArrayAttr
This reland includes changes to the Python bindings.

Switch variadic operand and result segment size attributes to use the
dense i32 array. Dense integer arrays were introduced primarily to
represent index lists. They are a better fit for segment sizes than
dense elements attrs.

Depends on D131801

Reviewed By: rriddle

Differential Revision: https://reviews.llvm.org/D131803
2022-08-12 19:44:52 -04:00
Marius Brehler
f3547fd541 [mlir][emitc][nfc] Clean up tests
With https://reviews.llvm.org/D131666 the types were removed from the
EmitC opaque attributes. This cleans up the tests accordingly.
2022-08-12 08:25:31 +00:00
Alex Zinenko
e8e718fa4b Revert "[mlir] Switch segment size attributes to DenseI32ArrayAttr"
This reverts commit 30171e76f0e5ea8037bc4d1450dd3e12af4d9938.

Breaks Python tests in MLIR, missing C API and Python changes.
2022-08-12 10:22:47 +02:00
Marius Brehler
90736babca [mlir][EmitC] Remove the type from the OpaqueAttr
This removes the type from EmitC's opaque attribute. The value provided
as a StringRefParameter can always be emitted as is. In consquence the
constant and variable ops explicitly need to opaque attributes which are
no longer typed attributes.

Co-authored-by: Simon Camphausen <simon.camphausen@iml.fraunhofer.de>

Reviewed By: Mogball, jpienaar

Differential Revision: https://reviews.llvm.org/D131666
2022-08-12 07:12:24 +00:00
Jeff Niu
30171e76f0 [mlir] Switch segment size attributes to DenseI32ArrayAttr
Switch variadic operand and result segment size attributes to use the
dense i32 array. Dense integer arrays were introduced primarily to
represent index lists. They are a better fit for segment sizes than
dense elements attrs.

Depends on D131738

Reviewed By: mehdi_amini

Differential Revision: https://reviews.llvm.org/D131702
2022-08-11 20:56:45 -04:00