2 Commits

Author SHA1 Message Date
YunQiang Su
6dd14c881c
MIPS: Implements MipsTTIImpl::isLSRCostLess using Insns as first (#133068)
So that LoopStrengthReduce can work for MIPS.
The code is copied from RISC-V.

---------

Co-authored-by: qethu <190734095+qethu@users.noreply.github.com>
2025-03-26 23:01:26 +08:00
Jim Lin
0a0d6489ef [Mips] Implement hasDivRemOp()
SDIVREM and UDIVREM can be customized lowered in MipsSE.

Fix https://github.com/llvm/llvm-project/issues/54991.

Reviewed By: sdardis

Differential Revision: https://reviews.llvm.org/D124980
2022-05-16 14:45:40 +08:00