33 Commits

Author SHA1 Message Date
Emma Pilkington
4490003a22
[AMDGPU] Rename COV module flag to amdhsa_code_object_version (#79905)
The previous name 'amdgpu_code_object_version', was misleading since
this is really a property of the HSA OS. The new spelling also matches
the asm directive I added in bc82cfb.
2024-03-06 09:51:48 -05:00
Mészáros Gergely
5942868a21
[clang][AMDGPU][CUDA] Handle __builtin_printf for device printf (#68515)
Previously `__builtin_printf` would result to emitting call to `printf`,
even though directly calling `printf` was translated.

Ref: #68478
2024-02-05 23:23:13 +05:30
Saiyedul Islam
082f87c9d4
[AMDGPU] Change default AMDHSA Code Object version to 5 (#79038)
Also update LIT tests and docs.
For more details, see
https://llvm.org/docs/AMDGPUUsage.html#code-object-v5-metadata

Corresponding llvm-objdump AMDGPU lit tests are updated
in a follow-up PR.
2024-01-23 17:08:18 +05:30
Sameer Sahasrabuddhe
9db642394d
[clang][AMDGPU] fix the return type for ballot (#73906)
In the builtins declaration, "ULi" is a 32-bit integer on Windows. Use
"WUi" instead to ensure a 64-bit integer on all platforms.
2023-12-04 15:15:02 +05:30
Sameer Sahasrabuddhe
0f8681b38e
[clang][AMDGPU] precommit test for ballot on Windows (#73920)
The Clang declaration of the wave-64 builtin uses "UL" as the return
type, which is interpreted as a 32-bit unsigned integer on Windows. This
emits an incorrect LLVM declaration with i32 return type instead of i64.
The clang declaration needs to be fixed to use "WU" instead.
2023-12-04 10:43:16 +05:30
Pravin Jagtap
1f21e49870
Revert "Revert "[AMDGPU] const-fold imm operands of (#71669)
amdgcn_update_dpp intrinsic (#71139)""

This reverts commit d1fb9307951319eea3e869d78470341d603c8363 and fixes
the lit test clang/test/CodeGenHIP/dpp-const-fold.hip

---------

Authored-by: Pravin Jagtap <Pravin.Jagtap@amd.com>
2023-11-09 10:09:22 +05:30
Mitch Phillips
d1fb930795 Revert "[AMDGPU] const-fold imm operands of amdgcn_update_dpp intrinsic (#71139)"
This reverts commit 32a3f2afe6ea7ffb02a6a188b123ded6f4c89f6c.

Reason: Broke the sanitizer buildbots. More details at
32a3f2afe6
2023-11-08 12:50:53 +01:00
Pravin Jagtap
32a3f2afe6
[AMDGPU] const-fold imm operands of amdgcn_update_dpp intrinsic (#71139)
Operands of `__builtin_amdgcn_update_dpp` need to evaluate to constant
to match the intrinsic requirements.

Fixes: SWDEV-426822, SWDEV-431138
---------

Authored-by: Pravin Jagtap <Pravin.Jagtap@amd.com>
2023-11-08 15:09:10 +05:30
Saiyedul Islam
466a8149b3
Revert "[AMDGPU] Make default AMDHSA Code Object Version to be 5 (#65410)" (#66060)
This reverts commit 0a8d17e79b02a92814a2a788d79df1f54d70ec3e.
2023-09-12 15:13:59 +05:30
Saiyedul Islam
0a8d17e79b
[AMDGPU] Make default AMDHSA Code Object Version to be 5 (#65410)
Also update LIT tests and docs.
For more details, see
https://llvm.org/docs/AMDGPUUsage.html#code-object-v5-metadata

Reviewed By: arsenm, jhuber6

Github PR: #65410

Differential Revision: https://reviews.llvm.org/D129818
2023-09-12 13:53:31 +05:30
Yaxun (Sam) Liu
ad96f25b93 [AMDGPU] Rename predefined macro __AMDGCN_WAVEFRONT_SIZE
rename it to __AMDGCN_WAVEFRONT_SIZE__ for consistency.

__AMDGCN_WAVEFRONT_SIZE will be deprecated in the future.

Reviewed by: Matt Arsenault, Johannes Doerfert

Differential Revision: https://reviews.llvm.org/D154207
2023-07-02 11:10:06 -04:00
Vikram
631c965483 [AMDGPU] Non hostcall printf support for HIP
This is an alternative to currently existing hostcall implementation and uses printf buffer similar to OpenCL,
The data stored in the buffer (i.e the data frame) for each printf call are as follows,
1. Control DWord - contains info regarding stream, format string constness and size of data frame
2. Hash of the format string (if constant) else the format string itself
3. Printf arguments (each aligned to 8 byte boundary)

The format string Hash is generated using LLVM's MD5 Message-Digest Algorithm implementation and only low 64 bits are used.
The implementation still uses amdhsa metadata and hash is stored as part of format string itself to ensure
minimal changes in runtime.

Differential Revision: https://reviews.llvm.org/D150427
2023-06-10 09:55:00 -04:00
Tobias Hieta
dd3c26a045
[NFC][Py Reformat] Reformat python files in clang and clang-tools-extra
This is an ongoing series of commits that are reformatting our
Python code.

Reformatting is done with `black`.

If you end up having problems merging this commit because you
have made changes to a python file, the best way to handle that
is to run git checkout --ours <yourfile> and then reformat it
with black.

If you run into any problems, post to discourse about it and
we will try to help.

RFC Thread below:

https://discourse.llvm.org/t/rfc-document-and-standardize-python-code-style

Reviewed By: MatzeB

Differential Revision: https://reviews.llvm.org/D150761
2023-05-23 08:29:52 +02:00
Sergei Barannikov
f46b0e6d75 [clang] Convert a few tests to opaque pointers
Reviewed By: nikic

Differential Revision: https://reviews.llvm.org/D150520
2023-05-14 21:00:15 +03:00
Yaxun (Sam) Liu
6adb9a0602 [AMDGPU] Emit predefined macro __AMDGCN_CUMODE__
Predefine __AMDGCN_CUMODE__ as 1 or 0 when compilation assumes CU or WGP modes.

If WGP mode is not supported, ignore -mno-cumode and emit a warning.

This is needed for implementing device functions like __smid
(312dff7b79/include/hip/amd_detail/amd_device_functions.h (L957))

Reviewed by: Matt Arsenault, Artem Belevich, Brian Sumner

Differential Revision: https://reviews.llvm.org/D145343
2023-05-12 18:50:52 -04:00
Matt Arsenault
97156ba7bc clang/AMDGPU: Update clang test for llvm change 2023-01-12 15:22:18 -05:00
Matt Arsenault
4d4894ab92 Partially reapply "AMDGPU: Invert handling of enqueued block detection"
This mostly reverts commit 270e96f435596449002fc89962595497481c8770.

Keep the attributor related changes around, but functionally restore
the old behavior as a workaround. Device enqueue goes back to not
working at -O0 with this version.
2023-01-12 15:02:16 -05:00
Matt Arsenault
270e96f435 Revert "AMDGPU: Invert handling of enqueued block detection"
This reverts commit 47288cc977fa31c44cc92b4e65044a5b75c2597e.

The runtime is having trouble with this at -O0 when the inputs are
always enabled.
2023-01-07 21:48:07 -05:00
Matt Arsenault
6fe70cb465 clang/AMDGPU: Force disable block enqueue arguments for HIP
This is a dirty, dirty hack to workaround bot failures at
-O0. Currently these fields are only used by OpenCL features and
evidently the HIP runtime isn't expecting to see them in HIP
programs. The code objects should be language agnostic, so just force
optimize these out until the runtime is fixed.
2023-01-07 13:39:05 -05:00
Nikita Popov
9466b49171 [Clang] Convert various tests to opaque pointers (NFC)
These were all tests where no manual fixup was required.
2022-12-12 17:11:46 +01:00
Matt Arsenault
91ba8b2b8d clang: Fix cast failure when using -fsanitize=undefined for HIP
This was assuming a direct reference to the global variable. The
constant string is placed in addrspace 4, and has a constexpr
addrspacecast to the generic address space.
2022-11-29 11:48:46 -05:00
skc7
09c4121123 Revert "Revert "[Clang][Attribute] Introduce maybe_undef attribute for function arguments which accepts undef values""
This reverts commit 4e1fe96.

Reverting this commit and fix the tests that caused failures due to
a35c64c.
2022-07-29 19:07:07 +00:00
Amy Kwan
4e1fe968c9 Revert "[Clang][Attribute] Introduce maybe_undef attribute for function arguments which accepts undef values"
This reverts commit a35c64ce23b7c7e4972c89b224b9363639dddea2.

Reverting this commit as it causes various failures on LE and BE PPC bots.
2022-07-29 13:28:48 -05:00
skc7
a35c64ce23 [Clang][Attribute] Introduce maybe_undef attribute for function arguments which accepts undef values
Add the ability to put __attribute__((maybe_undef)) on function arguments.
Clang codegen introduces a freeze instruction on the argument.

Differential Revision: https://reviews.llvm.org/D130224
2022-07-29 02:27:26 +00:00
Nikita Popov
532dc62b90 [OpaquePtrs][Clang] Add -no-opaque-pointers to tests (NFC)
This adds -no-opaque-pointers to clang tests whose output will
change when opaque pointers are enabled by default. This is
intended to be part of the migration approach described in
https://discourse.llvm.org/t/enabling-opaque-pointers-by-default/61322/9.

The patch has been produced by replacing %clang_cc1 with
%clang_cc1 -no-opaque-pointers for tests that fail with opaque
pointers enabled. Worth noting that this doesn't cover all tests,
there's a remaining ~40 tests not using %clang_cc1 that will need
a followup change.

Differential Revision: https://reviews.llvm.org/D123115
2022-04-07 12:09:47 +02:00
Yaxun (Sam) Liu
171da443d5 [HIPSPV] Fix literals are mapped to Generic address space
This issue is an oversight in D108621.

Literals in HIP are emitted as global constant variables with default
address space which maps to Generic address space for HIPSPV. In
SPIR-V such variables translate to OpVariable instructions with
Generic storage class which are not legal. Fix by mapping literals
to CrossWorkGroup address space.

The literals are not mapped to UniformConstant because the “flat”
pointers in HIP may reference them and “flat” pointers are modeled
as Generic pointers in SPIR-V. In SPIR-V/OpenCL UniformConstant
pointers may not be casted to Generic.

Patch by: Henry Linjamäki

Reviewed by: Yaxun Liu

Differential Revision: https://reviews.llvm.org/D118876
2022-02-05 17:26:52 -05:00
hyeongyu kim
1b1c8d83d3 [Clang/Test]: Rename enable_noundef_analysis to disable-noundef-analysis and turn it off by default
Turning on `enable_noundef_analysis` flag allows better codegen by removing freeze instructions.
I modified clang by renaming `enable_noundef_analysis` flag to `disable-noundef-analysis` and turning it off by default.

Test updates are made as a separate patch: D108453

Reviewed By: eugenis

Differential Revision: https://reviews.llvm.org/D105169
2022-01-16 18:54:17 +09:00
Henry Linjamäki
9ae5810b53 [HIPSPV] Convert HIP kernels to SPIR-V kernels
This patch translates HIP kernels to SPIR-V kernels when the HIP
compilation mode is targeting SPIR-S. This involves:

* Setting Cuda calling convention to CC_OpenCLKernel (which maps to
  SPIR_KERNEL in LLVM IR later on).

* Coercing pointer arguments with default address space (AS) qualifier
  to CrossWorkGroup AS (__global in OpenCL). HIPSPV's device code is
  ultimately SPIR-V for OpenCL execution environment (as
  starter/default) where Generic or Function (OpenCL's private) is not
  supported as storage class for kernel pointer types. This leaves the
  CrossWorkGroup to be the only reasonable choice for HIP buffers.

Reviewed By: yaxunl

Differential Revision: https://reviews.llvm.org/D109818
2021-12-08 12:18:15 +03:00
Anastasia Stulova
f4d3cb4ca8 [HIPSPV] Add CUDA->SPIR-V address space mapping
Add mapping for CUDA address spaces for HIP to SPIR-V
translation. This change allows HIP device code to be
emitted as valid SPIR-V by mapping unqualified pointers
to generic address space and by mapping __device__ and
__shared__ AS to their equivalent AS in SPIR-V
(CrossWorkgroup and Workgroup, respectively).

Cuda's __constant__ AS is handled specially. In HIP
unqualified pointers (aka "flat" pointers) can point to
__constant__ objects. Mapping this AS to ConstantMemory
would produce to illegal address space casts to
generic AS. Therefore, __constant__ AS is mapped to
CrossWorkgroup.

Patch by linjamaki (Henry Linjamäki)!

Differential Revision: https://reviews.llvm.org/D108621
2021-12-02 13:34:27 +00:00
dfukalov
8cc722ffc7 [NFC] Fixed ignored .hip test.
Reviewers: hliao

Reviewed By: hliao

Subscribers: yaxunl, cfe-commits, llvm-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D82764
2020-06-29 18:57:14 +03:00
Michael Liao
e830fa260d [clang][amdgpu] Prefer not using fp16 conversion intrinsics.
Reviewers: yaxunl, arsenm

Subscribers: kzhuravl, jvesely, wdng, nhaehnle, dstuttard, tpr, t-tye, kerbowa, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D81849
2020-06-16 10:21:56 -04:00
Richard Smith
01a6cd471f Don't dump IR output from this test to stdout. 2020-01-16 19:19:45 -08:00
Sameer Sahasrabuddhe
ed181efa17 [HIP][AMDGPU] expand printf when compiling HIP to AMDGPU
Summary:
This change implements the expansion in two parts:
- Add a utility function emitAMDGPUPrintfCall() in LLVM.
- Invoke the above function from Clang CodeGen, when processing a HIP
  program for the AMDGPU target.

The printf expansion has undefined behaviour if the format string is
not a compile-time constant. As a sufficient condition, the HIP
ToolChain now emits -Werror=format-nonliteral.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D71365
2020-01-16 15:15:38 +05:30