12 Commits

Author SHA1 Message Date
Weining Lu
a41bcb3930 [lld][LoongArch] Fix handleUleb128 2024-03-05 23:20:35 +08:00
Jinyang He
eaa9ef678c
[lld][LoongArch] Support the R_LARCH_{ADD,SUB}_ULEB128 relocation types (#81133)
For a label difference like `.uleb128 A-B`, MC generates a pair of
R_LARCH_{ADD,SUB}_ULEB128 if A-B cannot be folded as a constant. GNU
assembler generates a pair of relocations in more cases (when A or B is
in a code section with linker relaxation). It is similar to RISCV.

R_LARCH_{ADD,SUB}_ULEB128 relocations are created by Clang and GCC in
`.gcc_except_table` and other debug sections with linker relaxation
enabled. On LoongArch, first read the buf and count the available space.
Then add or sub the value. Finally truncate the expected value and fill
it into the available space.
2024-03-05 15:50:14 +08:00
Fangrui Song
4a3f7e798a
[ELF] Internalize enum
g++ -flto has a diagnostic `-Wodr` about mismatched redeclarations,
which even apply to `enum`.

Fix #83529

Reviewers: thesamesam

Reviewed By: thesamesam

Pull Request: https://github.com/llvm/llvm-project/pull/83604
2024-03-01 11:17:22 -08:00
Nico Weber
bf3d5dbe2f [lld/ELF] fix typos to cycle bots 2024-02-13 18:31:32 -05:00
Alexandre Ganea
5c4a630ab7 [LLD][ELF] Silence warning when building with latest MSVC
This fixes:
```
[193/3517] Building CXX object
tools\lld\ELF\CMakeFiles\lldELF.dir\Arch\LoongArch.cpp.obj
C:\git\llvm-project\lld\ELF\Arch\LoongArch.cpp(683): warning C4334:
'<<': result of 32-bit shift implicitly converted to 64 bits (was 64-bit
shift intended?
```
2024-02-07 22:04:39 -05:00
Jinyang He
06a728f3fe
[lld][ELF] Support relax R_LARCH_ALIGN (#78692)
Refer to commit 6611d58f5bbc ("Relax R_RISCV_ALIGN"), we can relax
R_LARCH_ALIGN by same way. Reuse `SymbolAnchor`, `RISCVRelaxAux` and
`initSymbolAnchors` to simplify codes. As `riscvFinalizeRelax` is an
arch-specific function, put it override on `TargetInfo::finalizeRelax`,
so that LoongArch can override it, too.

The flow of relax R_LARCH_ALIGN is almost consistent with RISCV. The
difference is that LoongArch only has 4-bytes NOP and all executable
insn is 4-bytes aligned. So LoongArch not need rewrite NOP sequence.
Alignment maxBytesEmit parameter is supported in psABI v2.30.
2024-02-06 09:09:13 +08:00
Lu Weining
38394a3d0b
[lld][LoongArch] Handle extreme code model relocs according to psABI v2.30 (#73387)
psABI v2.30 requires the extreme code model instructions sequence
(pcalau12i+addi.d+lu32i.d+lu52i.d) to be adjacent.

See https://github.com/llvm/llvm-project/pull/71907 and
https://github.com/loongson-community/discussions/issues/17 for details.
2024-01-10 18:03:52 +08:00
Lu Weining
88548df0fc
[lld][LoongArch] Support the R_LARCH_CALL36 relocation type (#73346)
R_LARCH_CALL36 was designed for function call on medium code model where
the 2 instructions (pcaddu18i + jirl) must be adjacent. This is expected
to replace current medium code model implementation, i.e.
R_LARCH_PCALA_{HI20,LO12} on pcalau12i + jirl.

See https://github.com/loongson/la-abi-specs/pull/3 for more details.
2023-12-25 17:40:48 +08:00
Weining Lu
84a20989c6 [lld][LoongArch] Add a another corner testcase for elf::getLoongArchPageDelta
Similar to e752b58e0d26.
2023-11-25 20:38:45 +08:00
Jinyang He
72accbfd0a
[lld][LoongArch] Support the R_LARCH_{ADD,SUB}6 relocation type (#72190)
The R_LARCH_{ADD,SUB}6 relocation type are usually used by DwarfCFA to
calculate a tiny offset. They appear after binutils 2.41, with GAS
enabling relaxation by default.
2023-11-15 09:57:45 +08:00
Weining Lu
8a31f7ddb8 [lld][LoongArch] Support the R_LARCH_PCREL20_S2 relocation type
`R_LARCH_PCREL20_S2` is a new added relocation type in LoongArch ELF
psABI v2.10 [1] which is not corvered by D138135 except `R_LARCH_64_PCREL`.

A motivation to support `R_LARCH_PCREL20_S2` in lld is to build the
runtime of .NET core (a.k.a `CoreCLR`) in which strict PC-relative
semantics need to be guaranteed [2]. The normal `pcalau12i + addi.d`
approach doesn't work because the code will be copied to other places
with different "page" and offsets. To achieve this, we can use `pcaddi`
with explicit `R_LARCH_PCREL20_S2` reloc to address +-2MB PC-relative
range with 4-bytes aligned.

[1]: https://github.com/loongson/la-abi-specs/releases/tag/v2.10
[2]: https://github.com/dotnet/runtime/blob/release/7.0/src/coreclr/vm/loongarch64/asmhelpers.S#L307

Reviewed By: xen0n, MaskRay

Differential Revision: https://reviews.llvm.org/D156772
2023-08-09 09:55:27 +08:00
WANG Xuerui
6084ee7420 [lld][ELF] Support LoongArch
This adds support for the LoongArch ELF psABI v2.00 [1] relocation
model to LLD. The deprecated stack-machine-based psABI v1 relocs are not
supported.

The code is tested by successfully bootstrapping a Gentoo/LoongArch
stage3, complete with common GNU userland tools and both the LLVM and
GNU toolchains (GNU toolchain is present only for building glibc,
LLVM+Clang+LLD are used for the rest). Large programs like QEMU are
tested to work as well.

[1]: https://loongson.github.io/LoongArch-Documentation/LoongArch-ELF-ABI-EN.html

Reviewed By: MaskRay, SixWeining

Differential Revision: https://reviews.llvm.org/D138135
2023-07-25 17:06:07 +08:00