30 Commits

Author SHA1 Message Date
Stefan Gränitz
55929cd679
[JITLink][AArch32] Implement Armv5 ldr-pc stubs and use them for all pre-v7 targets (#79082)
This stub type loads an absolute address directly into the PC register.
It's the simplest and most compatible way to implement a branch
indirection across the entire address space (and probably the slowest as
well). It's the ideal fallback for all targets for which we did not
(yet) implement a more performant solution.
2024-01-23 18:02:17 +01:00
Stefan Gränitz
9577806b1e
[JITLink][AArch32] Implement R_ARM_PREL31 and process .ARM.exidx sections (#79044)
`R_ARM_PREL31` is a 31-bits relative data relocation where the
most-significant bit is preserved. It's used primarily in `.ARM.exidx`
sections, which we skipped processing until now, because we didn't
support the relocation type. This was implemented in RuntimeDyld with
https://reviews.llvm.org/D25069 and I implemented it in a similar way in
JITLink in order to reach feature parity.
2024-01-23 03:37:32 +01:00
Stefan Gränitz
e5ca202ef8
[JITLink][AArch32] Multi-stub support for armv7/thumbv7 (#78371)
We want to emit stubs that match the instruction set state of the
relocation site. This is important for branches that have no built-in
switch for the instruction set state. It's the case for Jump24
relocations. Relocations on instructions that support switching on
the fly will be rewritten in a relaxation step in the future. This
affects Call relocations on `BL`/`BLX` instructions.

In this patch, the StubManager gains a second stub symbol slot for each
target and selects which one to use based on the relocation type. For
testing, we select the appropriate slot with a stub-kind filter, i.e.
`arm` or `thumb`. With that we can implement Armv7 stubs and test
that we can have both kinds of stubs for a single external symbol.
2024-01-23 02:59:30 +01:00
Stefan Gränitz
565470ed27 [JITLink][AArch32] Implement ELF relocation R_ARM_NONE 2024-01-22 16:47:17 +01:00
Stefan Gränitz
c4fc563b8d
[JITLink][AArch32] Add GOT builder and implement R_ARM_GOT_PREL relocations for ELF (#78753)
LLJIT needs this relocation for running deinitializers. Implementation and
test are adapted from test arm-fpic-got.s in LLD.
2024-01-22 12:00:24 +01:00
Stefan Gränitz
9c607e77ea [JITLink][AArch32] Refactor StubsManager (NFC) 2024-01-17 00:36:30 +01:00
Stefan Gränitz
a979797dc2 [JITLink][AArch32] Rename stubs flavor Thumbv7 to v7 (NFC) 2024-01-17 00:36:30 +01:00
Stefan Gränitz
e970652776 [JITLink][AArch32] Reflow code structure after llvm::endianness refactor (NFC) 2023-11-25 12:37:29 +01:00
Stefan Gränitz
b86420c614
[JITLink][AArch32] Add dynamic lookup for relocation fixup infos (#71649)
Specifying relocation fixup constants with name and type facilitates
readability and compile-time checks. The `FixupInfo<EdgeKind>` facade
organizes the information into entries per relocation type and provides
uniform access across Arm and Thumb relocations. Since it uses template
specializations, it doesn't limit potential entries. We cannot access
the entries dynamically though, because `EdgeKind` must be given as a
compile-time constant.

With this patch we populate a static lookup table on-demand and use it
for dynamic access in opcode-checks.
2023-11-24 21:45:50 +01:00
Stefan Gränitz
808caa9d46
[JITLink][AArch32] Run all error unittests throug main entrypoints (#72091)
Reading implicit addend from a relocation site doesn't require a complete
`LinkGraph` edge. The operation is independent from `TargetSymbol`,
but constructing an `Edge` instance required one. This patch fixes the
inconsistency and simplifies some setup code from the error unittests.

Furthermore this patch prepares for the `Arm`/`Thumb`/`Data` helper
functions to be turned into implementation details. Exposing them in the
API causes unfortunate inconsistencies that we don't want to error-check
all the time, e.g. passing `Thumb_Call` to `readAddendArm()`.
2023-11-15 11:18:23 +01:00
Eymen Ünay
87081f1c18
[JITLink][AArch32] Add support for ELF::R_ARM_THM_MOV{W_PREL_NC,T_PREL} (#70364)
Support for ELF::R_ARM_THM_MOVW_PREL_NC and ELF::R_ARM_THM_MOVT_PREL
is added. Move instructions with PC-relative immediates can be handled
in Thumb mode with this addition.
2023-11-09 11:51:02 +03:00
Kazu Hirata
02f67c097d Use llvm::endianness::{big,little,native} (NFC)
Note that llvm::support::endianness has been renamed to
llvm::endianness while becoming an enum class. This patch replaces
{big,little,native} with llvm::endianness::{big,little,native}.

This patch completes the migration to llvm::endianness and
llvm::endianness::{big,little,native}.  I'll post a separate patch to
remove the migration helpers in llvm/Support/Endian.h:

  using endianness = llvm::endianness;
  constexpr llvm::endianness big = llvm::endianness::big;
  constexpr llvm::endianness little = llvm::endianness::little;
  constexpr llvm::endianness native = llvm::endianness::native;
2023-10-13 23:16:25 -07:00
Kazu Hirata
a9d5056862 Use llvm::endianness (NFC)
Now that llvm::support::endianness has been renamed to
llvm::endianness, we can use the shorter form.  This patch replaces
support::endianness with llvm::endianness.
2023-10-10 21:54:15 -07:00
Kazu Hirata
9370271ec5
[Support] Redefine endianness::native (#67876)
We should eventually migrate llvm::support::endianness to std::endian
when C++20 is available for the codebase.

This patch prepares our codebase for that future by removing the
assumption that native is a unique value different from both big and
little.  Note that in C++20, native is equal to either big or little
on typical machines, where the endianness is the same for all scalar
types.
2023-10-03 18:39:59 -07:00
Eymen Ünay
e575b7cb7a
[JITlink][AArch32] Implement ELF::R_ARM_MOVT_ABS and R_ARM_MOVW_ABS_NC (#66219)
Add support for static Arm relocations of R_ARM_MOVT_ABS and R_ARM_MOVW_ABS_NC
which are emitted by movt and movw instructions. The implementation contains
relocation fixup and its testing as well as its encode/decode functions for
reading and writing immediate values together with its unittests.
2023-09-14 17:50:53 -07:00
Stefan Gränitz
21ee9e4b26 [JITLink][AArch32] Remove duplicate '0x' hex prefixes from formatv strings in error messages 2023-09-13 18:59:08 +02:00
Stefan Gränitz
1025189ea0 [JITLink][AArch32] Don't adjust Thumb bit in fixup code; it doesn't contribute to branch ranges
We don't have to set or clear the Thumb bit in relocation fixup values.
It's not part of the branch range and the respective encoding functions
like encodeImmBT4BlT1BlxT2() shift out the least significant bit anyway.

This was a leftover from the initial patch before we switched to store
Thumb state in target-flags with D146641.
2023-09-13 18:59:07 +02:00
Eymen Ünay
62f793ec9c [JITLink][AArch32] Implement ELF::R_ARM_JUMP24 relocation
Added support and test for ELF::R_ARM_JUMP24

Reviewed By: sgraenitz

Differential Revision: https://reviews.llvm.org/D157541
2023-09-13 17:16:29 +02:00
Eymen Ünay
142c89c381 [JITLink][AArch32] Implement ELF::R_ARM_CALL relocation
- Added WritableArmRelocation and ArmRelocation Structs
- Encode/Decode funcs for B/BL A1 and BLX A2 encodings
- Add ARM helper functions, consistent with the existing Thumb helper functions
- Add Test for ELF::R_ARM_CALL

Reviewed By: sgraenitz

Differential Revision: https://reviews.llvm.org/D157533
2023-09-13 17:16:29 +02:00
Eymen Ünay
9c017a99d5 [jitlink][rtdyld][checker] Re-apply 4b17c81d5a5 with fixes.
This re-applies 4b17c81d5a5, "[jitlink/rtdydl][checker] Add TargetFlag
dependent disassembler switching support", which was reverted in
4871a9ca546 due to bot failures.

The patch has been updated to add missing plumbing for Subtarget Features and
a CPU string, which should fix the failing tests.

https://reviews.llvm.org/D158280
2023-09-09 13:10:38 -07:00
Tom Weaver
4871a9ca54 Revert "[jitlink/rtdydl][checker] Add TargetFlag dependent disassembler switching support"
This reverts commit 4b17c81d5a5d3e0f514026c2b7f9b623d901cc04.

Caused buildbot failures:
https://lab.llvm.org/buildbot/#/builders/230/builds/18341
https://lab.llvm.org/buildbot/#/builders/109/builds/73169
https://lab.llvm.org/buildbot/#/builders/67/builds/12597
2023-09-08 13:41:11 +01:00
Eymen Ünay
4b17c81d5a [jitlink/rtdydl][checker] Add TargetFlag dependent disassembler switching support
Some targets such as AArch32 make use of TargetFlags to indicate ISA mode. Depending
on the TargetFlag, MCDisassembler and similar target specific objects should be
reinitialized with the correct Target Triple. Backends with similar needs can
easily extend this implementation for their usecase.

The drivers llvm-rtdyld and llvm-jitlink have their SymbolInfo's extended to take
TargetFlag into account. RuntimeDyldChecker can now create necessary TargetInfo
to reinitialize MCDisassembler and MCInstPrinter. The required triple is obtained
from the new getTripleFromTargetFlag function by checking the TargetFlag.

In addition, breaking changes for RuntimeDyld COFF Thumb tests are fixed by making
the backend emit a TargetFlag.

Reviewed By: lhames, sgraenitz

Differential Revision: https://reviews.llvm.org/D158280
2023-09-08 09:06:15 +02:00
Eymen Ünay
3e7cd5ea1e [JITLink][AArch32] Fixes for initial AArch32 backend
Fix masking error in Thumb_Jump24
Fix halfword comparisons in asserts
Add Data_Pointer32 to getEdgeKindName

Reviewed By: sgraenitz

Differential Revision: https://reviews.llvm.org/D157540
2023-09-06 13:10:14 +02:00
Lang Hames
dce179396e [JITLink][aarch32] Change writeRegister's return type to void.
This function does not return a value.

https://github.com/llvm/llvm-project/issues/64418
2023-08-04 10:34:18 -07:00
Stefan Gränitz
a05a98a230 [JITLink][AArch32] Implement ELF::R_ARM_ABS32 after we stopped skipping debug info sections
We create LinkGraph sections with NoAlloc lifetime now since f05ac803ffe76c7f4299a4e1288cc6bb8b098410
This means we do process debug info sections now with all their relocations. That's ok for the moment.
2023-04-05 18:02:12 +02:00
Benjamin Kramer
03df67e785 [JITLink] Drop using namespace
I don't think these are holding their weight and cause nasty to debug
compiler issues with some versions of MSVC as seen in
https://reviews.llvm.org/D144083#4220866

Just qualify the types with the full name.
2023-03-27 15:20:40 +02:00
Stefan Gränitz
4cb0b7ce3b [JITLink] Fix MSVC build error: formatv can't handle support::ulittle16_t values
The issue was reported with compiler output here: https://reviews.llvm.org/D144083#4219383
2023-03-24 20:53:27 +01:00
Stefan Gränitz
5c1d160cd9 Reland "[JITLink] Initial AArch32 backend"
This first version lays the foundations for AArch32 support in JITLink. ELFLinkGraphBuilder_aarch32 processes REL-type relocations and populates LinkGraphs from ELF object files for both big- and little-endian systems. The ArmCfg member controls subarchitecture-specific details throughout the linking process (i.e. it's passed to ELFJITLinker_aarch32).

Relocation types follow the ABI documentation's division into classes: Data (endian-sensitive), Arm (32-bit little-endian) and Thumb (2x 16-bit little-endian, "Thumb32" in the docs). The implementation of instruction encoding/decoding for relocation resolution is implemented symmetrically and is testable in isolation (see AArch32 category in JITLinkTests).

Callable Thumb functions are marked with a ThumbSymbol target-flag and stored in the LinkGraph with their real addresses. The thumb-bit is added back in when the owning JITDylib requests the address for such a symbol.

The StubsManager can generate (absolute) Thumb-state stubs for branch range extensions on v7+ targets. Proper GOT/PLT handling is not yet implemented.

This patch is based on the backend implementation in ez-clang and has just enough functionality to model the infrastructure and link a Thumb function `main()` that calls `printf()` to dump "Hello Arm!" on Armv7a. It was tested on Raspberry Pi with 32-bit Raspbian OS.

Reviewed By: lhames

Differential Revision: https://reviews.llvm.org/D144083
2023-03-24 10:18:08 +01:00
Gulfem Savrun Yeniceri
f23dcb2f2a Revert "[JITLink] Initial AArch32 backend"
This reverts commit c2de8ff92753acdb1ace7a27cc11cb09f28eb8fa.
It caused a segmentation fault while running ExecutionEngine
tests on Mac.
https://luci-milo.appspot.com/ui/p/fuchsia/builders/toolchain.ci/clang-mac-x64/b8785839382041226465/overview
2023-03-23 20:56:43 +00:00
Stefan Gränitz
c2de8ff927 [JITLink] Initial AArch32 backend
This first version lays the foundations for AArch32 support in JITLink. ELFLinkGraphBuilder_aarch32 processes REL-type relocations and populates LinkGraphs from ELF object files for both big- and little-endian systems. The ArmCfg member controls subarchitecture-specific details throughout the linking process (i.e. it's passed to ELFJITLinker_aarch32).

Relocation types follow the ABI documentation's division into classes: Data (endian-sensitive), Arm (32-bit little-endian) and Thumb (2x 16-bit little-endian, "Thumb32" in the docs). The implementation of instruction encoding/decoding for relocation resolution is implemented symmetrically and is testable in isolation (see AArch32 category in JITLinkTests).

Callable Thumb functions are marked with a ThumbSymbol target-flag and stored in the LinkGraph with their real addresses. The thumb-bit is added back in when the owning JITDylib requests the address for such a symbol.

The StubsManager can generate (absolute) Thumb-state stubs for branch range extensions on v7+ targets. Proper GOT/PLT handling is not yet implemented.

This patch is based on the backend implementation in ez-clang and has just enough functionality to model the infrastructure and link a Thumb function `main()` that calls `printf()` to dump "Hello Arm!" on Armv7a. It was tested on Raspberry Pi with 32-bit Raspbian OS.

Reviewed By: lhames

Differential Revision: https://reviews.llvm.org/D144083
2023-03-23 11:25:45 +01:00