131 Commits

Author SHA1 Message Date
Helena Kotas
b42fa8645c
[DXIL] Add lowering for ceil (#87043)
Add lowering of llvm.ceil intrinsics to DXIL ops.

Fixes #86984
2024-03-29 15:09:44 -04:00
Farzon Lotfi
e74332a266
[HLSL][DXIL] HLSL's round should follow roundeven behavior (#87078)
fixes #86999
2024-03-29 13:19:28 -04:00
Helena Kotas
62d6beba97
[DXIL] Add lowering for reversebits and trunc (#86909)
Add lowering of `llvm.bitreverse` and `llvm.trunc` intrinsics to DXIL
ops.

Fixes #86582
Fixes #86581
2024-03-28 17:41:33 -04:00
Farzon Lotfi
36b86438d7
[DXIL] Implement pow lowering (#86733)
closes #86179
- `DXILIntrinsicExpansion.cpp` - add the pow expansion to
exp2(y*log2(x))
2024-03-28 12:32:28 -04:00
Farzon Lotfi
5cf1e2e2ec
[DXIL] Implement log intrinsic Lowering (#86569)
Completes #86192
`DXIL.td` - add log2 to dxilop lowering
`DXILIntrinsicExpansion.cpp` - add log and log10 to log2 expansions
2024-03-26 12:46:11 -04:00
Farzon Lotfi
4cea2d049f
[HLSL][DXIL] implement sqrt intrinsic (#86560)
completes #86187
- fix hlsl_intrinsic to cover the correct cases
- move to using `__builtin_elementwise_sqrt`
- add lowering of `Intrinsic::sqrt` to dxilop 24.
2024-03-25 18:02:30 -04:00
Farzon Lotfi
060df78cdb
[DXIL] Add Float Dot Intrinsic Lowering (#86071)
Completes #83626
- `CGBuiltin.cpp` - modify `getDotProductIntrinsic` to be able to emit
`dot2`, `dot3`, and `dot4` intrinsics based on element count
- `IntrinsicsDirectX.td` - for floating point add `dot2`, `dot3`, and
`dot4` inntrinsics -`DXIL.td` add dxilop intrinsic lowering for `dot2`,
`dot3`, & `dot4`.
- `DXILOpLowering.cpp` - add vector arg flattening for dot product. 
- `DXILOpBuilder.h` - modify `createDXILOpCall` to take a smallVector
instead of an iterator
- `DXILOpBuilder.cpp` - modify `createDXILOpCall` by moving the small
vector up to the calling function in `DXILOpLowering.cpp`.
- Moving one function up gives us access to the `CallInst` and
`Function` which were needed to distinguish the dot product intrinsics
and get the operands without using the iterator.
2024-03-25 18:01:46 -04:00
Chris B
7c8f754456
Fix failing tests after #86242 (#86572)
PR #86242 introduced a copy-paste error that caused some tests to fail
by mapping the wrong pass name to a pass. This resolves the issue and
fixes the failing tests.
2024-03-25 16:23:23 -05:00
Justin Bogner
a83ed0423d
[DirectX] Follow naming conventions for enumerators in DXILABI.h. NFC (#86237)
These all-caps names differ from the llvm naming conventions for no good
reason, and `VOID` in all caps can cause problems in windows
environments (see [1]). Rename them to UpperCamelCase.

[1]: https://github.com/clangd/clangd/issues/1983
2024-03-25 09:49:32 -07:00
paperchalice
76fdb5902f
[NewPM][DirectX] Add DirectXPassRegistry.def NFCI (#86242)
Prepare migration for dag-isel
2024-03-23 10:37:53 +08:00
Farzon Lotfi
79c32eb03d
[DXIL] Add lowerings for cosine and floor (#86173)
Completes #86170
Completes #86172
- `DXIL.td` - Add changes to lower the cosine and floor intrinsics to
dxilOps.
2024-03-22 07:02:47 -04:00
Farzon Lotfi
d8e5c0b4e5
[DXIL] Complete abs lowering (#86158)
This change completes #86155
- `DXIL.td` - lowering `fabs` intrinsic to the float dxil op.
- `DXILIntrinsicExpansion.cpp` - Add intrinsic expansion for the abs
case.
2024-03-22 07:01:01 -04:00
S. Bharadwaj Yadavalli
3f39571228
[DirectX][DXIL] Distinguish return type for overload type resolution. (#85646)
Return type of DXIL Ops may be different from valid overload type of the
parameters, if any. Such DXIL Ops are correctly represented in DXIL.td.
However, DXILEmitter assumes the return type to be the same as parameter
overload type, if one exists. This results in generation in incorrect
overload index value in DXILOperation.inc for the DXIL Op and incorrect
DXIL operation function call in DXILOpLowering pass.

This change distinguishes return types correctly from parameter overload
types in DXILEmitter backend to handle such DXIL ops.

Add specification for DXIL Op `isinf` and corresponding tests to verify
the above change.

Fixes issue #85125
2024-03-20 14:48:16 -04:00
Farzon Lotfi
081a66ffac
[DXIL] implement dot intrinsic lowering for integers (#85662)
this implements part 1 of 2 for #83626
- `CGBuiltin.cpp` - modified to have seperate cases for signed and
unsigned integers.
- `SemaChecking.cpp` - modified to prevent the generation of a double
dot product intrinsic if the builtin were to be called directly.
- `IntrinsicsDirectX.td` creation of the signed and unsigned dot
intrinsics needed for instruction expansion.
- `DXILIntrinsicExpansion.cpp` - handle instruction expansion cases for
integer dot product.
2024-03-19 12:03:43 -04:00
Xiang Li
4dc037019f
[DirectX] Add DXIL_MODULE_FLAG for ShaderFlags. (#83217)
Add DXIL module flag bit offset for SHADER_FEATURE_FLAG.

Added DXIL_MODULE_FLAG for DXIL module flag which does not have feature flag.

Use DXILModuleFlags for ComputedShaderFlags instead of
ShaderFeatureFlags.

ComputedShaderFlags::getFeatureFlags() was added to get FeatureFlags.

Rename DXContainerGlobals::getShaderFlags to DXContainerGlobals::getFeatureFlags.

Fixes #57925
2024-03-17 19:13:39 -04:00
Farzon Lotfi
8386a388bd
[HLSL] implement clamp intrinsic (#85424)
closes #70071
- `CGBuiltin.cpp` - Add the unsigned\generic clamp intrinsic emitter.
- `IntrinsicsDirectX.td` - add the `dx.clamp` & `dx.uclamp` intrinsics
- `DXILIntrinsicExpansion.cpp` - add the `clamp` instruction expansion
while maintaining vector form.
- `SemaChecking.cpp` -  Add `clamp`  builtin Sema Checks.
- `Builtins.td` - add a `clamp` builtin
- `hlsl_intrinsics.h` - add the `clamp` api

Why `clamp` as instruction expansion  for DXIL?
1. SPIR-V has a GLSL `clamp` extension via:
-
[FClamp](https://registry.khronos.org/SPIR-V/specs/1.0/GLSL.std.450.html#FClamp)
-
[UClamp](https://registry.khronos.org/SPIR-V/specs/1.0/GLSL.std.450.html#UClamp)
-
[SClamp](https://registry.khronos.org/SPIR-V/specs/1.0/GLSL.std.450.html#SClamp)
2. Further Clamp lowers to `min(max( x, min_range ), max_range)` which
we have float, signed, & unsigned dixilOps.
2024-03-15 20:57:08 -04:00
Farzon Lotfi
de1a97db39
[DXIL] exp, any, lerp, & rcp Intrinsic Lowering (#84526)
This change implements lowering for #70076, #70100, #70072, & #70102 
`CGBuiltin.cpp` - - simplify `lerp` intrinsic
`IntrinsicsDirectX.td` - simplify `lerp` intrinsic
`SemaChecking.cpp` - remove unnecessary check
`DXILIntrinsicExpansion.*` - add intrinsic to instruction expansion
cases
`DXILOpLowering.cpp` - make sure `DXILIntrinsicExpansion` happens first
`DirectX.h` - changes to support new pass
`DirectXTargetMachine.cpp` - changes to support new pass

Why `any`, and `lerp` as instruction expansion just for DXIL?
- SPIR-V there is an
[OpAny](https://registry.khronos.org/SPIR-V/specs/unified1/SPIRV.html#OpAny)
- SPIR-V has a GLSL lerp extension via
[Fmix](https://registry.khronos.org/SPIR-V/specs/1.0/GLSL.std.450.html#FMix)

Why `exp` instruction expansion?
- We have an `exp2` opcode and `exp` reuses that opcode. So instruction
expansion is a convenient way to do preprocessing.
- Further SPIR-V has a GLSL exp extension via
[Exp](https://registry.khronos.org/SPIR-V/specs/1.0/GLSL.std.450.html#Exp)
and
[Exp2](https://registry.khronos.org/SPIR-V/specs/1.0/GLSL.std.450.html#Exp2)

Why `rcp` as instruction expansion?
This one is a bit of the odd man out and might have to move to
`cgbuiltins` when we better understand SPIRV requirements. However I
included it because it seems like [fast math mode has an AllowRecip
flag](https://registry.khronos.org/SPIR-V/specs/unified1/SPIRV.html#_fp_fast_math_mode)
which lets you compute the reciprocal without performing the division.
We don't have that in DXIL so thought to include it.
2024-03-14 20:25:57 -04:00
Farzon Lotfi
8f9ee39c58
[HLSL] Implement rsqrt intrinsic (#84820)
This change implements #70074
- `hlsl_intrinsics.h` - add the `rsqrt` api
- `DXIL.td` add the llvm intrinsic to DXIL op lowering map.
- `Builtins.td` - add an hlsl builtin for rsqrt.
- `CGBuiltin.cpp` add the ir generation for the rsqrt intrinsic.
- `SemaChecking.cpp` - reuse the one arg float only  checks.
- `IntrinsicsDirectX.td` -add an `rsqrt` intrinsic.
2024-03-14 16:49:33 -04:00
S. Bharadwaj Yadavalli
54f631d116
[DirectX][NFC] Model precise overload type specification of DXIL Ops (#83917)
Implement an abstraction to specify precise overload types supported by
DXIL ops. These overload types are typically a subset of LLVM
intrinsics.

Implement the corresponding changes in DXILEmitter backend.

Add tests to verify expected errors for unsupported overload types at
code generation time.

Add tests to check for correct overload error output.
2024-03-12 16:51:18 -04:00
Farzon Lotfi
b2ca23aed8
[HLSL] implement exp intrinsic (#83832)
This change implements: #70072

- `hlsl_intrinsics.h` - add the `exp` api
- `DXIL.td` - add the llvm intrinsic to DXIL opcode lowering mapping.
- This change reuses llvm's existing intrinsic
`__builtin_elementwise_exp` \ `int_exp` & `__builtin_elementwise_exp2` \
`int_exp2`
- This PR is part 1 of 2.
- Part 2 requires an intrinsic to instructions lowering.
Part2 will expand `int_exp` to 
```
A = Builder.CreateFMul(log2eConst, val);
int_exp2(A)
```
just like we do in
[TranslateExp](https://github.com/microsoft/DirectXShaderCompiler/blob/main/lib/HLSL/HLOperationLower.cpp#L2220C1-L2236C2)
2024-03-05 12:42:33 -05:00
Farzon Lotfi
643b31dbe8
[HLSL] implement mad intrinsic (#83826)
This change implements #83736
The dot product lowering needs a tertiary multipy add operation. DXIL
has three mad opcodes for `fmad`(46), `imad`(48), and `umad`(49). Dot
product in DXIL only uses `imad`\ `umad`, but for completeness and
because the hlsl `mad` intrinsic requires it `fmad` was also included.
Two new intrinsics were needed to be created to complete this change.
the `fmad` case already supported by llvm via `fmuladd` intrinsic.

- `hlsl_intrinsics.h` - exposed mad api call.
- `Builtins.td` - exposed a `mad` builtin.
- `Sema.h` - make `tertiary` calls check for float types optional. 
- `CGBuiltin.cpp` - pick the intrinsic for singed\unsigned & float also
reuse `int_fmuladd`.
- `SemaChecking.cpp` - type checks for `__builtin_hlsl_mad`. 
- `IntrinsicsDirectX.td` create the two new intrinsics for
`imad`\`umad`/
- `DXIL.td` - create the llvm intrinsic to  `DXIL` opcode mapping.

---------

Co-authored-by: Farzon Lotfi <farzon@farzon.com>
2024-03-05 12:23:26 -05:00
Farzon Lotfi
e741d889f4
[DXIL] Add frac unary lowering (#83465)
This change adds lowering for HLSL's frac intrinsic to DXIL.

This change should complete #70099
2024-03-01 12:53:05 -05:00
Farzon Lotfi
b542501ad7
[HLSL][DXIL] Implementation of round intrinsic (#83570)
hlsl_intrinsics.h - add the round  api
DXIL.td add the llvm intrinsic to DXIL lowering mapping 
This change reuses llvm's existing intrinsic
`__builtin_elementwise_round`\ `int_round`
This change implements: #70077
2024-03-01 12:27:25 -05:00
S. Bharadwaj Yadavalli
b1c8b9f89c
[DirectX][NFC] Leverage LLVM and DirectX intrinsic description in DXIL Op records (#83193)
* Leverage TableGen record descriptions of LLVM or DirectX intrinsics
that can be directly mapped in DXIL Ops TableGen description. As a
result, such DXIL Ops can be succinctly described without duplication.
DXILEmitter backend can derive the properties of DXIL Ops accordingly.
* Ensured that corresponding lit tests pass.
2024-02-29 06:21:44 -08:00
Xiang Li
50136ca11f
[DirectX][NFC] Rename ShaderFlag to SHADER_FEATURE_FLAG. (#82700)
This is preparation for add ShaderFlag in DXIL.

For #57925
2024-02-27 21:01:37 -05:00
S. Bharadwaj Yadavalli
54a6cf1506
[DirectX][NFC] Use LLVM Types in DXIL Operation specifications in DXIL.td (#81692)
This change uniformly uses LLVM Types in the specification of parameter
types and overload types of DXIL operation.

Updated (a) parameter types accordingly in the specification of existing
DXILOperations and (b) DXILEmitter.
2024-02-22 13:10:58 -05:00
S. Bharadwaj Yadavalli
8ba4ff3925
[DirectX][NFC] Change specification of overload types and attribute in DXIL.td (#81184)
- Specify overload types of DXIL Operation as list of types instead of a
string.
- Add supported DXIL type record definitions to `DXIL.td` leveraging
`LLVMType` to avoid duplicate definitions.
 - Spell out DXIL Operation Attribute specification string.
 - Make corresponding changes to process the records in DXILEmitter.cpp
2024-02-13 08:12:03 -08:00
S. Bharadwaj Yadavalli
758fd59d01
[DirectX][NFC] Change usage pattern *Dxil* to *DXIL* for uniformity (#80778)
Match DXIL TableGen class names with structure names in DXIL Emitter. 
Delete unnecessary Name field.
2024-02-08 10:02:32 -08:00
S. Bharadwaj Yadavalli
152325d342
[DirectX][NFC] Change all DXIL TableGen tokens to CamelCase (#80714)
These changes are in preparation for potential improvement of DXIL
operation description and addition of more DXIL operations to `DXIL.td`.
2024-02-05 14:52:15 -06:00
Justin Bogner
ad7131864f
[DirectX] Move DXIL ResourceKind and ElementType to DXILABI.h. NFC
Pull Request: https://github.com/llvm/llvm-project/pull/78225
2024-01-29 09:51:00 -08:00
Justin Bogner
db6bf92123
[DirectX] Rename DXILOperationCommon.h to DXILABI.h. NFC
This is a good place to put all of the ABI-sensitive DXIL values that
we'll need in both reading and writing contexts.

Pull Request: https://github.com/llvm/llvm-project/pull/78224
2024-01-29 09:19:47 -08:00
Björn Pettersson
d09315d986
[opt][NewPM] Add isRequired to passes named as *PrinterPass (#76516)
Passes that print the result of analysis passes should be of interest, and
are expected to run even if a function for example is marked as optnone.
So when adding such passes explicitly to a pipeline it makes sense to
run the pass regardless of standard instrumentation gates such as
OptNoneInstrumentation.

In this patch all passes named as *PrinterPass are marked as required.
That should make sure that those passes are executed
without being skipped due to standard instrumentations.

The polly passes are not touched in this patch.

Partial fix for: https://github.com/llvm/llvm-project/issues/76762
2024-01-03 13:46:29 +01:00
paperchalice
ffb1f20e0d
[CodeGen] Add flag to populate target pass names (#76328)
`print-pipeline-passes` can show target pass names.
2024-01-03 09:07:02 +08:00
Kazu Hirata
af8d050286 [Target] Use range-based for loops (NFC) 2023-12-24 23:09:55 -08:00
Justin Bogner
4f54d71501
[HLSL][DirectX] Move handling of resource element types into the frontend
Rather than shepherding a type name all the way to the backend as a
string and attempting to parse it, get the element type out of the AST
and store that in the resource annotation metadata directly.

Pull Request: https://github.com/llvm/llvm-project/pull/75674
2023-12-18 11:43:52 -07:00
Kazu Hirata
395f9ce30e Use StringRef::{starts,ends}_with (NFC)
This patch replaces uses of StringRef::{starts,ends}with with
StringRef::{starts,ends}_with for consistency with
std::{string,string_view}::{starts,ends}_with in C++20.

I'm planning to deprecate and eventually remove
StringRef::{starts,ends}with.
2023-12-16 10:14:44 -08:00
Justin Bogner
7a13e410fd
[DirectX] Move ROV info into HLSL metadata. NFC
Pull Request: https://github.com/llvm/llvm-project/pull/74896
2023-12-09 10:42:45 -08:00
Justin Bogner
18f0da26b2 [HLSL][DirectX] Avoid some unnecessary casting. NFC 2023-12-08 15:38:09 -08:00
Sander de Smalen
81b7f115fb
[llvm][TypeSize] Fix addition/subtraction in TypeSize. (#72979)
It seems TypeSize is currently broken in the sense that:

  TypeSize::Fixed(4) + TypeSize::Scalable(4) => TypeSize::Fixed(8)

without failing its assert that explicitly tests for this case:

  assert(LHS.Scalable == RHS.Scalable && ...);

The reason this fails is that `Scalable` is a static method of class
TypeSize,
and LHS and RHS are both objects of class TypeSize. So this is
evaluating
if the pointer to the function Scalable == the pointer to the function
Scalable,
which is always true because LHS and RHS have the same class.

This patch fixes the issue by renaming `TypeSize::Scalable` ->
`TypeSize::getScalable`, as well as `TypeSize::Fixed` to
`TypeSize::getFixed`,
so that it no longer clashes with the variable in
FixedOrScalableQuantity.

The new methods now also better match the coding standard, which
specifies that:
* Variable names should be nouns (as they represent state)
* Function names should be verb phrases (as they represent actions)
2023-11-22 08:52:53 +00:00
Paulo Matos
7b9d73c2f9
[NFC] Remove Type::getInt8PtrTy (#71029)
Replace this with PointerType::getUnqual().
Followup to the opaque pointer transition. Fixes an in-code TODO item.
2023-11-07 17:26:26 +01:00
Justin Bogner
1abc931d46
[DirectX] Remove redundant resource kind handling. NFC (#70691)
The frontend passes this along since https://reviews.llvm.org/D135335
2023-10-30 13:35:25 -07:00
Fangrui Song
8e247b8f47 Replace TypeSize::{getFixed,getScalable} with canonical TypeSize::{Fixed,Scalable}. NFC 2023-10-27 00:30:41 -07:00
Kazu Hirata
4a0ccfa865 Use llvm::endianness::{big,little,native} (NFC)
Note that llvm::support::endianness has been renamed to
llvm::endianness while becoming an enum class as opposed to an
enum. This patch replaces support::{big,little,native} with
llvm::endianness::{big,little,native}.
2023-10-12 21:21:45 -07:00
Arthur Eubanks
0a1aa6cda2
[NFC][CodeGen] Change CodeGenOpt::Level/CodeGenFileType into enum classes (#66295)
This will make it easy for callers to see issues with and fix up calls
to createTargetMachine after a future change to the params of
TargetMachine.

This matches other nearby enums.

For downstream users, this should be a fairly straightforward
replacement,
e.g. s/CodeGenOpt::Aggressive/CodeGenOptLevel::Aggressive
or s/CGFT_/CodeGenFileType::
2023-09-14 14:10:14 -07:00
Xiang Li
c21cd168bb
[DirectX backend] avoid generate redundant bitcast in DXILPrepareModule (#65163)
When emit NoOp bitcast for GEP Ptr Operand, should use SourceElementType
instead of ResultElementType.

**Behavior Before Change**
Redundant bitcast like 
   ` bitcast ptr addrspace(3) @gs to ptr addrspace(3)`
 will be generated for llvm/test/CodeGen/DirectX/typed_ptr.ll

**Behavior After Change**
  No bitcast will be generated.

Fixes https://github.com/llvm/llvm-project/issues/65183
2023-09-01 20:08:39 -04:00
Justin Bogner
d7f3b238fd [DXILBitcodeWriter] Fix handling of an unspecified lower bound in DISubrange
If the lower bound isn't specified it implies that it's zero.

Differential Revision: https://reviews.llvm.org/D158441
2023-08-21 14:30:45 -07:00
Justin Bogner
48e0a6f902 [DXILBitcodeWriter] Don't create a new abbrev per MDString
We were running out of abbrevs and crashing if there were more than 20
something strings in metadata, which turned out to be a bug where we
created an abbrev every time we emitted a string rather than just one
for the string table.

Differential Revision: https://reviews.llvm.org/D158440
2023-08-21 13:58:38 -07:00
Justin Bogner
72017fcf00 [DirectX] Only embed dxil when writing object files
When emitting assembly we don't particularly want the binary DXIL
embedded in the output. This was mostly there for testing purposes, so
we update those tests to run the test directly using `opt` and
restrict the -dxil-embed and -dxil-globals passes to running normally
only in the case where we're trying to emit a DXContainer.

Differential Revision: https://reviews.llvm.org/D158051
2023-08-16 13:12:32 -07:00
Bjorn Pettersson
e53b28c833 [llvm] Drop some bitcasts and references related to typed pointers
Differential Revision: https://reviews.llvm.org/D157551
2023-08-10 15:07:07 +02:00
Fangrui Song
7e39e2e519 [DirectX,SPIRV] Migrate to new encodeInstruction that uses SmallVectorImpl<char>. NFC 2023-08-09 15:24:58 -07:00