2 Commits

Author	SHA1	Message	Date
Harvin Iriawan	db158c7c83	[AArch64] Update generic sched model to A510 ... Refresh of the generic scheduling model to use A510 instead of A55. Main benefits are to the little core, and introducing SVE scheduling information. Changes tested on various OoO cores, no performance degradation is seen. Differential Revision: https://reviews.llvm.org/D156799	2023-08-21 12:25:15 +01:00
Ties Stuij	2f778e60c9	[AArch64] SelectionDag codegen for gpr CTZ instruction ... When feature CSSC is available we should use instruction CTZ in SelectionDag where applicable: - CTTZ intrinsics are lowered to using the gpr CTZ instruction - BITREVERSE -> CTLZ instruction pattern gets replaced by CTZ spec: https://developer.arm.com/documentation/ddi0602/2022-09/Base-Instructions/CTZ--Count-Trailing-Zeros- Reviewed By: lenary Differential Revision: https://reviews.llvm.org/D138811	2022-12-06 10:42:07 +00:00