62 Commits

Author SHA1 Message Date
Helena Kotas
b42fa8645c
[DXIL] Add lowering for ceil (#87043)
Add lowering of llvm.ceil intrinsics to DXIL ops.

Fixes #86984
2024-03-29 15:09:44 -04:00
Farzon Lotfi
e74332a266
[HLSL][DXIL] HLSL's round should follow roundeven behavior (#87078)
fixes #86999
2024-03-29 13:19:28 -04:00
Helena Kotas
62d6beba97
[DXIL] Add lowering for reversebits and trunc (#86909)
Add lowering of `llvm.bitreverse` and `llvm.trunc` intrinsics to DXIL
ops.

Fixes #86582
Fixes #86581
2024-03-28 17:41:33 -04:00
Farzon Lotfi
36b86438d7
[DXIL] Implement pow lowering (#86733)
closes #86179
- `DXILIntrinsicExpansion.cpp` - add the pow expansion to
exp2(y*log2(x))
2024-03-28 12:32:28 -04:00
Farzon Lotfi
5cf1e2e2ec
[DXIL] Implement log intrinsic Lowering (#86569)
Completes #86192
`DXIL.td` - add log2 to dxilop lowering
`DXILIntrinsicExpansion.cpp` - add log and log10 to log2 expansions
2024-03-26 12:46:11 -04:00
Farzon Lotfi
4cea2d049f
[HLSL][DXIL] implement sqrt intrinsic (#86560)
completes #86187
- fix hlsl_intrinsic to cover the correct cases
- move to using `__builtin_elementwise_sqrt`
- add lowering of `Intrinsic::sqrt` to dxilop 24.
2024-03-25 18:02:30 -04:00
Farzon Lotfi
060df78cdb
[DXIL] Add Float Dot Intrinsic Lowering (#86071)
Completes #83626
- `CGBuiltin.cpp` - modify `getDotProductIntrinsic` to be able to emit
`dot2`, `dot3`, and `dot4` intrinsics based on element count
- `IntrinsicsDirectX.td` - for floating point add `dot2`, `dot3`, and
`dot4` inntrinsics -`DXIL.td` add dxilop intrinsic lowering for `dot2`,
`dot3`, & `dot4`.
- `DXILOpLowering.cpp` - add vector arg flattening for dot product. 
- `DXILOpBuilder.h` - modify `createDXILOpCall` to take a smallVector
instead of an iterator
- `DXILOpBuilder.cpp` - modify `createDXILOpCall` by moving the small
vector up to the calling function in `DXILOpLowering.cpp`.
- Moving one function up gives us access to the `CallInst` and
`Function` which were needed to distinguish the dot product intrinsics
and get the operands without using the iterator.
2024-03-25 18:01:46 -04:00
Farzon Lotfi
79c32eb03d
[DXIL] Add lowerings for cosine and floor (#86173)
Completes #86170
Completes #86172
- `DXIL.td` - Add changes to lower the cosine and floor intrinsics to
dxilOps.
2024-03-22 07:02:47 -04:00
Farzon Lotfi
d8e5c0b4e5
[DXIL] Complete abs lowering (#86158)
This change completes #86155
- `DXIL.td` - lowering `fabs` intrinsic to the float dxil op.
- `DXILIntrinsicExpansion.cpp` - Add intrinsic expansion for the abs
case.
2024-03-22 07:01:01 -04:00
S. Bharadwaj Yadavalli
3f39571228
[DirectX][DXIL] Distinguish return type for overload type resolution. (#85646)
Return type of DXIL Ops may be different from valid overload type of the
parameters, if any. Such DXIL Ops are correctly represented in DXIL.td.
However, DXILEmitter assumes the return type to be the same as parameter
overload type, if one exists. This results in generation in incorrect
overload index value in DXILOperation.inc for the DXIL Op and incorrect
DXIL operation function call in DXILOpLowering pass.

This change distinguishes return types correctly from parameter overload
types in DXILEmitter backend to handle such DXIL ops.

Add specification for DXIL Op `isinf` and corresponding tests to verify
the above change.

Fixes issue #85125
2024-03-20 14:48:16 -04:00
Farzon Lotfi
081a66ffac
[DXIL] implement dot intrinsic lowering for integers (#85662)
this implements part 1 of 2 for #83626
- `CGBuiltin.cpp` - modified to have seperate cases for signed and
unsigned integers.
- `SemaChecking.cpp` - modified to prevent the generation of a double
dot product intrinsic if the builtin were to be called directly.
- `IntrinsicsDirectX.td` creation of the signed and unsigned dot
intrinsics needed for instruction expansion.
- `DXILIntrinsicExpansion.cpp` - handle instruction expansion cases for
integer dot product.
2024-03-19 12:03:43 -04:00
Xiang Li
4dc037019f
[DirectX] Add DXIL_MODULE_FLAG for ShaderFlags. (#83217)
Add DXIL module flag bit offset for SHADER_FEATURE_FLAG.

Added DXIL_MODULE_FLAG for DXIL module flag which does not have feature flag.

Use DXILModuleFlags for ComputedShaderFlags instead of
ShaderFeatureFlags.

ComputedShaderFlags::getFeatureFlags() was added to get FeatureFlags.

Rename DXContainerGlobals::getShaderFlags to DXContainerGlobals::getFeatureFlags.

Fixes #57925
2024-03-17 19:13:39 -04:00
Farzon Lotfi
8386a388bd
[HLSL] implement clamp intrinsic (#85424)
closes #70071
- `CGBuiltin.cpp` - Add the unsigned\generic clamp intrinsic emitter.
- `IntrinsicsDirectX.td` - add the `dx.clamp` & `dx.uclamp` intrinsics
- `DXILIntrinsicExpansion.cpp` - add the `clamp` instruction expansion
while maintaining vector form.
- `SemaChecking.cpp` -  Add `clamp`  builtin Sema Checks.
- `Builtins.td` - add a `clamp` builtin
- `hlsl_intrinsics.h` - add the `clamp` api

Why `clamp` as instruction expansion  for DXIL?
1. SPIR-V has a GLSL `clamp` extension via:
-
[FClamp](https://registry.khronos.org/SPIR-V/specs/1.0/GLSL.std.450.html#FClamp)
-
[UClamp](https://registry.khronos.org/SPIR-V/specs/1.0/GLSL.std.450.html#UClamp)
-
[SClamp](https://registry.khronos.org/SPIR-V/specs/1.0/GLSL.std.450.html#SClamp)
2. Further Clamp lowers to `min(max( x, min_range ), max_range)` which
we have float, signed, & unsigned dixilOps.
2024-03-15 20:57:08 -04:00
Farzon Lotfi
de1a97db39
[DXIL] exp, any, lerp, & rcp Intrinsic Lowering (#84526)
This change implements lowering for #70076, #70100, #70072, & #70102 
`CGBuiltin.cpp` - - simplify `lerp` intrinsic
`IntrinsicsDirectX.td` - simplify `lerp` intrinsic
`SemaChecking.cpp` - remove unnecessary check
`DXILIntrinsicExpansion.*` - add intrinsic to instruction expansion
cases
`DXILOpLowering.cpp` - make sure `DXILIntrinsicExpansion` happens first
`DirectX.h` - changes to support new pass
`DirectXTargetMachine.cpp` - changes to support new pass

Why `any`, and `lerp` as instruction expansion just for DXIL?
- SPIR-V there is an
[OpAny](https://registry.khronos.org/SPIR-V/specs/unified1/SPIRV.html#OpAny)
- SPIR-V has a GLSL lerp extension via
[Fmix](https://registry.khronos.org/SPIR-V/specs/1.0/GLSL.std.450.html#FMix)

Why `exp` instruction expansion?
- We have an `exp2` opcode and `exp` reuses that opcode. So instruction
expansion is a convenient way to do preprocessing.
- Further SPIR-V has a GLSL exp extension via
[Exp](https://registry.khronos.org/SPIR-V/specs/1.0/GLSL.std.450.html#Exp)
and
[Exp2](https://registry.khronos.org/SPIR-V/specs/1.0/GLSL.std.450.html#Exp2)

Why `rcp` as instruction expansion?
This one is a bit of the odd man out and might have to move to
`cgbuiltins` when we better understand SPIRV requirements. However I
included it because it seems like [fast math mode has an AllowRecip
flag](https://registry.khronos.org/SPIR-V/specs/unified1/SPIRV.html#_fp_fast_math_mode)
which lets you compute the reciprocal without performing the division.
We don't have that in DXIL so thought to include it.
2024-03-14 20:25:57 -04:00
Farzon Lotfi
8f9ee39c58
[HLSL] Implement rsqrt intrinsic (#84820)
This change implements #70074
- `hlsl_intrinsics.h` - add the `rsqrt` api
- `DXIL.td` add the llvm intrinsic to DXIL op lowering map.
- `Builtins.td` - add an hlsl builtin for rsqrt.
- `CGBuiltin.cpp` add the ir generation for the rsqrt intrinsic.
- `SemaChecking.cpp` - reuse the one arg float only  checks.
- `IntrinsicsDirectX.td` -add an `rsqrt` intrinsic.
2024-03-14 16:49:33 -04:00
S. Bharadwaj Yadavalli
54f631d116
[DirectX][NFC] Model precise overload type specification of DXIL Ops (#83917)
Implement an abstraction to specify precise overload types supported by
DXIL ops. These overload types are typically a subset of LLVM
intrinsics.

Implement the corresponding changes in DXILEmitter backend.

Add tests to verify expected errors for unsupported overload types at
code generation time.

Add tests to check for correct overload error output.
2024-03-12 16:51:18 -04:00
Farzon Lotfi
b2ca23aed8
[HLSL] implement exp intrinsic (#83832)
This change implements: #70072

- `hlsl_intrinsics.h` - add the `exp` api
- `DXIL.td` - add the llvm intrinsic to DXIL opcode lowering mapping.
- This change reuses llvm's existing intrinsic
`__builtin_elementwise_exp` \ `int_exp` & `__builtin_elementwise_exp2` \
`int_exp2`
- This PR is part 1 of 2.
- Part 2 requires an intrinsic to instructions lowering.
Part2 will expand `int_exp` to 
```
A = Builder.CreateFMul(log2eConst, val);
int_exp2(A)
```
just like we do in
[TranslateExp](https://github.com/microsoft/DirectXShaderCompiler/blob/main/lib/HLSL/HLOperationLower.cpp#L2220C1-L2236C2)
2024-03-05 12:42:33 -05:00
Farzon Lotfi
643b31dbe8
[HLSL] implement mad intrinsic (#83826)
This change implements #83736
The dot product lowering needs a tertiary multipy add operation. DXIL
has three mad opcodes for `fmad`(46), `imad`(48), and `umad`(49). Dot
product in DXIL only uses `imad`\ `umad`, but for completeness and
because the hlsl `mad` intrinsic requires it `fmad` was also included.
Two new intrinsics were needed to be created to complete this change.
the `fmad` case already supported by llvm via `fmuladd` intrinsic.

- `hlsl_intrinsics.h` - exposed mad api call.
- `Builtins.td` - exposed a `mad` builtin.
- `Sema.h` - make `tertiary` calls check for float types optional. 
- `CGBuiltin.cpp` - pick the intrinsic for singed\unsigned & float also
reuse `int_fmuladd`.
- `SemaChecking.cpp` - type checks for `__builtin_hlsl_mad`. 
- `IntrinsicsDirectX.td` create the two new intrinsics for
`imad`\`umad`/
- `DXIL.td` - create the llvm intrinsic to  `DXIL` opcode mapping.

---------

Co-authored-by: Farzon Lotfi <farzon@farzon.com>
2024-03-05 12:23:26 -05:00
Farzon Lotfi
e741d889f4
[DXIL] Add frac unary lowering (#83465)
This change adds lowering for HLSL's frac intrinsic to DXIL.

This change should complete #70099
2024-03-01 12:53:05 -05:00
Farzon Lotfi
b542501ad7
[HLSL][DXIL] Implementation of round intrinsic (#83570)
hlsl_intrinsics.h - add the round  api
DXIL.td add the llvm intrinsic to DXIL lowering mapping 
This change reuses llvm's existing intrinsic
`__builtin_elementwise_round`\ `int_round`
This change implements: #70077
2024-03-01 12:27:25 -05:00
Justin Bogner
4f54d71501
[HLSL][DirectX] Move handling of resource element types into the frontend
Rather than shepherding a type name all the way to the backend as a
string and attempting to parse it, get the element type out of the AST
and store that in the resource annotation metadata directly.

Pull Request: https://github.com/llvm/llvm-project/pull/75674
2023-12-18 11:43:52 -07:00
Justin Bogner
7a13e410fd
[DirectX] Move ROV info into HLSL metadata. NFC
Pull Request: https://github.com/llvm/llvm-project/pull/74896
2023-12-09 10:42:45 -08:00
Justin Bogner
428af867d8
[DirectX] Update test after opt learned to infer datalayout (#70726)
Since e39f6c1844fa "[opt] Infer DataLayout from triple if not
specified", this test (correctly) emits a load of an i64 with 8 byte
alignment, rather than with 4 byte alignment.
2023-10-30 14:04:15 -07:00
Nathan Gauër
6bad175a87
[SPIRV][DX] Share one test between backends (#65975)
One big issue with DirectXShaderCompiler was test coverage: DXIL and
SPIR-V backends had their own tests. When a bug was found in one, the
other wasn't always checked. This lead to unequal support of HLSL for
both backends. We'd like to avoid those issues here, hence the
test-sharing.

By default, all the tests in this folder are marked as requiring
DirectX. But as SPIR-V support grows, each test drop this requirement,
and check the SPIR-V behavior.

I would have preferred to mark new tests as XFAIL for SPIR-V by default,
so we could differentiate real unsupported tests (as SPIR-V has no
equivalent), from newly added tests. But the way LIT is built, I don't
think this is possible.

---------

Signed-off-by: Nathan Gauër <brioche@google.com>
2023-09-21 12:15:55 +02:00
Xiang Li
c21cd168bb
[DirectX backend] avoid generate redundant bitcast in DXILPrepareModule (#65163)
When emit NoOp bitcast for GEP Ptr Operand, should use SourceElementType
instead of ResultElementType.

**Behavior Before Change**
Redundant bitcast like 
   ` bitcast ptr addrspace(3) @gs to ptr addrspace(3)`
 will be generated for llvm/test/CodeGen/DirectX/typed_ptr.ll

**Behavior After Change**
  No bitcast will be generated.

Fixes https://github.com/llvm/llvm-project/issues/65183
2023-09-01 20:08:39 -04:00
Justin Bogner
72017fcf00 [DirectX] Only embed dxil when writing object files
When emitting assembly we don't particularly want the binary DXIL
embedded in the output. This was mostly there for testing purposes, so
we update those tests to run the test directly using `opt` and
restrict the -dxil-embed and -dxil-globals passes to running normally
only in the case where we're trying to emit a DXContainer.

Differential Revision: https://reviews.llvm.org/D158051
2023-08-16 13:12:32 -07:00
Tobias Hieta
f84bac329b
[NFC][Py Reformat] Reformat lit.local.cfg python files in llvm
This is a follow-up to b71edfaa4ec3c998aadb35255ce2f60bba2940b0
since I forgot the lit.local.cfg files in that one.

Reformatting is done with `black`.

If you end up having problems merging this commit because you
have made changes to a python file, the best way to handle that
is to run git checkout --ours <yourfile> and then reformat it
with black.

If you run into any problems, post to discourse about it and
we will try to help.

RFC Thread below:

https://discourse.llvm.org/t/rfc-document-and-standardize-python-code-style

Reviewed By: barannikov88, kwk

Differential Revision: https://reviews.llvm.org/D150762
2023-05-17 17:03:15 +02:00
Fangrui Song
89e02c7aea [test] Update DirectX/min_vec_size.ll after shufflevector mask vector poison change 2023-05-04 22:30:36 -07:00
Tiwari Abhinav Ashok Kumar
bfb1559fbe [NFC] Fix missing colon in CHECK directives
Reviewed By: fhahn

Differential Revision: https://reviews.llvm.org/D144412
2023-02-21 00:13:04 +05:30
Xiang Li
944f4b2805 [DirectX backend] add support ConstantBuffer to DXILResource.h
class ConstantBuffer is added to save information for cbuffer.
Also add CBufferDataLayout to calculate the size for cbuffer.

Now always use legacy cbuffer layout.
https://reviews.llvm.org/D134998 will add control to disable legacy cbuffer layout.

Reviewed By: beanz

Differential Revision: https://reviews.llvm.org/D136031
2023-01-12 13:42:11 -05:00
Xiang Li
78a73dda60 [DirectX backend] PartSize not include PartHeader
PartSize for a part in dx container is only the size of the content of the part, not include size of the PartHeader.

Differential Revision: https://reviews.llvm.org/D141207
2023-01-09 19:10:21 -05:00
Xiang Li
b861507912 [DIrectX backend] emit metadata for entry.
New named metadata "dx.entryPoints" is added to save all entries.

Each entry is in format of
!{ptr to function, name, signature, resource table, extra}

For compute shader, the extra will save num of threads in format of {i32 x, i32 y, i32 z}

For library profile, an empty entry will be added to save the resource table for the library.

Signature and resource table metadata is not generated yet.

Differential Revision: https://reviews.llvm.org/D131807
2022-12-21 14:56:27 -05:00
Chris Bieneman
2b405e7e04 [NFC][DX] Update test case to use new opt flags
The legacy `-<pass>` options are now erroring out. This updates to the
new pass manager option.
2022-12-09 13:16:49 -06:00
Chris Bieneman
c861ea8736 Generate DXIL Shader hash
DXIL shader bitcode is hashed and the hash is placed into the final
output object file in its own data part.

This change modifies the DXContainerGlobals pass to compute the shader
hash (just an MD5 of the bitcode) and put the shader hash data into a
global for the HASH part.

This also sets the hash flag as appropriate for if the hashed shader
contained debug information. There is additional handling required to
get debug information in shaders working correctly with our tooling,
but that will be addressed in subsequent patches.

Reviewed By: python3kgae

Differential Revision: https://reviews.llvm.org/D139357
2022-12-07 15:22:55 -06:00
Xiang Li
ad68c66a38 [DirectX backend] Fix build and test error caused by out of sync with upstream change.
Fix build and test error caused by
a2620e00ff#
and
304f1d59ca

Reviewed By: beanz

Differential Revision: https://reviews.llvm.org/D137815
2022-11-14 12:50:23 -08:00
Xiang Li
996267d20e [DirectX backend] set target triple to "dxil-ms-dx"
Set target triple to "dxil-ms-dx" for DXIL at the end of DXILTranslateMetadata.

Reviewed By: beanz

Differential Revision: https://reviews.llvm.org/D131545
2022-10-24 14:49:31 -07:00
Chris Bieneman
4c7218e770 [HLSL] Remove unused frontend-generated ID
As @python3kgae pointed out we're going to want to assign these IDs
after optimization so that we can remove unused resrouces. This patch
just removes the unused ID value from the frontend metadata, clang code
generation, and updates associated test cases.

Reviewed By: python3kgae

Differential Revision: https://reviews.llvm.org/D136271
2022-10-21 12:41:09 -05:00
Chris Bieneman
607be386e7 [DX] Fix missing preserved analysis
The ShaderFlagsAnalysisWrapper needs to be marked to preserve all
analyssis.

Fixes #58474 (https://github.com/llvm/llvm-project/issues/58474)
2022-10-19 12:11:03 -05:00
Chris Bieneman
97ef68806f [DirectX] Disabling currently failing test
The pretty-printer isn't working because the resource analysis isn't
properly preservered.
2022-10-19 11:52:05 -05:00
Chris Bieneman
6e05c8dfc8 [DX] Create globals for DXContainer parts
DXContainer files have a handful of sections that need to be written.
This adds a pass to write the section data into IR globals, and writes
the shader flag data into a global.

The test cases here verify that the shader flags are correctly written
from the IR into the global and emitted to the DXContainer.

This change also fixes a bug in the MCDXContainerWriter, where the size
of the dxbc::ProgramHeader was not being included in the part offset
calcuations. This is verified to be working by the new testcases where
obj2yaml can properly dump part data for parts after the DXIL part.

Resolves issue #57742 (https://github.com/llvm/llvm-project/issues/57742)

Reviewed By: python3kgae

Differential Revision: https://reviews.llvm.org/D135793
2022-10-18 11:48:08 -05:00
Xiang Li
13163dd8ab [HLSL] CodeGen hlsl resource binding.
''register(ID, space)'' like register(t3, space1) will be translated into
i32 3, i32 1 as the last 2 operands for resource annotation metadata.

NamedMetadata for CBuffers and SRVs are added as "hlsl.srvs" and "hlsl.cbufs".

Reviewed By: beanz

Differential Revision: https://reviews.llvm.org/D130951
2022-10-17 14:29:19 -07:00
Chris Bieneman
e530a1188e [DX] Add pass to pretty-print DXIL metadata in asm
When DXC prints IR output it adds a bunch of IR comments in a header
that describe the DXIL metadata in a more human-readable format. This
pass will serve that purpose for LLVM by printing out ahead of the IR
printer.

Reviewed By: python3kgae

Differential Revision: https://reviews.llvm.org/D135802
2022-10-14 13:32:59 -05:00
Chris Bieneman
2b2afb2529 [DX] Add analysis and printer for shader flags
This adds infrastructural pieces for an analysis to compute the DXIL
shader flags. In this state the analysis can compute two fairly
straightforward feature flags for use of double-precision floating
point values and the DX 11.1 extended double support.

This patch does conflict with D135190, conflicts will be resolved prior
to merging.

Reviewed By: python3kgae

Differential Revision: https://reviews.llvm.org/D135393

# Conflicts:
#	llvm/lib/Target/DirectX/CMakeLists.txt
#	llvm/lib/Target/DirectX/DirectXTargetMachine.cpp
2022-10-11 14:27:05 -05:00
Xiang Li
220185552f [DirectX backend] Add analysis to collect DXILResources
Now only DXILTranslateMetadata uses DXILResources, so DXILResourceWrapper is only used by DXILTranslateMetadata.
Once we add lower for createHandle, DXILResourceWrapper will be used in more passes.
Also we can add resource index allocation in DXILResourceWrapper.

Reviewed By: beanz

Differential Revision: https://reviews.llvm.org/D135190
2022-10-06 19:34:29 -07:00
Chris Bieneman
618e5006a5 [DirectX] Generate dx.resources metadata entry
This code adds initial support for generating the HLSL resources
metadata entries. It has a lot of `FIXMEs` laying around because there
is a lot more work to do here, but this lays a solid groundwork and can
accurately handle some trivial cases.

I've filed a swath of issues covering the deficiencies here and left the
issues in comments so that we can easily follow them.

One big change to make sooner rather than later is to move some of this
code into a new libLLVMFrontendHLSL so that we can share it with the
Clang CodeGen layer.

Reviewed By: python3kgae

Differential Revision: https://reviews.llvm.org/D134682
2022-10-04 12:36:39 -05:00
Chris Bieneman
c0a76c2c71 [DirectX] Add DXIL metadata dx.shaderModel
This captures the target shader model and pipeline stage into the DXIL
metadata for consumption by the DirectX runtime.

Reviewed By: python3kgae

Differential Revision: https://reviews.llvm.org/D134469
2022-10-03 13:00:11 -05:00
Xiang Li
208d0f04a6 [NFC] legalize triple for dxil tests. 2022-09-26 18:09:33 -07:00
Xiang Li
1e3d4c4344 [DirectX backend] Remove Attribute not for DXIL on CallInst
Remove Attribute on CallInst which is not for DXIL when prepare for DXIL.

Reviewed By: beanz

Differential Revision: https://reviews.llvm.org/D133279
2022-09-13 13:45:19 -07:00
Xiang Li
6917799e37 [DirectX backend] change MinVectorRegisterBitWidth to 32.
This is to avoid vector-combine generate vector4 on float.

Reviewed By: beanz

Differential Revision: https://reviews.llvm.org/D132826
2022-08-30 23:20:12 -07:00
Xiang Li
a0ecb4a299 [HLSL] Move DXIL validation version out of ModuleFlags
Put DXIL validation version into separate NamedMetadata to avoid update ModuleFlags.

Currently DXIL validation version is saved in ModuleFlags in clang codeGen.
Then in DirectX backend, the data will be extracted from ModuleFlags and cause rebuild of ModuleFlags.
This patch will build NamedMetadata for DXIL validation version and remove the code to rebuild ModuleFlags.

Reviewed By: beanz

Differential Revision: https://reviews.llvm.org/D130207
2022-08-26 09:20:45 -07:00