Currently the bitwise NOT instruction is not recognized. Add support for
using NOT on data registers. This is a partial implementation that puts
NOT at the same level of support as NEG currently enjoys.
Using not rather than eori cuts the length of the encoded instruction
in half or in thirds, leading to a reduction of 4-10 cycles per
instruction, on the original 68000.
This change includes tests for both bitwise and arithmetic negation.
Ideally we want to lower ATOMIC_FENCE into `__sync_synchronize`.
However, libgcc doesn't implement that builtin as GCC simply generates an
inline assembly barrier whenever there needs to be a fence.
We use a similar way to lower ATOMIC_FENCE.
Differential Revision: https://reviews.llvm.org/D146996
This adds support for atomic_load, atomic_store, atomic_cmpxchg
and atomic_rmw
Fixes#48236
Reviewed by: myhsu, efriedma
Differential Revision: https://reviews.llvm.org/D136525
