3 Commits

Author	SHA1	Message	Date
Qiu Chaofan	b922a36211	[PowerPC] Define SchedModel for Power8 ... PowerPC subtargets prior to Power9 use the 'legacy' itinerary way to provide scheduling information. This patch re-writes the tablegen file to define the scheduling information in the new SchedModel way, which can bring improvements to some benchmarks. Reviewed By: shchenz Differential Revision: https://reviews.llvm.org/D154488	2023-09-08 15:43:21 +08:00
Ting Wang	71be020dda	[SelectionDAG][PowerPC] Memset reuse vector element for tail store ... On PPC there are instructions to store element from vector(e.g. stxsdx/stxsiwx), and these instructions can be leveraged to avoid tail constant in memset and constant splat array initialization. This patch tries to explore these opportunities. Reviewed By: shchenz Differential Revision: https://reviews.llvm.org/D138883	2023-09-06 01:52:38 -04:00
Ting Wang	e6d925bc4b	[PowerPC][NFC] Add test case for memset tail store ... Add test case to show something can be improved. Reviewed By: shchenz Differential Revision: https://reviews.llvm.org/D138881	2022-12-12 20:07:23 -05:00