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Author	SHA1	Message	Date
Craig Topper	2dccf11b92	[RISCV] Remove gp and tp from callee saved register lists. (#76483 ) This appears to match gcc behavior. Resolves https://discourse.llvm.org/t/risc-v-calling-convention-implementation-in-clang-tp-and-gp-registers/75757	2023-12-27 21:36:03 -08:00
Craig Topper	ab2348a6fa	[RISCV] Add sext.b/h and zext.b/h/w to RISCVInstrInfo::foldMemoryOperandImpl. We can always fold zext.b since it is just andi. The others require Zba/Zbb. Reviewed By: reames Differential Revision: https://reviews.llvm.org/D130302	2022-07-21 14:54:58 -07:00
Craig Topper	d7f2a63371	[RISCV] Fold stack reload into sext.w by using lw instead of ld. We can use lw to load 4 bytes from the stack and sign extend them instead of loading all 8 bytes. Reviewed By: asb Differential Revision: https://reviews.llvm.org/D129948	2022-07-18 09:09:17 -07:00

Author

SHA1

Message

Date

Craig Topper

2dccf11b92

[RISCV] Remove gp and tp from callee saved register lists. (#76483 )

This appears to match gcc behavior.

Resolves
https://discourse.llvm.org/t/risc-v-calling-convention-implementation-in-clang-tp-and-gp-registers/75757

2023-12-27 21:36:03 -08:00

Craig Topper

ab2348a6fa

[RISCV] Add sext.b/h and zext.b/h/w to RISCVInstrInfo::foldMemoryOperandImpl.

We can always fold zext.b since it is just andi. The others require
Zba/Zbb.

Reviewed By: reames

Differential Revision: https://reviews.llvm.org/D130302

2022-07-21 14:54:58 -07:00

Craig Topper

d7f2a63371

[RISCV] Fold stack reload into sext.w by using lw instead of ld.

We can use lw to load 4 bytes from the stack and sign extend them
instead of loading all 8 bytes.

Reviewed By: asb

Differential Revision: https://reviews.llvm.org/D129948

2022-07-18 09:09:17 -07:00

3 Commits