2 Commits

Author	SHA1	Message	Date
Manolis Tsamis	6774ba8411	[RISCV] xtheadmac: fix commutativity issue for the in/out register ... The instructions in the XTHeadMac extension (multiply accumulate instructions) were marked as commutative but because the destination register was also an input (accumulate) register and was connected to the destination register with a register allocator constraint, all three operands (instead of two) were incorrectly considered commutative. To fix that an appropriate fixCommutedOpIndices call was added for these instructions in findCommutedOpIndices New test functions have been added to test the correct behaviour in xtheadmac.ll. Reviewed By: craig.topper Differential Revision: https://reviews.llvm.org/D144278	2023-02-17 19:45:22 +01:00
Manolis Tsamis	d4012bc43f	[RISCV] Add vendor-defined XTheadMAC (multiply-accumulate) extension ... The vendor-defined XTHeadMAC (no comparable standard extension exists at the time of writing) extension adds multiply accumulate instructions. It is supported by the C9xx cores (e.g., found in the wild in the Allwinner D1) by Alibaba T-Head. The current (as of this commit) public documentation for this extension is available at: https://github.com/T-head-Semi/thead-extension-spec/releases/download/2.2.2/xthead-2023-01-30-2.2.2.pdf Support for these instructions has already landed in GNU Binutils: https://sourceware.org/git/?p=binutils-gdb.git;a=commit;h=4041e11db3ec3611921d10150572a92689aa3154 Co-authored-by: Philipp Tomsich <philipp.tomsich@vrull.eu> Reviewed By: craig.topper Differential Revision: https://reviews.llvm.org/D143847	2023-02-14 20:25:47 +01:00