14 Commits

Author SHA1 Message Date
Michal Paszkowski
d06ba37683
[SPIR-V] Support extension toggling and enabling all (#85503) 2024-03-26 03:04:49 -07:00
Vyacheslav Levytskyy
8f30b62395
[SPIR-V] Add support for the SPIR-V extension SPV_INTEL_bfloat16_conversion (#83443)
This PR is to add support for the SPIR-V extension
SPV_INTEL_bfloat16_conversion
(https://github.com/KhronosGroup/SPIRV-Registry/blob/main/extensions/INTEL/SPV_INTEL_bfloat16_conversion.asciidoc)
and OpenCL extension cl_intel_bfloat16_conversions
(https://registry.khronos.org/OpenCL/extensions/intel/cl_intel_bfloat16_conversions.html).
2024-03-04 12:55:09 +01:00
Vyacheslav Levytskyy
ada70f50a5
[SPIR-V]: add SPIR-V extension: SPV_INTEL_variable_length_array (#83002)
This PR adds SPIR-V extension SPV_INTEL_variable_length_array that
allows to allocate local arrays whose number of elements is unknown at
compile time:
* add a new SPIR-V internal intrinsic:int_spv_alloca_array
* legalize G_STACKSAVE and G_STACKRESTORE
* implement allocation of arrays (previously getArraySize() of
AllocaInst was not used)
* add tests
2024-02-27 10:58:45 +01:00
Vyacheslav Levytskyy
4a602d9250
Add support for the SPV_INTEL_usm_storage_classes extension (#82247)
Add support for the SPV_INTEL_usm_storage_classes extension:
*
https://github.com/intel/llvm/blob/sycl/sycl/doc/design/spirv-extensions/SPV_INTEL_usm_storage_classes.asciidoc
2024-02-22 11:05:19 +01:00
Vyacheslav Levytskyy
fddf23c6f4
[SPIRV] Add support for the SPV_KHR_subgroup_rotate extension (#82374)
This PR adds support for the SPV_KHR_subgroup_rotate extension that
enables rotating values across invocations within a subgroup:
*
https://github.com/KhronosGroup/SPIRV-Registry/blob/main/extensions/KHR/SPV_KHR_subgroup_rotate.asciidoc
2024-02-22 10:27:59 +01:00
Vyacheslav Levytskyy
66ebda46fc
Add support for the SPIR-V extension SPV_KHR_uniform_group_instructions (#82064)
This PR is to add support for the SPIR-V extension
SPV_KHR_uniform_group_instructions that adds new instructions to SPIR-V
to support additional group operations within uniform control flow.
2024-02-19 21:30:31 +01:00
Vyacheslav Levytskyy
925768eeab
Add support for atomic instruction on floating-point numbers (#81683)
This PR adds support for atomic instruction on floating-point numbers:

* SPV_EXT_shader_atomic_float_add
* SPV_EXT_shader_atomic_float_min_max
* SPV_EXT_shader_atomic_float16_add

and fixes asm printer output for half floating-type.
2024-02-19 12:12:09 +01:00
Vyacheslav Levytskyy
d153ef6a34
Add support for SPIR-V extension: SPV_INTEL_function_pointers (#80759)
This PR adds initial support for "SPV_INTEL_function_pointers" SPIR-V
extension:
https://github.com/intel/llvm/blob/sycl/sycl/doc/design/spirv-extensions/SPV_INTEL_function_pointers.asciidoc

The goal of the extension is to support indirect function calls and
translation of function pointers into SPIR-V.
2024-02-12 11:22:48 +01:00
Vyacheslav Levytskyy
b221b97336
Add support for SPIR-V extension: SPV_INTEL_subgroups (#81023)
The goal of this PR is to implement SPV_INTEL_subgroups extension in
SPIR-V Backend.
2024-02-12 10:05:21 +01:00
Paulo Matos
e7651e60a2
[SPIRV] Add support for SPV_KHR_bit_instructions (#66215)
Adds support for SPV_KHR_bit_instructions.

It is only used whenever we don't need the whole Shader capability, which is a superset of this extension.
2023-09-22 14:44:21 +02:00
Paulo Matos
0495cd89fc
[UpdateTestChecks] Add support for SPIRV in update_llc_test_checks.py (#66213)
Support for SPIRV added, updated test SPV_INTEL_optnone.ll using the script.

Previously https://reviews.llvm.org/D157858
2023-09-21 12:51:42 +02:00
Michal Paszkowski
efe0e10718 [SPIR-V] Support SPV_INTEL_arbitrary_precision_integers_extension, misc utils for other extensions
Differential Revision: https://reviews.llvm.org/D158764
2023-09-12 02:45:15 -07:00
Andrey Tretyakov
bb6a437306 [SPIRV] Add tests to improve test coverage
Differential Revision: https://reviews.llvm.org/D132562
2022-08-28 22:18:11 +03:00
Ilia Diachkov
df8713079b [SPIRV] support capabilities and extensions
This patch supports SPIR-V capabilities and extensions. In addition,
it inserts decorations related to MIFlags and improves support of switches.
Five tests are included to demonstrate the improvement.

Differential Revision: https://reviews.llvm.org/D131221

Co-authored-by: Aleksandr Bezzubikov <zuban32s@gmail.com>
Co-authored-by: Michal Paszkowski <michal.paszkowski@outlook.com>
Co-authored-by: Andrey Tretyakov <andrey1.tretyakov@intel.com>
Co-authored-by: Konrad Trifunovic <konrad.trifunovic@intel.com>
2022-08-12 23:33:15 +03:00