22 Commits

Author SHA1 Message Date
Fangrui Song
252c42354e [test] Change llvm-mc -arch= to -triple=
The issue is uncovered by #47698: for assembly files, -triple= specifies the
full target triple while -arch= merely sets the architecture part of the default
target triple, leaving a target triple which may not make sense, e.g.
riscv64-apple-darwin.

Therefore, -arch= is error-prone and not recommended for tests. The issue has
been benign as we recognize $unknown-apple-darwin as ELF instead of rejecting it
outrightly.

Due to the nature of the issue, we don't see the issue in tests using
architectures that any of Mach-O/COFF/XCOFF supports.
2023-09-11 14:51:50 -07:00
Jay Foad
b9f3977b26 [AMDGPU] Add MC tests for s_endpgm's optional immediate operand
Differential Revision: https://reviews.llvm.org/D139438
2022-12-06 17:04:50 +00:00
Jay Foad
dca1a3f29e [AMDGPU] Add error line number checking
Differential Revision: https://reviews.llvm.org/D138916
2022-11-29 16:33:43 +00:00
Dmitry Preobrazhensky
1d817a1448 [AMDGPU][MC][NFC] Refactored sendmsg(...) handling
Differential Revision: https://reviews.llvm.org/D121995
2022-03-21 15:37:30 +03:00
Dmitry Preobrazhensky
b5fb7e485e [AMDGPU][MC] Corrected disassembly of s_waitcnt
s_waitcnt with default expcnt, vmcnt and lgkmcnt values was disassembled without arguments.
See https://github.com/llvm/llvm-project/issues/52716

Differential Revision: https://reviews.llvm.org/D117305
2022-01-17 20:22:03 +03:00
Jay Foad
67f0620831 [AMDGPU] Update s_sendmsg messages
Update the list of s_sendmsg messages known to the assembler and
disassembler and validate the ones that were added or removed in gfx9
and gfx10.

Differential Revision: https://reviews.llvm.org/D97295
2021-02-24 13:07:00 +00:00
Mircea Trofin
585612355c [NFC] Disallow unused prefixes under MC/AMDGPU
This patches remaining tests, and patches lit.local.cfg to block future
such cases (until we flip FileCheck's flag)

Differential Revision: https://reviews.llvm.org/D94556
2021-01-12 15:24:44 -08:00
Dmitry Preobrazhensky
e2452f57fa [AMDGPU][MC] Added detection of unsupported instructions
Implemented identification of unsupported instructions; improved errors reporting.

See bug 42590.

Reviewers: rampitec

Differential Revision: https://reviews.llvm.org/D88211
2020-10-06 16:44:27 +03:00
Dmitry Preobrazhensky
ecde200209 [AMDGPU][MC] Corrected parser to avoid generation of excessive error messages
Summary of changes:
- Changed parser to eliminate generation of excessive error messages;
- Corrected lit tests to match all expected error messages;
- Corrected lit tests to guard against unwanted extra messages (added option "--implicit-check-not=error:");
- Added missing checks and fixed some typos in tests.

See bug 46907: https://bugs.llvm.org/show_bug.cgi?id=46907

Reviewers: arsenm, rampitec

Differential Revision: https://reviews.llvm.org/D86940
2020-09-02 19:42:18 +03:00
Dmitry Preobrazhensky
4ccb7f8c45 [AMDGPU][MC] Corrected parsing of branch offsets
See bug 40820: https://bugs.llvm.org/show_bug.cgi?id=40820

Reviewers: artem.tamazov, arsenm

Differential Revision: https://reviews.llvm.org/D64629

llvm-svn: 366571
2019-07-19 13:12:47 +00:00
Dmitry Preobrazhensky
1d572ce395 [AMDGPU][MC] Enabled constant expressions as operands of sendmsg
See bug 40820: https://bugs.llvm.org/show_bug.cgi?id=40820

Reviewers: artem.tamazov, arsenm

Differential Revision: https://reviews.llvm.org/D62735

llvm-svn: 364645
2019-06-28 14:14:02 +00:00
Dmitry Preobrazhensky
b79af7930c [AMDGPU][MC] Enabled constant expressions as operands of s_waitcnt
See bug 40820: https://bugs.llvm.org/show_bug.cgi?id=40820

Reviewers: artem.tamazov, arsenm

Differential Revision: https://reviews.llvm.org/D61017

llvm-svn: 361763
2019-05-27 14:08:43 +00:00
Stanislav Mekhanoshin
9d287358a8 [AMDGPU] gfx1010 SOP instructions
Differential Revision: https://reviews.llvm.org/D61080

llvm-svn: 359139
2019-04-24 20:44:34 +00:00
Dmitry Preobrazhensky
ef92035827 [AMDGPU][MC][GFX8+] Added syntactic sugar for 'vgpr index' operand of instructions s_set_gpr_idx_on and s_set_gpr_idx_mode
See bug 39331: https://bugs.llvm.org/show_bug.cgi?id=39331

Reviewers: artem.tamazov, arsenm

Differential Revision: https://reviews.llvm.org/D58288

llvm-svn: 354969
2019-02-27 13:12:12 +00:00
Dmitry Preobrazhensky
43d297eb45 [AMDGPU][MC] Added arg checks for vmcnt, expcnt, lgkmcnt helpers
Summary of changes:
- corrected vmcnt, expcnt, lgkmcnt helpers to checks their argument for truncation;
- added saturated versions of these helpers.

See bug 32711 for details: https://bugs.llvm.org//show_bug.cgi?id=32711

Reviewers: artem.tamazov, vpykhtin

Differential Revision: https://reviews.llvm.org/D32546

llvm-svn: 301439
2017-04-26 17:55:50 +00:00
Dmitry Preobrazhensky
14104e0d0f [AMDGPU][MC] Added support for several VI-specific opcodes (s_wakeup, etc)
Added support for VI:

- s_endpgm_saved
- s_wakeup
- s_rfe_restore_b64
- v_perm_b32

Enabled for VI:

- v_mov_fed_b32
- v_mov_fed_b32_e64

See bug 32593: https://bugs.llvm.org//show_bug.cgi?id=32593

Reviewers: artem.tamazov, vpykhtin

Differential Revision: https://reviews.llvm.org/D31931

llvm-svn: 300076
2017-04-12 17:10:07 +00:00
Dmitry Preobrazhensky
3ac6311a8d [AMDGPU][MC] Fix for Bug 28158 + LIT tests
Added support of the following instructions:
- s_cbranch_cdbgsys
- s_cbranch_cdbgsys_and_user
- s_cbranch_cdbgsys_or_user
- s_cbranch_cdbguser
- s_setkill

Reviewers: vpykhtin

Differential Revision: https://reviews.llvm.org/D31469

llvm-svn: 299567
2017-04-05 17:26:45 +00:00
Matt Arsenault
cc88ce36ed AMDGPU: Add instruction definitions for VGPR indexing
VI added a second method of indexing into VGPRs
besides using v_movrel*

llvm-svn: 284027
2016-10-12 18:00:51 +00:00
Artem Tamazov
ebe71ce36a [AMDGPU][llvm-mc] Add support for sendmsg(...) syntax.
Added support for sendmsg(MSG[, OP[, STREAM_ID]]) syntax
in s_sendmsg and s_sendmsghalt instructions.
The syntax matches the SP3 assembler/disassembler rules.
That is why implicit inputs (like M0 and EXEC) are not printed
to disassembly output anymore.

sendmsg(...) allows only known message types and attributes,
even if literals are used instead of symbolic names.
However, raw literal (without "sendmsg") still can be used,
and that allows for any 16-bit value.

Tests updated/added.

Differential Revision: http://reviews.llvm.org/D19596

llvm-svn: 268762
2016-05-06 17:48:48 +00:00
Nikolay Haustov
cb9dddb1d7 [AMDGPU] Assembler: Update SOP* tests
Add VI encodings.
Reformat sopp.s to match style of other files.

Differential Revision: http://reviews.llvm.org/D18084

llvm-svn: 263540
2016-03-15 07:44:57 +00:00
Tom Stellard
3d2c852958 AMDGPU: waitcnt operand fixes
Summary:
Allow lgkmcnt up to 0xF (hardware allows that).
Fix mask for ExpCnt in AMDGPUInstPrinter.

Reviewers: tstellarAMD, arsenm

Subscribers: arsenm

Differential Revision: http://reviews.llvm.org/D16314

Patch by: Nikolay Haustov

llvm-svn: 259059
2016-01-28 17:13:44 +00:00
Tom Stellard
45bb48ea19 R600 -> AMDGPU rename
llvm-svn: 239657
2015-06-13 03:28:10 +00:00