28387 Commits

Author SHA1 Message Date
Alexey Bataev
41afef9066 [SLP]Fix PR87011: Missing sign extension of demoted type before zero extension
Need to drop skipping of the first zext/sext nodes, it leads to
incorrect and less profitable code.
2024-04-01 06:07:18 -07:00
Vitaly Buka
c0cabfbdaf
[InstCombiner] Remove trivially dead llvm.allow.{runtime,ubsan}.check() (#84851)
Intrinsic declared to have sideeffects, but it's done only to prevent
moving it. Removing unused ones is OK.

Exacted from #84850 for easier review.
2024-04-01 00:42:18 -07:00
Kevin P. Neal
fe893c93b7
[FPEnv][AtomicExpand] Correct strictfp attribute handling in AtomicExpandPass (#87082)
The AtomicExpand pass was lowering function calls with the strictfp
attribute to sequences that included function calls incorrectly lacking
the attribute. This patch corrects that.

The pass now also emits the correct constrained fp call instead of
normal FP instructions when in a function with the strictfp attribute.

Test changes verified with D146845.
2024-03-29 14:54:51 -04:00
Monad
56b3222b79
[InstCombine] Remove the canonicalization of trunc to i1 (#84628)
Remove the canonicalization of `trunc` to `i1` according to the
suggestion of
https://github.com/llvm/llvm-project/pull/83829#issuecomment-1986801166

a84e66a92d/llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp (L737-L745)

Alive2: https://alive2.llvm.org/ce/z/cacYVA
2024-03-29 21:47:35 +08:00
elhewaty
7d3924cee3
[IR] Add nowrap flags for trunc instruction (#85592)
This patch adds the nuw (no unsigned wrap) and nsw (no signed wrap)
poison-generating flags to the trunc instruction.

Discourse thread:
https://discourse.llvm.org/t/rfc-add-nowrap-flags-to-trunc/77453
2024-03-29 14:08:49 +08:00
Lei Wang
1d99d7a6f8
[SampleFDO][NFC] Refactoring SampleProfileMatcher (#86988)
Move all the stale profile matching stuffs into new files so that it can
be shared for unit testing.
2024-03-28 20:03:03 -07:00
Alexey Bataev
01e02e0b6a [SLP]Fix PR87011: Do not assume that initial ext/trunc nodes can be
represented by bitwidth without analysis.

Need to check that initial ext/trunc nodes can be safely represented
using calculated bitwidth before applying it.
2024-03-28 18:02:26 -07:00
Alexey Bataev
338be798ca [SLP][NFC]Add a test with the incorrect sign extension of first ext
node.
2024-03-28 17:51:02 -07:00
Noah Goldstein
0e78655731 [LVI] Use m_AddLike instead of m_Add when matching simple condition
We have more complete logic for handling `Add`, so try to use that
logic for `or disjoint` (which can definitionally be treated as
`add`).

Closes #86058
2024-03-28 13:49:05 -05:00
Noah Goldstein
efa1544c2c [LVI] Add tests for tracking or disjoint like add; NFC 2024-03-28 13:49:05 -05:00
Noah Goldstein
637421cb88 [ValueTracking] Tracking or disjoint conditions as add in Assumption/DomCondition Cache
We can definitionally treat `or disjoint` as `add` anywhere.

Closes #86302
2024-03-28 13:49:05 -05:00
Noah Goldstein
cba6df99e0 [ValueTracking] Add basic tests tracking or disjoint conditions as add; NFC 2024-03-28 13:49:04 -05:00
Xiangyang (Mark) Guo
1607e8212c
[InlineCost] Disable cost-benefit when sample based PGO is used (#86626)
#66457 makes InlineCost to use cost-benefit by default, which causes
0.4-0.5% performance regression on multiple internal workloads. See
discussions https://github.com/llvm/llvm-project/pull/66457. This pull
request reverts it.

Co-authored-by: helloguo <helloguo@meta.com>
2024-03-28 10:11:57 -07:00
Alexey Bataev
d7975c9d93
[SLP]Add better minbitwidth analysis for udiv/urem instructions.
Adds improved bitwidth analysis for udiv/urem instructions. The
analysis is based on similar version in InstCombiner.

Reviewers: RKSimon

Reviewed By: RKSimon

Pull Request: https://github.com/llvm/llvm-project/pull/85928
2024-03-28 10:35:15 -04:00
Haohai Wen
896037c75a
[LoopRotate] Set loop back edge weight to not less than exit weight (#86496)
Branch weight from sample-based PGO may be not inaccurate due to
sampling. If the loop body must be executed, then origin loop back
edge weight must be not less than exit weight.
2024-03-28 20:07:15 +08:00
Shan Huang
79ba323bdd
[Debuginfo][GVNHoist] Fix #86227: update the debug location of the hoisted GEP (#86236)
This PR fixes #86227.
2024-03-28 18:43:03 +08:00
Shan Huang
912e2c4758
[Debuginfo][TailCallElim] Fix #86262: drop the debug location of entry branch (#86269)
This pr fixes #86262.

---------

Co-authored-by: Stephen Tozer <Melamoto@gmail.com>
2024-03-28 17:37:33 +08:00
Haohai Wen
38f5596fed
[LoopRotate] Add test to track update for inaccurate branch weight (#86495)
Branch weight from sample-based PGO may be not inaccurate due to
sampling. This test tracks such case where updateBranchWeights wraps
unsigned.
2024-03-28 15:33:01 +08:00
Lei Wang
f8bab38b6d
[CSSPGO] Fix the issue of missing callee profile matches (#85715)
Two fixes related to the callee/inlinee profile:

1. Fix the bug that the matching results are missing to distribute to
the callee profiles (should be pass-by-reference).
2. Narrow imported function matching to checksum mismatched functions. 

More context: before we run matchings for all imported functions even
checksums are matched, however, after we fix 1), we got a regression,
it's likely due to the matching is not no-op for checksum matched
function, so we want to make it consistent to only run matching for
checksum mismatched (imported)functions. Since the
metadata(pseudo_probe_desc) are dropped for imported function, we
leverage the function attribute mechanism and add a new function
attribute(`profile-checksum-mismatch`) to transfer the info from
pre-link to post-link.
2024-03-27 22:27:22 -07:00
Alexey Bataev
d94dc5f0d6 [SLP]Fix PR86763: do not truncate reductions to the demanded bits size.
Need to adjust ReductionBitWIdth after minbitwidth analysis, if the
demanded bits analysis sjows tht its size is less than the size of the
vectorized value. It prevents incorrect sign-zero extension
transformation after.
2024-03-27 14:34:59 -07:00
Alexey Bataev
552c8eb731 [SLP][NFC]Add a test with the wrong result extension after reduction,
NFC.
2024-03-27 14:26:05 -07:00
Florian Hahn
b9cd48f96a
Revert "[TBAA] Add verifier for tbaa.struct metadata (#86709)"
This reverts commit df75183d70e029352a49c93f275db703c81a65c1.

Revert for now as this appears to cause failures on some buildbots,
e.g.:
https://lab.llvm.org/buildbot/#/builders/93/builds/19428/steps/10/logs/stdio
2024-03-27 21:22:15 +00:00
Florian Hahn
6ef829941b
Recommit "[VPlan] Replace disjoint or with add instead of dropping disjoint. (#83821)"
Recommit with a fix for the use-after-free causing the revert.
This reverts the revert commit f872043e055f4163c3c4b1b86ca0354490174987.

Original commit message:

Dropping disjoint from an OR may yield incorrect results, as some
analysis may have converted it to an Add implicitly (e.g. SCEV used for
dependence analysis). Instead, replace it with an equivalent Add.

This is possible as all users of the disjoint OR only access lanes where
the operands are disjoint or poison otherwise.

Note that replacing all disjoint ORs with ADDs instead of dropping the
flags is not strictly necessary. It is only needed for disjoint ORs that
SCEV treated as ADDs, but those are not tracked.

There are other places that may drop poison-generating flags; those
likely need similar treatment.

Fixes https://github.com/llvm/llvm-project/issues/81872

PR: https://github.com/llvm/llvm-project/pull/83821
2024-03-27 19:11:18 +00:00
Mingming Liu
2d641858fa
[nfc][PGO]Factor out profile scaling into a standalone helper function (#83780)
- Put the helper function in `ProfDataUtil.h/cpp`, which is already a
dependency of `Instructions.cpp`
- The helper function could be re-used to update profiles of
`InvokeInst` (in a follow-up pull request)
2024-03-27 11:57:07 -07:00
Lei Wang
2598aa67c8
[CSSPGO] Reject high checksum mismatched profile (#84097)
Error out the build if the checksum mismatch is extremely high, it's
better to drop the profile rather than apply the bad profile.
Note that the check is on a module level, the user could make big
changes to functions in one single module but those changes might not be
performance significant to the whole binary, so we want to be
conservative, only expect to catch big perf regression. To do this, we
select a set of the "hot" functions for the check. We use two
parameter(`hot-func-cutoff-for-staleness-error` and
`min-functions-for-staleness-error`) to control the function selection
to make sure the selected are hot enough and the num of function is not
small.
Tuned the parameters on our internal services, it works to catch big
perf regression due to the high mismatch .
2024-03-27 11:14:21 -07:00
Alexey Bataev
b43ec8e62b [SLP]Fix PR86798: handle phi nodes being trunced, but not its operands.
If the phi node is trunced, but not its operand(s), need to handle this
situation in the assertion, code already does the right transformation.
2024-03-27 07:21:45 -07:00
Alex Voicu
ab7dba233a
[CodeGen][LLVM] Make the va_list related intrinsics generic. (#85460)
Currently, the builtins used for implementing `va_list` handling
unconditionally take their arguments as unqualified `ptr`s i.e. pointers
to AS 0. This does not work for targets where the default AS is not 0 or
AS 0 is not a viable AS (for example, a target might choose 0 to
represent the constant address space). This patch changes the builtins'
signature to take generic `anyptr` args, which corrects this issue. It
is noisy due to the number of tests affected. A test for an upstream
target which does not use 0 as its default AS (SPIRV for HIP device
compilations) is added as well.
2024-03-27 11:41:34 +00:00
Julian Nagele
df75183d70
[TBAA] Add verifier for tbaa.struct metadata (#86709)
Adds logic to the IR verifier that checks whether !tbaa.struct nodes are
well-formed. That is, it checks that the operands of !tbaa.struct nodes
are in groups of three, that each group of three operands consists of
two integers and a valid tbaa node, and that the regions described by
the offset and size operands are non-overlapping.

PR: https://github.com/llvm/llvm-project/pull/86709
2024-03-27 10:30:27 +01:00
zhongyunde 00443407
bd9bb31bce [InstCombine] add restrict reassoc for the powi(X,Y) / X
add restrict reassoc for the powi(X,Y) / X according the discuss on PR69998.
2024-03-27 16:47:03 +08:00
Jianjian Guan
05a7b22a01
[RISCV] Add areInlineCompatible for riscv target (#86639)
Inline a callee if its target-features are a subset of the callers
target-features.
2024-03-27 14:16:03 +08:00
Alexey Bataev
342f7d0d35 [SLP]Fix PR86620: check final minbitwidth for truncs/exts before
accepting it.

If the minbitwidth is deduced from the demanded elements, need to check
the final bitwidthfor trunc/ext instruction, bot blindly accepting
the used one.
2024-03-26 11:27:17 -07:00
Alexey Bataev
1ad29a5c71 [SLP][NFC]Add a test with truncated loads, but incorrect trunc after
minbitwidth analysis.
2024-03-26 11:12:12 -07:00
Alexey Bataev
26dd12871c [SLP]Do not propagate nuw/nsw flags for alt nodes, affected by
minbitwidth analysis.

Need to drop nuw/nsw flags, if the alternate node is resized after the
minbitwidth analysis, to avoid producing poison values in corner cases.
2024-03-26 10:24:09 -07:00
Florian Hahn
06bb8c9f20
[VPlan] Explicitly handle scalar pointer inductions. (#83068)
Add a new PtrAdd opcode to VPInstruction that corresponds to
IRBuilder::CreatePtrAdd, which creates a GEP with source element type
i8.

This is then used to model scalarizing VPWidenPointerInductionRecipe by
introducing scalar-steps to model the index increment followed by a
PtrAdd.

Note that PtrAdd needs to be able to generate code for only the first
lane or for all lanes. This may warrant introducing a separate recipe
for scalarizing that can be created without relying on the underlying
IR.

Depends on https://github.com/llvm/llvm-project/pull/80271

PR: https://github.com/llvm/llvm-project/pull/83068
2024-03-26 16:01:57 +01:00
Alexey Bataev
54ca1e2c04 [SLP]Fix PR80027: include initial trunc nodes to the demoted values.
Need to include initial sext/zext/trunc nodes to the list of the demoted
root values to correctly calculate the cost and handle the
vectorization.
2024-03-26 06:40:57 -07:00
Bevin Hansson
14c30189fb
[ExpandLargeFpConvert] Fix incorrect values in fp-to-int conversion. (#86514)
The IR for a double-to-i129 conversion looks like this in one of the
blocks in compiler-rt:

  %cmp5.i = icmp ult i16 %3, -129, !dbg !24

But in ExpandLargeFpConvert, it looks like:

  %13 = icmp ult i129 %12, 4294967167, !dbg !19

ExpandLargeFpConvert is wrong; the value should have been
signed before negating, but instead we get a very large
unsigned value. Another value in the same pass also has this
issue.
2024-03-26 10:08:22 +01:00
AtariDreams
7b3e943dfc
Reapply: [Float2Int] Resolve FIXME: Pick the smallest legal type that fits (#86337)
Originally reverted because of a bug in Range that is now fixed
(#86041), we can reland this commit. Tests have been added to ensure the
miscompile that caused the revert does not happen again.
2024-03-25 09:53:38 -07:00
Florian Hahn
1081d3a0a7
[VPlan] Mark CanonicalIVIncrementForPart as only using part 0 of IV.
CanonicalIVIncrementForPart uses VPIteration(0, 0) of the IV (first
operand), mark it as only using part 0.

This avoids generating redundant IV increments per part.
2024-03-25 11:27:17 +00:00
Florian Hahn
f0a8738401
[VPlan] Generate CalculateTripCountMinusVF for Part 0 only. (NFCI).
The value produced by CalculateTripCountMinusVF VPInstructions is
independent of the part. Only compute it for part 0 and use that for
other parts.
2024-03-24 20:59:54 +00:00
Marc Auberer
b3fe27f2be
[InstCombine] Copy flags of extractelement for extelt -> icmp combine (#86366)
Fixes #86164
2024-03-24 16:14:56 +01:00
Patrick O'Neill
4652ec0e29
[SLP] Delete vectorized users when tree contains an invalid cost (#86344) 2024-03-22 17:52:27 -04:00
Alexey Bataev
9c0a0659d4 [SLP]Fix a crash for non-profitable non-schedulable single buildvector node tree, if the threshold allows its vectorization. 2024-03-22 07:44:23 -07:00
Alexey Bataev
3942bd2fb5 [SLP]Fix a crash if the argument of call was affected by minbitwidt
analysis.

Need to support proper type conversion for function arguments to avoid
compiler crash.
2024-03-21 17:06:48 -07:00
Michele Scandale
536cb1fad3
[InstCombine] Fix for folding select-like shufflevector into floating point binary operators. (#85452)
Folding a select-like `shufflevector` into a floating point binary
operators can only be done if the result is preserved for both case. In
particular, if the common operand of the `shufflevector` and the
floating point binary operator can be a NaN, then the transformation
won't preserve the result value.
2024-03-21 12:40:18 -07:00
Noah Goldstein
b3ee127e7d [InstCombine] integrate N{U,S}WAddLike into existing folds
Just went a quick replacement of `N{U,S}WAdd` with the `Like` variant
that old matches `or disjoint`

Closes #86082
2024-03-21 13:03:38 -05:00
Noah Goldstein
ac13e5c0f6 [InstCombine] Add tests for integrating N{U,S}WAddLike; NFC 2024-03-21 13:03:38 -05:00
Craig Topper
12836467b7
[ConstantRange] Fix off by 1 bugs in UIToFP and SIToFP handling. (#86041)
We were passing the min and max values of the range to the ConstantRange
constructor, but the constructor expects the upper bound to 1 more than
the max value so we need to add 1.

We also need to use getNonEmpty so that passing 0, 0 to the constructor
creates a full range rather than an empty range. And passing smin,
smax+1 doesn't cause an assertion.

I believe this fixes at least some of the reason #79158 was reverted.
2024-03-21 09:25:13 -07:00
Craig Topper
6295e67722 [Float2Int] Pre-commit test for SIToFP/UIToFP ConstantRange bug. NFC
The range for these operations is being constructed without the
maximum value for the range due to an incorrect usage of the
ConstantRange constructor.

This causes Float2Int to think the range for 'uitofp i1' only
contains 0 instead of 0 and 1.
2024-03-21 08:41:02 -07:00
Alexey Bataev
8d7a6e2fd8 [SLP]Fix a crash for gather node with instructions from different bbs,
if cost threshold is very low.
2024-03-21 08:03:06 -07:00
Yingwei Zheng
2bfa7d0e16
[InstCombine] Fold fmul X, -0.0 into copysign(0.0, -X) (#85772)
`fneg + copysign` is better than fmul for analysis/codegen.
godbolt: https://godbolt.org/z/eEs6dGd1G
Alive2: https://alive2.llvm.org/ce/z/K3M5BA
2024-03-21 21:48:10 +08:00