13 Commits

Author SHA1 Message Date
Martin Erhart
520407a7c8 Revert "[mlir][bufferization] Improve buffer deallocation pass"
This reverts commit 1bebb60a7565e5197d23120528f544b886b4d905.

This caused problems in downstream projects. We are reverting to give
them more time for integration.
2023-09-13 13:53:48 +00:00
Martin Erhart
1bebb60a75 [mlir][bufferization] Improve buffer deallocation pass
Add a new Buffer Deallocation pass replacing the old one with the goal of
inserting fewer clone operations and supporting additional use-cases.
Please refer to the Buffer Deallocation section in the updated
Bufferization.md file for more information on how this new pass works.

Reviewed By: springerm

Differential Revision: https://reviews.llvm.org/D158421
2023-09-13 09:30:23 +00:00
Matthias Springer
38bef47655 [mlir][bufferization] Fix unknown ops in BufferViewFlowAnalysis
If an op is unknown to the analysis, it must be treated conservatively: assume that every operand aliases with every result.

Differential Revision: https://reviews.llvm.org/D150546
2023-05-15 14:33:06 +02:00
Aart Bik
e379b4e047 [mlir][memref] annotate operand and result of realloc with proper memory attributes
Reviewed By: springerm

Differential Revision: https://reviews.llvm.org/D143599
2023-02-09 12:05:51 -08:00
Akshay Baviskar
7fbdee3e29 Add RegionBranchOpInterface for AffineIf Op
Adds RegionBranchOpInterface for AffineIf Op and tests it
using buffer deallocation pass.

Reviewed By: bondhugula

Differential Revision: https://reviews.llvm.org/D130962
2022-11-23 14:19:22 +05:30
Alex Zinenko
519847fefc [mlir] materialize strided memref layout as attribute
Introduce a new attribute to represent the strided memref layout. Strided
layouts are omnipresent in code generation flows and are the only kind of
layouts produced and supported by a half of operation in the memref dialect
(view-related, shape-related). However, they are internally represented as
affine maps that require a somewhat fragile extraction of the strides from the
linear form that also comes with an overhead. Furthermore, textual
representation of strided layouts as affine maps is difficult to read: compare
`affine_map<(d0, d1, d2)[s0, s1] -> (d0*32 + d1*s0 + s1 + d2)>` with
`strides: [32, ?, 1], offset: ?`. While a rudimentary support for parsing a
syntactically sugared version of the strided layout has existed in the codebase
for a long time, it does not go as far as this commit to make the strided
layout a first-class attribute in the IR.

This introduces the attribute and updates the tests that using the pre-existing
sugared form to use the new attribute instead. Most memref created
programmatically, e.g., in passes, still use the affine form with further
extraction of strides and will be updated separately.

Update and clean-up the memref type documentation that has gotten stale and has
been referring to the details of affine map composition that are long gone.

See https://discourse.llvm.org/t/rfc-materialize-strided-memref-layout-as-an-attribute/64211.

Reviewed By: nicolasvasilache

Differential Revision: https://reviews.llvm.org/D132864
2022-08-30 17:19:58 +02:00
Johannes Reifferscheid
27a1a85662 buffer-deallocation: consider aliases introduced by arith.select.
Currently, buffer deallocation considers arith.select to be
non-aliasing, which results in deallocs being inserted incorrectly. Since
arith.select doesn't implement any useful interfaces, this change just handles
it explicitly. Eventually this should probably be fixed properly, if this pass
is going to be used long term.

Reviewed By: springerm

Differential Revision: https://reviews.llvm.org/D132460
2022-08-23 14:37:02 +02:00
River Riddle
412b8850f6 [mlir][NFC] Update textual references of func to func.func in Bufferization/Complex/EmitC/CF/Func/GPU tests
The special case parsing of `func` operations is being removed.
2022-04-20 22:17:28 -07:00
Uday Bondhugula
d423fc3724 Add RegionBranchOpInterface on affine.for op
Add RegionBranchOpInterface on affine.for op so that transforms relying
on RegionBranchOpInterface can support affine.for. E.g.:
buffer-deallocation pass.

Reviewed By: herhut

Differential Revision: https://reviews.llvm.org/D123568
2022-04-20 17:46:07 +05:30
Benjamin Kramer
d955ca4937 [BufferDeallocation] Don't assume successor operands are unique
This would create a double free when a memref is passed twice to the
same op. This wasn't a problem at the time the pass was written but is
common since the introduction of scf.while.

There's a latent non-determinism that's triggered by the test, but this
change is messy enough as-is so I'll leave that for later.

Differential Revision: https://reviews.llvm.org/D120044
2022-02-17 14:16:32 +01:00
River Riddle
ace01605e0 [mlir] Split out a new ControlFlow dialect from Standard
This dialect is intended to model lower level/branch based control-flow constructs. The initial set
of operations are: AssertOp, BranchOp, CondBranchOp, SwitchOp; all split out from the current
standard dialect.

See https://discourse.llvm.org/t/standard-dialect-the-final-chapter/6061

Differential Revision: https://reviews.llvm.org/D118966
2022-02-06 14:51:16 -08:00
Mogball
5c36ee8d57 [mlir] Drop the leading space when printing regions
The leading space that is always printed at the beginning of regions is not consistent with other parts of the printing API. Moreover, this leading space can lead to undesirable assembly formats:

```
attr-dict-with-keyword $region
```

Prints as:

```
// Two spaces between `}` and `{`
attributes {foo}  { ... }
```

Moreover, the leading space results in the odd generic op format:

```
"test.op"() ( {...}) : () -> ()
```

Reviewed By: rriddle, mehdi_amini

Differential Revision: https://reviews.llvm.org/D117411
2022-01-18 16:52:34 +00:00
Alexander Belyaev
f89bb3c012 [mlir] Move bufferization-related passes to bufferization dialect.
[RFC](https://llvm.discourse.group/t/rfc-dialect-for-bufferization-related-ops/4712)

Differential Revision: https://reviews.llvm.org/D114698
2021-11-30 09:58:47 +01:00