495344 Commits

Author SHA1 Message Date
jeanPerier
6a7da2e30d
[flang] Fix source allocation to explicit length after deferred length object (#87785)
Flang supports source allocation to allocatable or pointers with a non
deferred length that do not match the source length. This documented at:
9708d09003/flang/docs/Extensions.md (L312)

The current lowering code was bugged when such explicit length allocate
object appeared after a deferred length object in the source allocation
list:

Since "lenParams" had been computed when generating allocation of the
deferred length object, the call to genSetDeferredLengthParameters was
not a no-op on when lowering the explicit length allocation, and the
explicit length was overridden with the source length.

The output of the program added in test was:

```
ZZheZZ
ZZhelloZZ
ZZhelloZZ
```

Instead of:

```
ZZheZZ
ZZhelloZZ
ZZhello  ZZ
```

Skip genSetDeferredLengthParameters when the allocate object has non
deferred length.
2024-04-08 10:22:44 +02:00
David Green
0bfea40101 [AArch64] More shuffle-store test cases. NFC 2024-04-08 09:19:47 +01:00
jeanPerier
3c210d1cfd
[flang][NFC] document BOZ error in DIM, MOD, MODULO, and SIGN (#87779)
It is highly ambiguous to what type BOZ should be resolved in DIM, MOD,
MODULO, and SIGN intrinsic arguments. Some other compilers accept them,
but none agree. See table below.

List them explicitly as non supported extensions (semantics already
reject them, this is an NFC).

Table listing the resolved types of the intrinsic results when there is
a BOZ argument:

|                     | gfortran | nvfortran | ifort | nagfor | xlf    |
| ------------------- | -------- | --------- | ----- | ------ | ------ |
|  DIM(INT4, BOZ)     |  INT16   |  INT4     |  INT8 | crash  |  INT4  |
|  DIM(BOZ, REAL4)    | error    |  INT8     | error | error  |  REAL4 |
|  DIM(REAL4, BOZ)    | error    |  REAL4    | error | error  |  REAL4 |
|  DIM(BOZ, INT4)     |  INT16   |  INT8     |  INT8 | INT8   |  INT4  |
|  DIM(BOZ, BOZ)      |  INT16   |  INT8     |  INT8 | INT8   |  REAL4 |
|  MOD(INT4, BOZ)     |  INT16   |  INT4     |  INT8 | crash  |  INT4  |
|  MOD(BOZ, REAL4)    | error    |  INT8     | error | error  |  REAL4 |
|  MOD(REAL4, BOZ)    | error    |  REAL4    | error | error  |  REAL4 |
|  MOD(BOZ, INT4)     |  INT16   |  INT8     |  INT8 | INT8   |  INT4  |
|  MOD(BOZ, BOZ)      |  INT16   |  INT8     |  INT8 | INT8   |  INT4  |
|  MODULO(INT4, BOZ)  |  INT16   |  INT4     |  INT8 | crash  |  INT4  |
|  MODULO(BOZ, REAL4) | error    |  INT8     | error | error  |  REAL4 |
|  MODULO(REAL4, BOZ) | error    |  REAL4    | error | error  |  REAL4 |
|  MODULO(BOZ, INT4)  |  INT16   |  INT8     |  INT8 | INT8   |  INT4  |
|  MODULO(BOZ, BOZ)   |  INT16   |  INT8     |  INT8 | INT8   |  INT8  |
|  SIGN(INT4, BOZ)    | error    |  INT4     |  INT8 | INT4   |  INT4  |
|  SIGN(BOZ, REAL4)   | error    |  INT8     | error | error  |  REAL4 |
|  SIGN(REAL4, BOZ)   | error    |  REAL4    | error | error  |  REAL4 |
|  SIGN(BOZ, INT4)    | error    |  INT8     |  INT8 | INT8   |  INT4  |
|  SIGN(BOZ, BOZ)     |  INT16   |  INT8     |  INT8 | INT8   |  REAL4 |
2024-04-08 10:19:34 +02:00
jeanPerier
8ddfb66903
[flang] Fix MASKR/MASKL lowering for INTEGER(16) (#87496)
The all one masks was not properly created for i128 types because
builder.createIntegerConstant ended-up truncating -1 to something
positive.

Add a builder.createAllOnesInteger/createMinusOneInteger helpers and use
them where createIntegerConstant(..., -1) was used.
Add an assert in createIntegerConstant to catch negative numbers for
i128 type.
2024-04-08 10:18:56 +02:00
Billy Zhu
81a7b6454e
[MLIR][LLVM] Recursion importer handle repeated self-references (#87295)
Followup to this discussion:
https://github.com/llvm/llvm-project/pull/80251#discussion_r1535599920.

The previous debug importer was correct but inefficient. For cases with
mutual recursion that contain more than one back-edge, each back-edge
would result in a new translated instance. This is because the previous
implementation never caches any translated result with unbounded
self-references. This means all translation inside a recursive context
is performed from scratch, which will incur repeated run-time cost as
well as repeated attribute sub-trees in the translated IR (differing
only in their `recId`s).

This PR refactors the importer to handle caching inside a recursive
context.
- In the presence of unbound self-refs, the translation result is cached
in a separate cache that keeps track of the set of dependent unbound
self-refs.
- A dependent cache entry is valid only when all the unbound self-refs
are in scope. Whenever a cached entry goes out of scope, it will be
removed the next time it is looked up.
2024-04-08 01:09:54 -07:00
David Green
9fd2e2c2fd
[DAG][AArch64] Support masked loads/stores with nontemporal flags (#87608)
SVE has some non-temporal masked loads and stores. The metadata coming
from the nodes is not copied to the MMO at the moment though, meaning it
will generate a normal instruction. This patch ensures that the right
flags are set if the instruction has non-temporal metadata.
2024-04-08 08:53:27 +01:00
David Green
ac321cbb03
[AArch64][GlobalISel] Legalize Insert vector element (#81453)
This attempts to standardize and extend some of the insert vector
element lowering. Most notably:
- More types are handled by splitting illegal vectors.
- The index type for G_INSERT_VECTOR_ELT is canonicalized to
  TLI.getVectorIdxTy(), similar to extact_vector_element.
- Some of the existing patterns now have the index type specified to
  make sure they can apply to GISel too.
- The C++ selection code has been removed, relying on tablegen patterns.
- G_INSERT_VECTOR_ELT with small GPR input elements are pre-selected to
  use a i32 type, allowing the existing patterns to apply.
- Variable index inserts are lowered in post-legalizer lowering,
  expanding into a stack store and reload.
2024-04-08 08:44:13 +01:00
Saiyedul Islam
2084a07087
Revert "[compiler-rt] Allow running tests without installing first"
This reverts commit c91254db1dcace869f4d3f1ac659bdd7700a1459.

It was throwing error:
 g++: error: unrecognized command line option ‘-resource-dir=
2024-04-08 03:35:23 -04:00
Bevin Hansson
110c22fe12
[ExpandLargeFpConvert] Support bfloat. (#87619)
The conversion expansions did not properly handle bfloat types.

I'm not certain that these expansions are completely correct;
I don't have any experience with AMDGPU or the ability to run
anything to test it.

Note that it doesn't seem like AMDGPU with GlobalISel can
handle fptrunc of float to bfloat, which is needed for itofp.
I've omitted the GISEL run for the bfloat case.

This fixes #85379.
2024-04-08 09:07:55 +02:00
Wang Pengcheng
eaa063f0c6 [RISCV] Remove duplicated --target 2024-04-08 14:59:17 +08:00
Prashant Kumar
9ffecef1c6
[mlir][vector][NFC] Fix typo temp -> tmp. (#87878) 2024-04-08 08:34:36 +02:00
Lang Hames
fdd023612c Revert "[ORC] Replace some KV loop variables with structured bindings."
This reverts commit 006aaf32258fc27656c936f6aad729e4c77e3847 while I
investigate some bot failures (See e.g.
https://lab.llvm.org/buildbot/#/builders/109/builds/86659).
2024-04-08 00:02:01 -06:00
Christian Sigg
b80e51ce4d [mlir][bazel] Fix BUILD after a2c4b7c8e2740a83f141dcf06cf50359588190b9. 2024-04-08 07:57:54 +02:00
Pengcheng Wang
73ddb2a747
[RISCV] Store VLMul/NF into RegisterClass's TSFlags
This TSFlags was introduced by https://reviews.llvm.org/D108767.

A base class of all RISCV RegisterClass is added and we store
IsVRegClass/VLMul/NF into TSFlags and add helpers to get them.

This can reduce some lines and I think there will be more usages.

Reviewers: preames, topperc

Reviewed By: topperc

Pull Request: https://github.com/llvm/llvm-project/pull/84894
2024-04-08 13:35:37 +08:00
Nikita Popov
91189afef5 Revert "[indvars] Missing variables at Og: (#69920)"
This reverts commit 739fa1c84b92b8af7dceedf2e5ad808a64e85a57.

This introduces a layering violation by using IR in Support headers.
2024-04-08 14:31:52 +09:00
Lang Hames
006aaf3225 [ORC] Replace some KV loop variables with structured bindings.
This allows us to remove a lot of boilerplate .first and .second references
and improve readability.

Coding my way home: 1.58814S, 91.93889W
2024-04-07 23:30:46 -06:00
Pengcheng Wang
f3b5597364
[RISCV] Use larger copies when register tuples are aligned
When the encoding of register tuples are aligned, we can use a copy
with larger LMUL to reduce copies.

Reviewers: preames, topperc, lukel97

Reviewed By: topperc, lukel97

Pull Request: https://github.com/llvm/llvm-project/pull/84455
2024-04-08 13:24:57 +08:00
Carlos Alberto Enciso
739fa1c84b
[indvars] Missing variables at Og: (#69920)
https://bugs.llvm.org/show_bug.cgi?id=51735
https://github.com/llvm/llvm-project/issues/51077

In the given test case:
 ```
4 ...
 5 void bar() {
 6   int End = 777;
 7   int Index = 27;
 8   char Var = 1;
 9   for (; Index < End; ++Index)
10     ;
11   nop(Index);
12 }
13 ...
```
Missing local variable `Index` after loop `Induction Variable Elimination`. When adding a breakpoint at line `11`, LLDB does not have information on the variable. But it has info on `Var` and `End`.
2024-04-08 05:31:56 +01:00
Haohai Wen
cebf77fb93
[CodeGen][DebugInfo] Add missing DebugLoc for SplitCriticalEdge (#72192)
In SplitCriticalEdge, DebugLoc of the branch instruction in new created
MBB was set to empty. It should be set and we can find proper DebugLoc
for it in most cases. This patch set it to non empty merged DebugLoc of
current MBB branches.
2024-04-08 09:44:34 +08:00
Philip Reames
da675b922c [RISCV] Expand test coverage of stack offsets between 2^11 and 2^15
Adds two sets of tests.  First, one for prolog/epilogue insertions where
the second stack adjustment can be done with shNadd for zba.  Second, a
set of tests with offsets off SP in the same ranges, but also adding
varying alignments.
2024-04-07 15:22:25 -07:00
Kazu Hirata
4d1bb7699b
[memprof] Fix a typo in writeMemProfV1 (#87890)
This patch borrows memprof-merge.test to test --memprof-version.
2024-04-07 15:06:13 -07:00
Lang Hames
649523f6f7 [ORC] Add an ExecutionSession state verifier.
Add an ExecutionSession state verifier, enabled under EXPENSIVE_CHECKS, that can
be used to identify inconsistent session state to assist in tracking down bugs.

This initial version was motivated by investigation of the EDU-update bug that
was fixed in a671ceec334.

rdar://125376708
2024-04-07 15:36:45 -06:00
Owen Pan
943db678da
[clang-format][NFC] Add getNextNonComment() to FormatTokenSource (#87868) 2024-04-07 13:58:49 -07:00
Florian Hahn
15d11a4de9
[VPlan] Track IsOrdered in VPReductionRecipe, remove use of ILV (NFCI).
Instead of using ILV.useOrderedReductions during ::execute, instead
store the information at recipe construction.

Another step towards making recipe'::execute independent of legacy ILV.
2024-04-07 20:33:22 +01:00
Kazu Hirata
3f16ff4e68
[memprof] Use static instead of anonymous namespaces (#87889)
This patch replaces anonymous namespaces with static as per LLVM
Coding Standards.
2024-04-07 11:38:15 -07:00
Cyndy Ishida
a3bb9c2b06
[cmake] Prevent implicitly passing -no_exported_symbols (#87846)
* It is possible to setup llvm-project builds without going through
`llvm/CMakeList.txt` so the fatal error handling should be smarter.
* Disable option on Apple style lldb-linux builds.
2024-04-07 10:22:34 -07:00
Alex Richardson
10b1864dff [compiler-rt] Do not add -rpath to linker args on Windows
This is not supported. Should hopefully fix Windows CI after
commit c91254db1dcace869f4d3f1ac659bdd7700a1459.
2024-04-07 10:22:06 -07:00
David Green
d57d094779 [AArch64] Add test for LD2/LD3/LD4 shuffle cost models. NFC 2024-04-07 18:18:32 +01:00
Alexander Richardson
c91254db1d
[compiler-rt] Allow running tests without installing first
Currently, the testsuite uses the default runtimes path to find the
runtimes libraries which may or may not match the just-built runtimes.
This change uses the `-resource-dir` flag for clang whenever
`COMPILER_RT_TEST_STANDALONE_BUILD_LIBS` is set to ensure that we are
actually testing the currently built libraries rather than the ones
bundled with `${COMPILER_RT_TEST_COMPILER}`.

The existing logic works fine when clang and compiler-rt share the same
build directory ``-DLLVM_ENABLE_PROJECTS=clang;compiler-rt`, but when
building compiler-rt separately we need to tell the compiler used for
the tests where it can find the just-built libraries.

This reduces the fixes check-all failures to one in my configuration:
```
cmake -DCMAKE_BUILD_TYPE=RelWithDebInfo -G Ninja
-DCMAKE_C_COMPILER=$HOME/output/upstream-llvm/bin/clang
-DCMAKE_CXX_COMPILER=$HOME/output/upstream-llvm/bin/clang++
-DCOMPILER_RT_INCLUDE_TESTS=ON
-DLLVM_EXTERNAL_LIT=$HOME/build/upstream-llvm-project-build/bin/llvm-lit
-DLLVM_CMAKE_DIR=$HOME/output/upstream-llvm
-DCOMPILER_RT_DEBUG=OFF
-S $HOME/src/upstream-llvm-project/compiler-rt
-B $HOME/src/upstream-llvm-project/compiler-rt/cmake-build-all-sanitizers
```

Reviewed By: vitalybuka, delcypher, MaskRay

Pull Request: https://github.com/llvm/llvm-project/pull/83088
2024-04-07 09:50:06 -07:00
Alexey Bataev
a612524197
[SLP]Fix the cost of the reduction result to the final type.
Need to fix the way the cost is calculated, otherwise wrong cast opcode
can be selected and lead to the over-optimistic vector cost. Plus, need
to take into account reduction type size.

Reviewers: RKSimon

Reviewed By: RKSimon

Pull Request: https://github.com/llvm/llvm-project/pull/87528
2024-04-07 09:51:47 -04:00
Vlad Serebrennikov
298f8f73e1
[clang][NFC] Remove "Sema" prefix from Sema-related functions (#87914)
@AaronBallman once noted that this prefix is a historical accident, and
shouldn't be there. I agree.
2024-04-07 17:37:56 +04:00
Danny Mösch
7a4e89761a
[clang-tidy] Add fix-its to readability-avoid-return-with-void-value check (#81420) 2024-04-07 13:28:29 +02:00
Mark de Wever
8f01d3ff44 [libc++][doc] Updates format status page. 2024-04-07 13:08:02 +02:00
Jacob Lifshay
da5a86b53e
[IR] Fix typo in trunc nuw semantics; NFC (#87285) 2024-04-07 15:54:10 +08:00
David Green
869797daca [VectorCombine] Add a debug message for foldShuffleOfCastop. NFC
This optimization, much like the existing foldShuffleOfBinops can cause a
lot of regressions. Add a quick debug message to make the costs are more
obvious.
2024-04-07 07:54:22 +01:00
Fabian Mora
a2c4b7c8e2
[mlir] Add convertInstruction and getSupportedInstructions to LLVMImportInterface (#86799)
This patch adds the `convertInstruction` and `getSupportedInstructions`
to `LLVMImportInterface`, allowing any non-LLVM dialect to specify how
to import LLVM IR instructions and overriding the default import of LLVM instructions.
2024-04-07 08:46:21 +02:00
Aviad Cohen
ccc02563f4
[mlir][linalg]: Fixed possible memory leak in cloneToCollapsedOp (#87595)
* Direct call to `clone` function leads to memory leak. Instead, we should use `RewriterBase` clone function instead.
2024-04-07 08:23:16 +03:00
Jianjian Guan
bc8726b16b
[RISCV] Support codegen of vfmv.v.f for bfloat vector with both Zvfbfmin and Zfbfmin (#87318)
vfmv, vfmerge should support bfloat vector when we have both Zvfbfmin
and Zfbfmin, this patch tries to support vfmv first.
2024-04-07 10:41:47 +08:00
NAKAMURA Takumi
ba5dad35fb [Bazel] Enable LLVM_VERSION_PRINTER_SHOW_BUILD_CONFIG (for #87585) 2024-04-07 11:02:08 +09:00
NAKAMURA Takumi
d08a76d1ac Fix warnings discovered by #87348 [-Wunused-but-set-variable] 2024-04-07 11:02:08 +09:00
AtariDreams
8389b3bf60
[X86] Fix typo: QWORD alignment is greater than or equal to 8, not greater than 8 (#87819)
Align(8) is QWORD aligned, but this was checking to see if alignment was
greater than that, when it should have been checking for being greater
than OR EQUAL to Align(8).

This bug was introduced in
https://github.com/llvm/llvm-project/commit/6a6af30d433d7 during the
transition to the Align type.
2024-04-07 08:43:13 +08:00
Matthias Springer
c459a366d3
[mlir][Arith] ValueBoundsOpInterface: Support arith.select (#87870)
This commit adds a `ValueBoundsOpInterface` implementation for
`arith.select`. The implementation is almost identical to `scf.if`
(#85895), but there is one special case: if the condition is a shaped
value, the selection is applied element-wise and the result shape can be
inferred from either operand.

Note: This is a re-upload of #86383.
2024-04-07 09:36:28 +09:00
Noah Goldstein
e4db938a4e [ValueTracking] Support non-constant idx for computeKnownFPClass of insertelement
Its same logic as before, we just need to intersect what we know about
the new Elt and the entire pre-existing Vec.

Closes #87708
2024-04-06 17:51:15 -05:00
Noah Goldstein
d5b48ceb74 [ValueTracking] Add tests for non-constant idx for fpclass of insertelement; NFC 2024-04-06 17:51:15 -05:00
darkbuck
8e98435ae9
[GISel][Combine] Enhance combining on G_BUILD_VECTOR
Reviewers: aemerson, arsenm

Reviewed By: arsenm

Pull Request: https://github.com/llvm/llvm-project/pull/87831
2024-04-06 18:33:01 -04:00
lntue
7248c9feb9
[libc] Adding FP_INT_* macro constants if missing in overlay mode. (#87880) 2024-04-06 17:38:47 -04:00
lntue
5f7b133e32
[libc][math] Update error bound for log1p to compensate for directional rounding. (#87893) 2024-04-06 17:38:20 -04:00
Martin Storsjö
bd9486b4ec Revert "[SLP]Improve minbitwidth analysis for abs/smin/smax/umin/umax intrinsics."
This reverts commit 66b528078e4852412769375e35d2a672bf36a0ec.

This commit caused miscompilations, breaking tests in the libyuv
testsuite - see
https://github.com/llvm/llvm-project/pull/86135#issuecomment-2041049709
for more details.
2024-04-06 23:53:26 +03:00
Sizov Nikita
d38bff460a
[AArch64] SimplifyDemandedBitsForTargetNode - add AArch64ISD::BICi handling (#76644)
Fold BICi if all destination bits are already known to be zeroes

```llvm
define <8 x i16> @haddu_known(<8 x i8> %a0, <8 x i8> %a1) {
  %x0 = zext <8 x i8> %a0 to <8 x i16>
  %x1 = zext <8 x i8> %a1 to <8 x i16>
  %hadd = call <8 x i16> @llvm.aarch64.neon.uhadd.v8i16(<8 x i16> %x0, <8 x i16> %x1)
  %res = and <8 x i16> %hadd, <i16 511, i16 511, i16 511, i16 511,i16 511, i16 511, i16 511, i16 511>
  ret <8 x i16> %res
}
declare <8 x i16> @llvm.aarch64.neon.uhadd.v8i16(<8 x i16>, <8 x i16>)
```

```
haddu_known:                            // @haddu_known
        ushll   v0.8h, v0.8b, #0
        ushll   v1.8h, v1.8b, #0
        uhadd   v0.8h, v0.8h, v1.8h
        bic     v0.8h, #254, lsl #8 <-- this one will be removed as we know high bits are zero extended
        ret
```

Fixes #53881
Fixes #53622
2024-04-06 21:41:24 +01:00
Matt Arsenault
4cb110a84f
[RFC] IR: Support atomicrmw FP ops with vector types (#86796)
Allow using atomicrmw fadd, fsub, fmin, and fmax with vectors of
floating-point type. AMDGPU supports atomic fadd for <2 x half> and <2 x
bfloat> on some targets and address spaces.

Note this only supports the proper floating-point operations; float
vector typed xchg is still not supported. cmpxchg still only supports
integers, so this inserts bitcasts for the loop expansion.

I have support for fp vector typed xchg, and vector of int/ptr
separately implemented but I don't have an immediate need for those
beyond feature consistency.
2024-04-06 15:27:45 -04:00