206 Commits

Author SHA1 Message Date
Fangrui Song
e640ca8b9a MCSymbolELF: Migrate away from classof
The object file format specific derived classes are used in context
where the type is statically known. We don't use isa/dyn_cast and we
want to eliminate MCSymbol::Kind in the base class.
2025-08-03 15:45:36 -07:00
Fangrui Song
e6b25288eb MCExpr: Migrate away from operator<<
Printing an expression is error-prone without a MCAsmInfo argument.
Remove the operator<< overload and replace callers with
MCAsmInfo::printExpr. Some callers are changed to MCExpr::print, with
the goal of eventually making it private.
2025-06-28 14:41:58 -07:00
Fangrui Song
e878b7e349 MCParsedAsmOperand::print: Add MCAsmInfo parameter
so that subclasses can provide the appropriate MCAsmInfo to print
MCExpr objects.

At present, llvm/utils/TableGen/AsmMatcherEmitter.cpp constucts a
generic MCAsmInfo.
2025-06-28 12:05:33 -07:00
Fangrui Song
205dcf7146 PowerPC: Remove redundant MCSymbolRefExpr::VariantKind casts 2025-06-27 00:28:41 -07:00
Fangrui Song
418c5de19b PowerPC: Move PPCMCExpr into PPCMCAsmInfo
to align with targets that have made the transition.
2025-06-26 00:11:04 -07:00
Andrew Rogers
19658d1474
[llvm] annotate interfaces in llvm/Target for DLL export (#143615)
## Purpose

This patch is one in a series of code-mods that annotate LLVM’s public
interface for export. This patch annotates the `llvm/Target` library.
These annotations currently have no meaningful impact on the LLVM build;
however, they are a prerequisite to support an LLVM Windows DLL (shared
library) build.

## Background

This effort is tracked in #109483. Additional context is provided in
[this
discourse](https://discourse.llvm.org/t/psa-annotating-llvm-public-interface/85307),
and documentation for `LLVM_ABI` and related annotations is found in the
LLVM repo
[here](https://github.com/llvm/llvm-project/blob/main/llvm/docs/InterfaceExportAnnotations.rst).

A sub-set of these changes were generated automatically using the
[Interface Definition Scanner (IDS)](https://github.com/compnerd/ids)
tool, followed formatting with `git clang-format`.

The bulk of this change is manual additions of `LLVM_ABI` to
`LLVMInitializeX` functions defined in .cpp files under llvm/lib/Target.
Adding `LLVM_ABI` to the function implementation is required here
because they do not `#include "llvm/Support/TargetSelect.h"`, which
contains the declarations for this functions and was already updated
with `LLVM_ABI` in a previous patch. I considered patching these files
with `#include "llvm/Support/TargetSelect.h"` instead, but since
TargetSelect.h is a large file with a bunch of preprocessor x-macro
stuff in it I was concerned it would unnecessarily impact compile times.

In addition, a number of unit tests under llvm/unittests/Target required
additional dependencies to make them build correctly against the LLVM
DLL on Windows using MSVC.

## Validation

Local builds and tests to validate cross-platform compatibility. This
included llvm, clang, and lldb on the following configurations:

- Windows with MSVC
- Windows with Clang
- Linux with GCC
- Linux with Clang
- Darwin with Clang
2025-06-17 13:28:45 -07:00
Fangrui Song
f4a63523b8 PowerPC: Migrate to newer relocation specifier representation
* Use MCAsmInfo::printSpecifierExpr instead of MCExpr::print.
* Replace PPCMCExpr with MCSpecifierExpr.
2025-06-15 14:51:20 -07:00
Fangrui Song
b839632bf4 PowerPC: Rename PPCMCExpr::VK_ to PPC::S_
Prepare for removing PPCMCExpr. Adopt the newer naming convention with
AMDGPU/WebAssembly/VE/M68k.
2025-06-15 13:17:22 -07:00
Fangrui Song
8eac7f5a81 PPCMCExpr: Migrate to MCSpecifierExpr 2025-06-07 23:01:29 -07:00
Fangrui Song
97a32f2ad9 MC: Add MCSpecifierExpr to unify target MCExprs
Many targets define MCTargetExpr subclasses just to encode an expression
with a relocation specifier. Create a generic MCSpecifierExpr to be
inherited instead. Migrate M68k and SPARC as examples.
2025-06-07 11:33:40 -07:00
Fangrui Song
a0901a2f87 Replace #include MCAsmLexer.h with AsmLexer.h
MCAsmLexer.h has been made a forwarder header since #134207
2025-05-25 11:57:29 -07:00
Fangrui Song
0ed4bdfe70 PPCAsmParser: Detect multiple specifiers
In addition, simplify extractSpecifier and switch to the `Specifier`
naming convention.
2025-03-27 20:57:13 -07:00
Fangrui Song
13bb2f450e [MC] Rename some VariantKind functions to use Specifier
Use the more appropriate term "relocation specifier" and avoid the
variable name `Kind`, which conflicts with MCExpr and FixupKind.
2025-03-20 22:06:16 -07:00
Fangrui Song
c2692afc0a [PowerPC] Rename VariantKind to Specifier
Follow the X86 and Mips renaming.

> "Relocation modifier" suggests adjustments happen during the linker's relocation step rather than the assembler's expression evaluation.
> "Relocation specifier" is clear, aligns with Arm and IBM’s usage, and fits the assembler's role seamlessly.

In addition, rename *MCExpr::getKind, which confusingly shadows the base class getKind.
2025-03-20 21:40:57 -07:00
Fangrui Song
5d5f16204f Move PowerPC-specific MCSymbolRefExpr::VariantKind to PPCMCExpr
Most changes are mechanic, except:

* ELFObjectWriter::shouldRelocateWithSymbol: .TOC.@tocbase does not
  register the undefined symbol.  Move the handling into the
  Sym->isUndefined() code path.
* ELFObjectWriter::fixSymbolsInTLSFixups's VK_PPC* cases are moved to
  PPCELFObjectWriter::getRelocType. We should do similar refactoring
  for other targets and eventually remove fixSymbolsInTLSFixups.

In the future, we should classify PPCMCExpr similar to AArch64MCExpr.
2025-03-12 23:00:03 -07:00
Fangrui Song
642a4763df [PowerPC] Rename PPCMCExpr's VK_PPC_ to VK_. NFC
Make the name conciser. PPC-specific MCSymbolRefExpr::VariantKind
members will be moved to PPCMCExpr and we will not ue
MCSymbolRefExpr::VariantKind's "generic" members, so there won't be
mix-and-match.
2025-03-12 21:55:15 -07:00
Fangrui Song
75f6fe2ee5 [MC] Remove unneeded MCSymbolRefExpr::create overload and add comments
The StringRef overload is often error-prone as users might forget to
register the MCSymbol.

Add comments to MCTargetExpr and MCSymbolRefExpr::VariantKind.
In the distant future the VariantKind parameter might be removed.
2025-03-05 22:10:08 -08:00
Fangrui Song
8981298535 Move PowerPC-specific absolute MCSymbolRefExpr::VariantKind to PPCMCExpr
This cleans up @l @ha optimization in PPCAsmParser and is also the first
step toward removing VK_PPC_* from the generic MCSymbolRefExpr::VariantKind.

Basically we ensure that @l @ha family modifiers always lead to
PPCMCExpr and avoid MCSymbolRefExpr::VariantKind. This allows us
to delete a lot of switch statements that involve a long list of VK_PPC_LO/VK_PPC_HI/...
2025-03-04 22:14:04 -08:00
Fangrui Song
0301580580 [PowerPC] Remove VK_PPC_TLSGD and VK_PPC_TLSLD
52cf8e44880bcf614068b66b63393aa8da1edd76 (2013) introduced the
VK_PPC_TLSGD workaround to prevent unconditional reference to
_GLOBAL_OFFSET_TABLE_ in ELFObjectWriter.

e2b355d651ed8f2cbe61672c4c39b6419e471265 (2015) removed the
`_GLOBAL_OFFSET_TABLE_` hack for the generic VK_TLSGD,
making the VK_PPC_TLSGD workaround unneeded.
2025-03-02 22:25:59 -08:00
Fangrui Song
98a640a2fa [MC] Move VariantKind info to MCAsmInfo
Follow-up to 14951a5a3120e50084b3c5fb217e2d47992a24d1

* Unify getVariantKindName and getVariantKindForName
* Allow each target to specify the preferred case (albeit ignored in MCParser)

Note: targets that use variant kinds should call MCExpr::print with a
non-null MAI to print variant kinds. operator<< passes a nullptr to
`MCExpr::print`, which should be avoided (e.g. Hexagon; fixed in
commit cf00ac81ac049cddb80aec1d6d88b8fab4f209e8).
2025-03-02 20:36:20 -08:00
Fangrui Song
8c7c791284 [MCParser] Use getVariantKindForName and move PPC specific VariantKind to PowerPC/ 2025-03-02 16:20:59 -08:00
Nikita Popov
f1252f539c
[PPC][MC] Restore support for case-insensitive register names (#128525)
Lowercase the name before calling MatchRegisterName(), to restore
support for using `%R3` instead of `%r3` and similar, matching the GNU
assembler.

Fixes https://github.com/llvm/llvm-project/issues/126786.
2025-02-24 18:06:51 +01:00
Craig Topper
62254f6615
[Targets] Move *TargetStreamer.h files into their MCTargetDesc directory. (#127433)
These files are included from MCTargetDesc so should be there instead of in
the main directory for the target.
2025-02-17 09:51:01 -08:00
Kazu Hirata
f71cb9dbb7
[PowerPC] Remove unused includes (NFC) (#116163)
Identified with misc-include-cleaner.
2024-11-14 07:55:18 -08:00
Jake Egan
48cc435109
Reland "[PowerPC] Add error for incorrect use of memory operands (#114277)" (#115958)
Commit 93589057830b2c3c35500ee8cac25c717a1e98f9 was reverted because it
caused a failure with test `lld :: ELF/ppc64-local-exec-tls.s`. This
relands the commit with a fix for the test.
2024-11-13 22:24:19 -05:00
Jake Egan
0e52a0721e Revert "[PowerPC] Add error for incorrect use of memory operands (#114277)"
This commit broke a test on a couple bots
lld :: ELF/ppc64-local-exec-tls.s

This reverts commit 93589057830b2c3c35500ee8cac25c717a1e98f9.
2024-11-12 04:03:06 -05:00
Jake Egan
9358905783
[PowerPC] Add error for incorrect use of memory operands (#114277)
If an instruction doesn't support memory operands, but one is provided,
an error should be raised. And conversely, if an instruction requires a
memory operand, but none is given, an error should be raised.
2024-11-12 03:00:06 -05:00
Hubert Tong
0812cde3bf NFC: Make isPPC64 const and use member initializer 2024-11-01 20:41:25 -04:00
Lei Huang
23da16933b
[NFC][PowerPC] Use tablegen's MatchRegisterName() (#111553)
Use PPC `MatchRegisterName()` that is auto generated by table gen.
2024-10-15 16:58:36 -04:00
Lei Huang
4e6a6eda30
[PowerPC] Update matchRegisterName() to return MCRegister instead of bool (#111186)
Initial patch to start using TableGen's auto generated function
`MatchRegisterName()`.

Update `PPCAsmParser::matchRegisterName()` implementation to align more
with tablegen's auto generated function.
2024-10-08 11:27:18 -04:00
Lei Huang
4b524088a8
[NFC] Update function names in MCTargetAsmParser.h (#108643)
Update function names to adhere to LLVM coding standard.
2024-09-18 11:43:49 -04:00
Kazu Hirata
33e7cd6ff2
[llvm] Prefer StringRef::substr to StringRef::slice (NFC) (#105943)
S.substr(N) is simpler than S.slice(N, StringRef::npos) and
S.slice(N, S.size()). Also, substr is probably better recognizable
than slice thanks to std::string_view::substr.
2024-08-25 11:30:49 -07:00
Sergei Barannikov
5e5b656102
[MC] Make MCParsedAsmOperand::getReg() return MCRegister (#86444) 2024-03-25 05:13:48 +03:00
Kazu Hirata
586ecdf205
[llvm] Use StringRef::{starts,ends}_with (NFC) (#74956)
This patch replaces uses of StringRef::{starts,ends}with with
StringRef::{starts,ends}_with for consistency with
std::{string,string_view}::{starts,ends}_with in C++20.

I'm planning to deprecate and eventually remove
StringRef::{starts,ends}with.
2023-12-11 21:01:36 -08:00
Stefan Pintilie
ea8b95d0d5
[PowerPC] Add a set of extended mnemonics that are missing from Power 10. (#73003)
This patch adds the majority of the missing extended mnemonics that were
introduced in Power 10.

The only extended mnemonics that were not added are related to the plq
and pstq instructions. These will be added in a separate patch as the
instructions themselves would also have to be added.
2023-12-07 13:40:00 -05:00
Sergei Barannikov
a479be0f39 [MC] Change tryParseRegister to return ParseStatus (NFC)
This finishes the work of replacing OperandMatchResultTy with
ParseStatus, started in D154101.
As a drive-by change, rename some RegNo variables to just Reg
(a leftover from the days when RegNo had 'unsigned' type).
2023-09-06 10:28:12 +03:00
Fangrui Song
6e07e90890 [PPC32] Parse bl __tls_get_addr(x@tlsgd)@plt+32768
PPC32 -fpic/-fPIC generates `bl __tls_get_addr(x@tlsgd)@PLT` or
`bl __tls_get_addr(x@tlsgd)@PLT+32768`.
`powerpc-linux-gnu-gcc -fPIC` generates `bl __tls_get_addr+32668(x@tlsgd)@plt`.

These expressions can be parsed by GNU assembler but not by the integrated
assembler. Add the support.

Differential Revision: https://reviews.llvm.org/D153206
2023-08-07 19:45:28 -07:00
Fangrui Song
2cb805666a PPCAsmParser: Use parseOptionalToken
to simplify code near __tls_get_addr parsing.
2023-06-17 12:34:49 -07:00
Kazu Hirata
6c3ea866e9 [llvm] Migrate {starts,ends}with_insensitive to {starts,ends}_with_insensitive (NFC)
This patch migrates uses of StringRef::{starts,ends}with_insensitive
to StringRef::{starts,ends}_with_insensitive so that we can use names
similar to those used in std::string_view.  I'm planning to deprecate
StringRef::{starts,ends}with_insensitive once the migration is
complete across the code base.

Differential Revision: https://reviews.llvm.org/D150426
2023-05-12 15:37:37 -07:00
Stefan Pintilie
c74aec99aa [PowerPC] Implement DFP add and sub instructions.
Add the following Decimal Floating Point (DFP) instructions for PowerPC.
dadd, daddq, dsub, dsubq

In order to add these instructions a new register class for a pair
of floating point registers is added.

This patch is only to allow the user to specify the instructions in
assembly. There is no scheduling or patterns for the instructions.

Reviewed By: amyk

Differential Revision: https://reviews.llvm.org/D148597
2023-05-01 21:13:52 -04:00
Fangrui Song
432caca39a Simplify with hasFeature. NFC 2023-02-17 18:22:24 -08:00
Kazu Hirata
7e6e636fb6 Use llvm::has_single_bit<uint32_t> (NFC)
This patch replaces isPowerOf2_32 with llvm::has_single_bit<uint32_t>
where the argument is wider than uint32_t.
2023-02-15 22:17:27 -08:00
Kazu Hirata
e078201835 [Target] Use llvm::count{l,r}_{zero,one} (NFC) 2023-01-28 09:23:07 -08:00
Sergei Barannikov
4d48ccfc88 [MC] Use MCRegister instead of unsigned in MCTargetAsmParser
Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D140273
2022-12-18 12:12:05 -08:00
Guillaume Chatelet
6c09ea3fdd [Alignment][NFC] Use Align in MCStreamer::emitValueToAlignment
Differential Revision: https://reviews.llvm.org/D138674
2022-11-24 16:09:44 +00:00
Stefan Pintilie
9df924a634 [PowerPC] Add new DMR register classes to Future CPU.
A new register class as well as a number of related subregisters are being added
to Future CPU. These registers are Dense Math Registers (DMR) and are 1024 bits
long. These regsiters can also be used in consecutive pairs which leads to a
register that is 2048 bits.

This patch also adds 7 new instructions that use these registers. More
instructions will be added in future patches.

Reviewed By: amyk, saghir

Differential Revision: https://reviews.llvm.org/D136366
2022-11-03 08:29:55 -05:00
Fangrui Song
de9d80c1c5 [llvm] LLVM_FALLTHROUGH => [[fallthrough]]. NFC
With C++17 there is no Clang pedantic warning or MSVC C5051.
2022-08-08 11:24:15 -07:00
Nemanja Ivanovic
2aaba44b5c [PowerPC] Allow absolute expressions in relocations
The Linux kernel build uses absolute expressions suffixed with @lo/@ha
relocations. This currently doesn't work for DS/DQ form instructions and
there is no reason for it not to. It also works with GAS.
This patch allows this as long as the value is a multiple of 4/16
for DS/DQ form.

Differential revision: https://reviews.llvm.org/D115419
2022-02-22 09:53:08 -06:00
Qiu Chaofan
00d68c3824 [PowerPC] Support parsing GNU attributes in MC
This patch is the first step to enable support of GNU attribute in LLVM
PowerPC, enabling it for PowerPC targets, otherwise llvm-mc raises error
when seeing the attribute section.

Reviewed By: jsji

Differential Revision: https://reviews.llvm.org/D115854
2022-01-22 23:29:34 +08:00
Kazu Hirata
f3a344d212 [Target] Remove redundant member initialization (NFC)
Identified with readability-redundant-member-init.
2022-01-06 22:01:44 -08:00