6439 Commits

Author SHA1 Message Date
Nikita Popov
98db33349b [SLC] Fix pointer diff type in sprintf() optimization
We should always be calculating a byte-wise difference here.
Previously this calculated the pointer difference while taking
the pointer element type into account, which is incorrect.
2022-01-25 15:22:56 +01:00
Sebastian Neubauer
4ed7c6eec9 [AMDGPU] Only match correct type for a16
Addresses are floats when a sampler is present and unsigned integers
when no sampler is present.

Therefore, only zext instructions, not sext instructions should match.

Also match integer constants that can be truncated.

Differential Revision: https://reviews.llvm.org/D118043
2022-01-25 14:59:16 +01:00
Sanjay Patel
c548bc258c [InstCombine] add tests for icmp with masked mul operand; NFC
More coverage for D114272
2022-01-24 15:15:03 -05:00
Sebastian Neubauer
80532ebb50 [AMDGPU][InstCombine] Remove zero image offset
Remove the offset parameter if it is zero.

Differential Revision: https://reviews.llvm.org/D117876
2022-01-24 18:06:33 +01:00
Simon Pilgrim
f69379d0a4 [InstCombine] Add test coverage for PR48683
D108992 added self-multiply handling to KnownBits::mul but we don't use it yet..
2022-01-23 18:03:17 +00:00
Sanjay Patel
2e26633af0 [IR] document and update ctlz/cttz intrinsics to optionally return poison rather than undef
The behavior in Analysis (knownbits) implements poison semantics already,
and we expect the transforms (for example, in instcombine) derived from
those semantics, so this patch changes the LangRef and remaining code to
be consistent. This is one more step in removing "undef" from LLVM.

Without this, I think https://github.com/llvm/llvm-project/issues/53330
has a legitimate complaint because that report wants to allow subsequent
code to mask off bits, and that is allowed with undef values. The clang
builtins are not actually documented anywhere AFAICT, but we might want
to add that to remove more uncertainty.

Differential Revision: https://reviews.llvm.org/D117912
2022-01-23 11:22:48 -05:00
Sanjay Patel
39e602b6c4 [InstCombine] try to fold binop with phi operands
This is an alternate version of D115914 that handles/tests all binary opcodes.

I suspect that we don't see these patterns too often because -simplifycfg
would convert the minimal cases into selects rather than leave them in phi form
(note: instcombine has logic holes for combining the select patterns too though,
so that's another potential patch).

We only create a new binop in a predecessor that unconditionally branches to
the final block.
https://alive2.llvm.org/ce/z/C57M2F
https://alive2.llvm.org/ce/z/WHwAoU (not safe to speculate an sdiv for example)
https://alive2.llvm.org/ce/z/rdVUvW (but it is ok on this path)

Differential Revision: https://reviews.llvm.org/D117110
2022-01-22 15:00:06 -05:00
Caroline Concatto
ad43217a04 [InstCombine] Fold for masked gather when loading the same value each time.
This patch checks in the masked gather when the first operand value is a
splat and the mask is all one, because the masked gather is reloading the
same value each time. This patch replaces this pattern of masked gather by
a scalar load of the value and splats it in a vector.

Differential Revision: https://reviews.llvm.org/D115726
2022-01-21 14:19:51 +00:00
Sebastian Neubauer
603d18033c [AMDGPU][InstCombine] Remove zero LOD bias
If the bias is zero, we can remove it from the image instruction.
Also copy other image optimizations (l->lz, mip->nomip) to IR combines.

Differential Revision: https://reviews.llvm.org/D116042
2022-01-21 12:09:07 +01:00
Sebastian Neubauer
0530fdbbbb [AMDGPU] Fix LOD bias in A16 combine
As the codegen fix in D111754, the LOD bias needs to be converted to 16
bits. Fix this in the combine.

Differential Revision: https://reviews.llvm.org/D116038
2022-01-21 12:09:06 +01:00
Sebastian Neubauer
b351ac3873 [AMDGPU][NFC] Regenerate InstCombine test 2022-01-21 12:09:06 +01:00
Pawe Bylica
1d7604fdce
[InstCombine] Simplify bswap -> shift
Simplify bswap(x) to shl(x) or lshr(x) if x has exactly one
"active byte", i.e. all active bits are contained in boundaries
of a single byte of x.

https://alive2.llvm.org/ce/z/nvbbU5
https://alive2.llvm.org/ce/z/KiiL3J

Reviewed By: spatel, craig.topper, lebedev.ri

Differential Revision: https://reviews.llvm.org/D117680
2022-01-21 01:25:30 +01:00
Paweł Bylica
8457b61699
[test] Add tests for bswap combining. NFC 2022-01-21 00:20:30 +01:00
Sanjay Patel
a7a2860d0e [InstCombine] convert mul with sexted bool and constant to select
We already have the related folds for zext-of-bool, so it
should make things more consistent to have this transform
to select for sext-of-bool too:
https://alive2.llvm.org/ce/z/YikdfA

Fixes #53319
2022-01-20 15:57:01 -05:00
Sanjay Patel
4c1dc65015 [InstCombine] add/adjust tests for multiply with extended bool; NFC 2022-01-20 15:57:01 -05:00
Roman Lebedev
ba8eb31bd9
[InstCombine] Instruction sinking: fix check for function terminating block
Checking for specific function terminating opcodes
means we don't handle other non-hardcoded ones :)

This should probably be generalized to something
similar to the `IsBlockFollowedByDeoptOrUnreachable()`.

Reviewed By: spatel

Differential Revision: https://reviews.llvm.org/D117810
2022-01-20 22:41:31 +03:00
Sanjay Patel
2d031ec5e5 [InstCombine] add one-use check to opposite shift folds
Test comments say this might be intentional, but I don't
see any hard evidence to support it. The extra instruction
shows up as a potential regression in D117680.

One test does show a missed fold that might be recovered
with better demanded bits analysis.
2022-01-20 13:49:23 -05:00
Sanjay Patel
587dccfb12 [InstCombine] avoid 'tmp' usage in test files; NFC
The update script ( utils/update_test_checks.py ) warns against this
because it can conflict with the default FileCheck names given to
anonymous values in the IR.
2022-01-20 13:49:23 -05:00
Roman Lebedev
eb6c6e6058
[NFC][InstCombine] Add test showing failure to sink into resume block 2022-01-20 21:42:08 +03:00
Nadav Rotem
191a6e9dfa optimize icmp-ugt-ashr
This diff optimizes the sequence icmp-ugt(ashr,C_1) C_2. InstCombine
already implements this optimization for sgt, and this patch adds
support ugt. This patch adds the check for UGT.

@craig.topper came up with the idea and proof:

  define i1 @src(i8 %x, i8 %y, i8 %c) {
    %cp1 = add i8 %c, 1
    %i = shl i8 %cp1, %y
    %i.2 = ashr i8 %i, %y
    %cmp = icmp eq i8 %cp1, %i.2
    ;Assume: C + 1 == (((C + 1) << y) >> y)
    call void @llvm.assume(i1 %cmp)

    ; uncomment for the sgt case
    %j = shl i8 %cp1, %y
    %j.2 = sub i8 %j, 1
    %cmp2 = icmp ne i8 %j.2, 127
    ;Assume (((c + 1 ) << y) - 1) != 127
    call void @llvm.assume(i1 %cmp2)

    %s = ashr i8 %x, %y
    %r = icmp sgt i8 %s, %c
    ret i1 %r
  }

  define i1 @tgt(i8 %x, i8 %y, i8 %c) {
    %cp1 = add i8 %c, 1
    %j = shl i8 %cp1, %y
    %j.2 = sub i8 %j, 1

    %r = icmp sgt i8 %x, %j.2
    ret i1 %r
  }

  declare void @llvm.assume(i1)

  This change is related to the optimizations in D117252.

  Differential Revision: https://reviews.llvm.org/D117365
2022-01-20 09:31:46 -08:00
Nikita Popov
da61cb019e [Attributes] Make attribute addition behavior consistent
Currently, the behavior when adding an attribute with the same key
as an existing attribute is inconsistent, depending on the type of
the attribute and the method used to add it. When going through
AttrBuilder::addAttribute(), the new attribute always overwrites
the old one. When going through AttrBuilder::merge() the new
attribute overwrites the existing one if it is a string attribute,
but keeps the existing one for int and type attributes. One
particular API also asserts that you can't overwrite an align
attribute, but does not handle any of the other int, type or string
attributes.

This patch makes the behavior consistent by always overwriting with
the new attribute, which is the behavior I would intuitively expect.
Two tests are affected, which now make a different (but equally
valid) choice. Those tests could be improved by taking the maximum
deref bytes, but I haven't bothered with that, since this is testing
a degenerate case -- the important bit is that it doesn't crash.

Differential Revision: https://reviews.llvm.org/D117552
2022-01-19 12:05:27 +01:00
Philip Reames
31c0e52420 A readonly operand bundle should not prevent inference of readonly from a readnone callee
A readonly operand bundle disallows inference of readnone from the callee, but it should not prevent us from using the readnone fact on the callee to infer readonly for the callsite.

Fixes pr53270.

Differential Revision: https://reviews.llvm.org/D117591
2022-01-18 12:55:13 -08:00
Philip Reames
a9f713f5ac Add test showing missed opt from pr53270 2022-01-18 10:22:17 -08:00
Sanjay Patel
2e21327033 [InstCombine] add tests for fsub with fmul/fdiv operand; NFC 2022-01-18 12:13:45 -05:00
Nikita Popov
f104cc38f4 [ConstantFold] Don't fold load from non-byte-sized vector
Following up on 1470f94d71 (r63981173):

The result here (probably) depends on endianness. Don't bother
trying to handle this exotic case, just bail out.
2022-01-17 17:01:47 +01:00
Sanjay Patel
4cdf30d9d3 [InstCombine] FP with reassoc FMF: (X * C) + X --> X * (MulC + 1.0)
This fold already exists for scalars via FAddCombine (and that's
why 2 of the tests are only changed cosmetically), but that code
misses vectors and has largely been replaced by simpler folds
over time, so this is another step towards removing it.
2022-01-17 10:38:05 -05:00
Sanjay Patel
bcf5e687c9 [InstCombine] add tests for fadd+fmul factorization fold; NFC
As shown in the tests, this transform exists partially already.
2022-01-17 10:38:05 -05:00
Matt Devereau
cee8b255be [AArch64][SVE] Remove Redundant aarch64.sve.convert.to.svbool
Generated code resulted in redundant aarch64.sve.convert.to.svbool
calls for AArch64 Binary Operations. Narrow the more precise operands
instead of widening the less precise operands

Differential Revision: https://reviews.llvm.org/D116730
2022-01-17 14:35:24 +00:00
Sanjay Patel
7037d110fa [InstCombine] propagate IR flags from binop through select
The tests with constant folding that produces poison
could potentially remove the select entirely:
https://alive2.llvm.org/ce/z/e-WUqF
...but this patch just removes the FMF-only limitation on
propagation.
2022-01-17 08:42:48 -05:00
Sanjay Patel
69daa2fa61 [InstCombine] add tests for binop with flags and select op; NFC 2022-01-17 08:42:48 -05:00
Sanjay Patel
9e8a0ea331 [InstCombine] auto-generate complete test check lines; NFC 2022-01-17 08:42:48 -05:00
Nadav Rotem
8dff860c22 [NFC] Add additional tests for icmp predicate.
This commit adds small tests for the combination of:
{exact, no_exact} x { EQ, NE, UGT, UGE, ULT, ULE, SGT, SGE, SLT, SLE}

This is related to the changes in D117338.
2022-01-14 15:22:10 -08:00
Nadav Rotem
9551fc57b7 Fold ashr-exact into a icmp-ugt.
This commit optimizes the code sequence:
  icmp-XXX (ashr-exact (X, C_1), C_2).

Instcombine already implements this optimization for sgt, and this
patch adds support to additional predicates. The transformation is legal
for all predicates if the 'exact' flag is set, and to SGE, UGE, SLT, ULT
when the exact flag is not present.

This pattern is found in the std::vector bounds checks code of the at()
method.

Alive2 proof:
https://alive2.llvm.org/ce/z/JT_WL8

Differential Revision: https://reviews.llvm.org/D117252
2022-01-14 12:58:44 -08:00
Nadav Rotem
8e47ccd5c2 Add new tests that check the icmp-ashr baseline.
This commit adds new tests that check the patterns that D117252 will
fix. As requested by @spatel.

Differential Revision: https://reviews.llvm.org/D117338
2022-01-14 10:58:32 -08:00
Sanjay Patel
02455bea6b [InstCombine] remove unnecessary use check on X >>exact == 0 fold
The transform replaces one icmp with another, so we should
not care if the shift has another use.
2022-01-14 12:52:16 -05:00
Sanjay Patel
d4cf853748 [InstCombine] add tests for icmp with exact shift; NFC 2022-01-14 12:52:16 -05:00
Sanjay Patel
0b2c219995 [InstCombine] add more tests for binop with phi operands; NFC
Goes with D117110.
2022-01-14 11:52:44 -05:00
Sanjay Patel
f417f5f463 [InstCombine] add test for limitation of knownbits with overshift; NFC
The tests above this were added for D30781 and used to provide
coverage for a limit of knownbits, but improvements in other
transforms killed that intended purpose. This was noted because
another proposed improvement in D117110 will further reduce
those tests.
2022-01-14 11:52:44 -05:00
Caroline Concatto
8e5a5b619d [InstCombine] Fold for masked scatters to a uniform address
When masked scatter intrinsic does a uniform store to a destination
address from a source vector, and in this case, the mask is all one value.
This patch replaces the masked scatter with an extracted element of the
last lane of the source vector and stores it in the destination vector.
This patch also folds when the value in the masked scatter is a splat.
In this case, the mask cannot be all zero, and it folds to a scalar store
of the value in the destination pointer.

Differential Revision: https://reviews.llvm.org/D115724
2022-01-14 09:44:34 +00:00
David Green
61888d97f6 [AArch64] Basic demand elements for some intrinsics
A lot of neon intrinsics work lane-wise, meaning that non-demanded
elements in and not demanded out. This teaches that to
AArch64TTIImpl::simplifyDemandedVectorEltsIntrinsic for some simple
single-input truncate intrinsics, which can help remove unnecessary
instructions.

Differential Revision: https://reviews.llvm.org/D117097
2022-01-13 11:53:12 +00:00
David Green
dca3321c73 [AArch64] Add a demand bits intrinsic test for instcombine of AArch64 intrinsics. NFC 2022-01-13 10:46:00 +00:00
Sanjay Patel
c87e917fb2 [InstCombine] add tests for binop with phi operands; NFC 2022-01-12 14:46:30 -05:00
Bryce Wilson
7febd60a90 [instcombine] Add align return attributes for operator new(..., align_val)
(Split from original patch to separate non-NFC part and add coverage.  I typoed when adding the new test, so this change includes the typo fix to let libfunc recongize the signature.  Didn't figure it was worth another separate commit.)

Differential Revision: https://reviews.llvm.org/D116851 (part 2 of 2)
2022-01-10 09:15:20 -08:00
Philip Reames
332642e693 Add test coverage for D116851 2022-01-10 08:48:49 -08:00
Philip Reames
f4c54683d6 [instcombine] Infer alignment for aligned_alloc with potentially zero size
This change removes a previous restriction where we had to prove the allocation performed by aligned_alloc was non-zero in size before using the align parameter to annotate the result.  I believe this was conservatism around the C11 specification of this routine which allowed UB when size was not a multiple of alignment, but if so, it was a partial one at best.  (ex: align 32, size 16  was equally UB, but not restricted)  The spec has since been clarified to require nullptr return, not UB.

A nullptr - the documented return for this function on failure for all cases after UB mentioned above was removed - is trivially aligned for any power of two.  This isn't totally new behavior even for this transform, we'd previously annotate potentially failing allocs (e.g. huge sizes) meaning we were putting align on potentially null pointers anyways.  This change simpy does the same for all failure modes.
2022-01-10 08:48:49 -08:00
Sanjay Patel
1d21667ce2 [InstCombine] (~A | B) & (A ^ B) -> ~A & B
This is part of a set of 2-variable logic optimizations
suggested here:
https://lists.llvm.org/pipermail/llvm-dev/2021-December/154470.html

The 'not' op must not propagate undef elements of a vector,
so this patch creates a new 'full' not, but I am not counting
that as an extra-use restriction because it should get folded
with the existing value by CSE.

https://alive2.llvm.org/ce/z/7v65im
2022-01-09 06:23:51 -05:00
Sanjay Patel
0b13789d58 [InstCombine] add tests for and(orn, xor); NFC 2022-01-09 06:23:50 -05:00
Philip Reames
2cafbcb560 [instcombine] Key deref vs deref_or_null annotation of allocation sites off nonnull attribute
Goal is to remove use of isOpNewLike.  I looked at a couple approaches to this, and this turned out to be the cheapest one.  Just letting deref_or_null be generated causes a bunch of test diffs, and I couldn't convince myself there wasn't a real regression somewhere.  A generic instcombine to convert deref_or_null + nonnull to deref is annoying complicated since you have to mix facts from callsite and declaration while manipulating only existing call site attributes.  It just wasn't worth the code complexity.

Note that the change in new-delete-itanium.ll is a real regression.  If you have a callsite which overrides the builtin status of a nobuiltin declaration, *and* you don't put the apppriate attributes on that callsite, you may lose the deref fact.  I decided this didn't matter; if anyone disagrees, you can add this case to the generic non-null inference.
2022-01-08 10:33:54 -08:00
Philip Reames
dcbc91f40c [instcombine] Delete duplicate object size logic
nstCombine appears to duplicate the allocation size logic used inside getObjectSize when figuring out which attributes are safe to place on the callsite. We can use the existing utility function instead.

The test change is correct. With aligned_alloc, a zero alignment is required to return nullptr. As such, deref_or_null is a correct attribute to use.

Differential Revision: https://reviews.llvm.org/D116816
2022-01-07 10:32:26 -08:00
Nikita Popov
f430c1eb64 [Tests] Add elementtype attribute to indirect inline asm operands (NFC)
This updates LLVM tests for D116531 by adding elementtype attributes
to operands that correspond to indirect asm constraints.
2022-01-06 14:23:51 +01:00