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18 Commits

Author SHA1 Message Date
Akira Hatanaka
ee09394644 Register the MC object streamer. 
Patch by Reed Kotler at Mips Technologies.

llvm-svn: 140887
 2011-09-30 21:29:38 +00:00
Akira Hatanaka
44220ca045 Register Asm backend. Add functions to MipsAsmBackend. 
Patch by Reed Kotler at Mips Technologies.

llvm-svn: 140886
 2011-09-30 21:23:45 +00:00
Akira Hatanaka
750ecec7d5 Initial implementation of MipsMCCodeEmitter. 
Patch by Reed Kotler at Mips Technologies.

llvm-svn: 140878
 2011-09-30 20:40:03 +00:00
Akira Hatanaka
3d673cc323 Add a base class for Mips TargetMachines and add Mips64 TargetMachines. 
llvm-svn: 140233
 2011-09-21 03:00:58 +00:00
Akira Hatanaka
b491f48aba Support for PSP is gone too. 
llvm-svn: 139622
 2011-09-13 18:55:33 +00:00
Akira Hatanaka
b0e99ef8f0 It is not necessary to search for mipsallegrex in target triple string. 
llvm-svn: 139607
 2011-09-13 17:35:28 +00:00
James Molloy
4c493e8050 Refactor instprinter and mcdisassembler to take a SubtargetInfo. Add -mattr= handling to llvm-mc. Reviewed by Owen Anderson. 
llvm-svn: 139237
 2011-09-07 17:24:38 +00:00
Evan Cheng
2bb4035707 Move TargetRegistry and TargetSelect from Target to Support where they belong. 
These are strictly utilities for registering targets and components.

llvm-svn: 138450
 2011-08-24 18:08:43 +00:00
Evan Cheng
4d6c9d711d Some refactoring so TargetRegistry.h no longer has to include any files 
from MC.

llvm-svn: 138367
 2011-08-23 20:15:21 +00:00
Evan Cheng
61faa55b74 Separate MCInstPrinter registration from AsmPrinter registration. 
llvm-svn: 135974
 2011-07-25 21:20:24 +00:00
Evan Cheng
6376593ed1 createXXXMCCodeGenInfo should be static. 
llvm-svn: 135826
 2011-07-23 00:01:04 +00:00
Evan Cheng
8c886a40d2 Combine all MC initialization routines into one. e.g. InitializeX86MCAsmInfo, 
InitializeX86MCInstrInfo, etc. are combined into InitializeX86TargetMC.

llvm-svn: 135812
 2011-07-22 21:58:54 +00:00
Evan Cheng
efd9b4240f - Move CodeModel from a TargetMachine global option to MCCodeGenInfo. 
- Introduce JITDefault code model. This tells targets to set different default
  code model for JIT. This eliminates the ugly hack in TargetMachine where
  code model is changed after construction.

llvm-svn: 135580
 2011-07-20 07:51:56 +00:00
Evan Cheng
2129f59637 Introduce MCCodeGenInfo, which keeps information that can affect codegen 
(including compilation, assembly). Move relocation model Reloc::Model from
TargetMachine to MCCodeGenInfo so it's accessible even without TargetMachine.

llvm-svn: 135468
 2011-07-19 06:37:02 +00:00
Evan Cheng
67c033e6b8 Move getInitialFrameState from TargetFrameInfo to MCAsmInfo (suggestions for 
better location welcome).

llvm-svn: 135438
 2011-07-18 22:29:13 +00:00
Evan Cheng
d60fa58ba1 Sink getDwarfRegNum, getLLVMRegNum, getSEHRegNum from TargetRegisterInfo down 
to MCRegisterInfo. Also initialize the mapping at construction time.

This patch eliminate TargetRegisterInfo from TargetAsmInfo. It's another step
towards fixing the layering violation.

llvm-svn: 135424
 2011-07-18 20:57:22 +00:00
Evan Cheng
1705ab00ab Rename createAsmInfo to createMCAsmInfo and move registration code to MCTargetDesc to prepare for next round of changes. 
llvm-svn: 135219
 2011-07-14 23:50:31 +00:00
Evan Cheng
bc153d49b7 Next round of MC refactoring. This patch factor MC table instantiations, MC 
registeration and creation code into XXXMCDesc libraries.

llvm-svn: 135184
 2011-07-14 20:59:42 +00:00