2 Commits

Author	SHA1	Message	Date
Stefan Pintilie	57c9dc0521	[PowerPC] Do not add the relocation addend to the instruction encoding ... We should not be adding the relocation addend to the instruction encoding. This patch removes that and sets those bits to zero. Differential Revision: https://reviews.llvm.org/D81082	2020-06-15 09:51:34 -05:00
Stefan Pintilie	a92ee77d85	[PowerPC][Future] Add offsets to PC Relative relocations. ... This is an optimization that applies to global addresses and allows for the following transformation: Convert this: paddi r3, 0, symbol@PCREL, 1 ld r4, 8(r3) To this: pld r4, symbol@PCREL+8(0), 1 An instruction is saved and the linker can do the addition when the symbol is resolved. Differential Revision: https://reviews.llvm.org/D76160	2020-04-21 11:08:19 -05:00