2146 Commits

Author SHA1 Message Date
Kazu Hirata
2e8f89f048
[Object] Avoid repeated map lookups (NFC) (#126853) 2025-02-12 08:46:55 -08:00
Aiden Grossman
56b760cc47
[ELF] Add support for CREL locations for SHT_LLVM_BB_ADDR_MAP
This patch adds support for properly decoding SHT_LLVM_BB_ADDR_MAP
sections in relocatable object files when the relocation format is CREL.

Reviewers: rlavaee, jh7370, red1bluelost, MaskRay

Reviewed By: MaskRay

Pull Request: https://github.com/llvm/llvm-project/pull/126446
2025-02-10 10:58:56 -08:00
Aiden Grossman
808b1c11a2
[ELF] Add support for CREL to getSectionAndRelocations
This patch updates the getSectionAndRelocations function to also support
CREL relocation sections. Unit tests have been added. This patch also
updates consumers to say they explicitly do not support CREL format
relocations. Subsequent patches will make the consumers work with CREL
format relocations and also add in testing support.

Reviewers: red1bluelost, MaskRay, rlavaee

Reviewed By: MaskRay

Pull Request: https://github.com/llvm/llvm-project/pull/126445
2025-02-10 10:57:19 -08:00
joaosaffran
76985fd7ca
[DXIL] Adding support to RootSignatureFlags in obj2yaml (#122396)
This PR adds:
- `RootSignatureFlags` extraction from DXContainer using `obj2yaml`


This PR is part of: #121493

---------

Co-authored-by: joaosaffran <joao.saffran@microsoft.com>
2025-02-07 14:19:19 -08:00
Sam Clegg
48415777ea
Revert "[Object][WebAssembly] Fix data segment offsets higher than 2^31 (#125739)" (#125786)
This reverts commit c798a5c4d5c3c8cb21e6001f505d8f44217c2244.

This broke bunch of test the emscripten side. Reverting while we
investigate.
2025-02-04 16:16:17 -08:00
Sam Clegg
c798a5c4d5
[Object][WebAssembly] Fix data segment offsets higher than 2^31 (#125739)
Fixes: #58555
2025-02-04 14:06:07 -08:00
quic-areg
61ea63baaf
[Hexagon] Add support for decoding PLT symbols (#123425)
Describes PLT entries for hexagon.
2025-01-29 15:37:23 -06:00
Kazu Hirata
3f1be86a1a
[Object] Avoid repeated hash lookups (NFC) (#123448) 2025-01-18 09:44:58 -08:00
Derek Schuff
9fdc38c81c
[WebAssembly][Object] Support more elem segment flags (#123427)
Some tools (e.g. Rust tooling) produce element segment descriptors with
neither
elemkind or element type descriptors, but with init exprs instead of
func indices
(this is with the flags value of 4 in

https://webassembly.github.io/spec/core/binary/modules.html#element-section).
LLVM doesn't fully model reference types or the various ways to
initialize element
segments, but we do want to correctly parse and skip over all type
sections, so
this change updates the object parser to handle that case, and refactors
for more
clarity.

The test file is updated to include one additional elem segment with a
flags value
of 4, an initializer value of (32.const 0) and an empty vector. 

Also support parsing files that export imported (undefined) functions.
2025-01-17 17:26:44 -08:00
Hervé Poussineau
c983ae8f26
[llvm-lib] Handle MIPS architecture (#121254)
- add a test to check values for /machine argument
- add a test to check if machine is correctly inferred from inputs
2025-01-05 15:18:05 +08:00
YunQiang Su
9d3f9f47e6 Revert "[llvm-lib] Handle MIPS architecture (#121007)"
This reverts commit 5d529c32cc2d5342a0d183881b6c3023435ed5d3.
2024-12-27 09:57:42 +08:00
Hervé Poussineau
5d529c32cc
[llvm-lib] Handle MIPS architecture (#121007)
- add a test to check values for /machine argument
- add a test to check if machine is correctly inferred from inputs
2024-12-27 08:43:19 +08:00
Hervé Poussineau
a72bfc5a1e
[llvm-dlltool] Handle MIPS R4000 architecture (#114621) 2024-12-26 13:56:02 +08:00
Ikhlas Ajbar
8b37c1c71b
[Hexagon] Add V75 support to compiler and assembler (#120773)
This patch introduces support for the Hexagon V75 architecture. It
includes instruction formats, definitions, encodings, scheduling
classes, and builtins/intrinsics.
2024-12-20 14:01:58 -06:00
llvmssh
0c98776159
Use MapVector to fix lld thinLTO "nondeterminism" issue. (#117551)
When the ModuleSymbolTable is generated, the binary consistency problem occurs due to the
data structure for collecting asm symbols was ordered by memory pointers.
2024-12-02 14:16:19 -08:00
Lang Hames
d02c1676d7 [Support][Error] Add ErrorAsOutParameter constructor that takes an Error by ref.
ErrorAsOutParameter's Error* constructor supports cases where an Error might not
be passed in (because in the calling context it's known that this call won't
fail). Most clients always have an Error present however, and for them an Error&
overload is more convenient.
2024-11-29 15:57:53 +11:00
Lei Wang
cf83a7fdc2
[SHT_LLVM_BB_ADDR_MAP] Add an option to skip emitting bb entries (#114447)
Sometimes we want to use a `PgoAnalysisMap` feature that doesn't require
the BB entries info, e.g. only the `FuncEntryCount`, but the BB entries
is emitted by default, so I'm adding an option to skip the info for this
case to save the binary size(can save ~90% size of the section). For
implementation, it extends a new field(`OmitBBEntries`) in
`BBAddrMap::Features` for this and it's controlled by a switch
`--basic-block-address-map-skip-bb-entries`.

Note that this naturally supports backwards compatibility as the field
is zero for the old version, matches the decoding in the new version
llvm.
2024-11-22 11:51:34 -08:00
Kazu Hirata
e9c8106a90
[Object] Remove unused includes (NFC) (#116750)
Identified with misc-include-cleaner.
2024-11-19 19:42:09 -08:00
Matt Arsenault
a6fc489bb7
AMDGPU: Add gfx950 subtarget definitions (#116307)
Mostly a stub, but adds some baseline tests and
tests for removed instructions.
2024-11-18 10:41:14 -08:00
Jacek Caban
a9d94834cd
[llvm-lib][llvm-dlltool] Fix handling of invalid ARM64EC function names (#116250)
This is a follow-up to #115567. Emit an error for invalid function
names, similar to MSVC's `lib.exe` behavior.

Returning an error from `writeImportLibrary` exposed bugs in error
handling by its callers, which have been addressed in this patch.
2024-11-15 16:14:37 +01:00
Shilei Tian
de0fd64bed
[AMDGPU] Introduce a new generic target gfx9-4-generic (#115190)
This patch introduces a new generic target, `gfx9-4-generic`. Since it doesn’t support FP8 and XF32-related instructions, the patch includes several code reorganizations to accommodate these changes.
2024-11-12 23:11:05 -05:00
Kazu Hirata
4048c64306
[llvm] Remove redundant control flow statements (NFC) (#115831)
Identified with readability-redundant-control-flow.
2024-11-12 10:09:42 -08:00
Rahman Lavaee
789de766b5
[NFC,SHT_LLVM_BB_ADDR_MAP] Fix undefined behaviour in ELF.cpp. (#115830)
`BBEntries` is defined outside of the loop and is used after move which
is undefined behavior.
2024-11-12 09:49:56 -08:00
Heejin Ahn
be64ca9123
[WebAssembly] Remove WASM_FEATURE_PREFIX_REQUIRED (NFC) (#113729)
This has not been emitted since

3f34e1b883.

The corresponding proposed tool-conventions change:
https://github.com/WebAssembly/tool-conventions/pull/236
2024-11-04 16:12:57 -08:00
Thomas Fransham
8129ba6c70
[Minidump] Declare MinidumpFile::getListStream in the header instead of extern template (#112568)
This is part of the work to enable LLVM_BUILD_LLVM_DYLIB and LLVM
plugins on window.
2024-11-02 18:40:36 +02:00
Hervé Poussineau
19f2f67928
[yaml2obj][obj2yaml][objdump] Handle MIPS COFF files (#112591)
- handle IMAGE_FILE_MACHINE_R4000 machine type
- handle MIPS COFF relocations

llvm-objdump can now parse MIPS COFF files.
2024-11-01 15:28:22 +00:00
Carl Ritson
076aac59ac
[AMDGPU] Add a new target for gfx1153 (#113138) 2024-10-23 12:56:58 +09:00
hpoussin
97ccd868cb
[COFF] Add MIPS relocation types (#107814)
Add the MIPS COFF relocation types. They will be needed to add support
for MIPS Windows object file.

This is an extract of PR
https://github.com/llvm/llvm-project/pull/107744.
2024-10-15 10:50:51 +08:00
Sirraide
9c2843275e
[NFC] Make 'Triple&' param a 'const&' instead (#110628)
There isn’t really a reason for it not to be a `const&` (afaict), and it
is a bit annoying because some APIs (e.g. `TargetMachine::getTargetTriple()`) 
return a `const Triple&`.
2024-10-01 21:16:11 +02:00
Kazu Hirata
60a6e6fa54
[Object] Avoid repeated map lookups (NFC) (#110201) 2024-09-28 10:03:23 -07:00
Jacek Caban
b953914e2f
[Object][COFF] Fix CHPE metadata offset check (#109591) 2024-09-23 10:46:37 +02:00
Thomas Fransham
92da37b08f
[Object][NFC] Add extern template declarations needed by llvm-objdump (#109156)
These symbols are implicitly imported from the LLVM shared library by
llvm-objdump on ELF like platforms, but for windows they need to be
explicitly exported when LLVM is built as shared library.
I also add visibility macros for XCOFFObjectFile::getExceptionEntries
that can't automatically be added by clang tooling since it doesn't
store the source locations for explicit function template
instantiations.
2024-09-20 09:50:45 +03:00
Jay Foad
e03f427196
[LLVM] Use {} instead of std::nullopt to initialize empty ArrayRef (#109133)
It is almost always simpler to use {} instead of std::nullopt to
initialize an empty ArrayRef. This patch changes all occurrences I could
find in LLVM itself. In future the ArrayRef(std::nullopt_t) constructor
could be deprecated or removed.
2024-09-19 16:16:38 +01:00
Jacob Lalonde
deba134092
[Minidump] Support multiple exceptions in a minidump (#107319)
A fork of #97470, splitting off the LLVM changes from the LLDB specific
changes. This patch enables a minidump file to have multiple exceptions,
exposed via an iterator of Expected streams.
2024-09-06 09:04:12 -07:00
Nabeel Omer
fb6c10da1f
[MC] Emit a jump table size section (#101962)
This patch will make LLVM emit a new section .llvm_jump_table_sizes 
containing tuples of (jump table address, entry count) in object files.
This section is useful for tools that need to statically reconstruct the
control flow of executables.

At the moment this is only enabled by default for the PS5 target.
2024-09-06 13:41:36 +01:00
Kazu Hirata
71eebe9daa
[llvm] Prefer StringRef::substr to StringRef::slice (NFC) (#106190)
S.substr(N, M) is simpler than S.slice(N, N + M).  Also, substr is
probably better recognizable than slice thanks to
std::string_view::substr.
2024-08-27 06:46:20 -07:00
Kazu Hirata
33e7cd6ff2
[llvm] Prefer StringRef::substr to StringRef::slice (NFC) (#105943)
S.substr(N) is simpler than S.slice(N, StringRef::npos) and
S.slice(N, S.size()). Also, substr is probably better recognizable
than slice thanks to std::string_view::substr.
2024-08-25 11:30:49 -07:00
Ahmed Bougacha
fd4f9520a6
[AArch64][MachO] Add ptrauth ABI version to arm64e cpusubtype. (#104650)
In a mach_header, the cpusubtype is a 32-bit field, but it's split in 2
subfields:
- the low 24 bits containing the cpu subtype proper, (e.g.,
CPU_SUBTYPE_ARM64E 2)
- the high 8 bits containing a capability field used for additional
feature flags.

Notably, it's only the subtype subfield that participates in fat file
slice discrimination: the caps are ignored.

arm64e uses the caps subfield to encode a ptrauth ABI version:
- 0x80 (CPU_SUBTYPE_PTRAUTH_ABI) denotes a versioned binary
- 0x40 denotes a kernel-ABI binary
- 0x00-0x0F holds the ptrauth ABI version

This teaches the basic obj tools to decode that (or ignore it when
unneeded).

It also teaches the MachO writer to default to emitting versioned
binaries, but with a version of 0 (and without the kernel ABI flag).

Modern arm64e requires versioned binaries: a binary with 0x00 caps in
cpusubtype is now rejected by the linker and everything after. We can
live without the sophistication of specifying the version and kernel ABI
for now.

Co-authored-by: Francis Visoiu Mistrih <francisvm@apple.com>
2024-08-20 11:37:12 -07:00
Ahmed Bougacha
464fa3b3b0 [AArch64][MachO] Encode @AUTH to ARM64_RELOC_AUTHENTICATED_POINTER.
This adds MachO support for emission of authenticated pointer
relocations.

We already support AArch64AuthMCExpr, to represent assembly expressions
such as:
  .quad <symbol>@AUTH(<key>, <discriminator> [, addr])
For example:
  .quad _g3@AUTH(ib, 1234, addr)

These @AUTH expressions lower to a new kind of MachO relocation:
  ARM64_RELOC_AUTHENTICATED_POINTER (11)

The relocation points to the referenced symbol.
The other data, describing the signing scheme and original addend
(only 32 bits instead of 64), is encoded into the addend (in the
relocated location):

  |63|62|61-51|50-49|  48  |47     -     32|31  -  0|
  | 1| 0|  0  | key | addr | discriminator | addend |
2024-08-16 11:59:27 -07:00
Rahul Joshi
ddda37a6c7
[TableGen] Refactor Intrinsic handling in TableGen (#103980)
CodeGenIntrinsic changes:
  - Use `const` Record pointers, and `StringRef` when possible.
  - Default initialize several fields with their definition instead of in
 the constructor.
- Simplify various string checks in the constructor using StringRef
starts_with()/ends_with() functions.
- Eliminate first argument to `setDefaultProperties` and use `TheDef`
class member instead.

IntrinsicEmitter changes:
  - Emit `namespace llvm::Intrinsic` instead of nested namespaces.
  - End generated comments with a .
  - Use range based for loops, and early continue within loops.
  - Emit `static constexpr` instead of `static const` for arrays.
- Change `compareFnAttributes` to use std::tie() to compare intrinsic
attributes and return a default value when all attributes are equal.

STLExtras:
  - Add std::replace wrapper which takes a range.
2024-08-16 09:26:57 -07:00
Fangrui Song
64c856055a
Revert "[Object][x86-64] Add support for R_X86_64_GLOB_DAT relocations. (#103029)" (#103497)
This reverts commit 5ae9faa538d100ab38f6f4f99c924de0e4270272.

RelocationResolver is only supposed to handle static relocation types.
Introducing GLOB_DAT could negatively impact other RelocationResolver
users who solely handle static relocations and want to report errors for
dynamic relocations.

If GLOB_DAT is the sole required relocation, explicitly checking for it
in the caller would be more reliable. Additionally, the caller should
handle GLOB_DAT on other architectures.
2024-08-15 17:01:06 +01:00
Alexis Engelke
f1cb64b6f0
[MC] Remove Darwin SDK/Version from ObjFileInfo (#103025)
There's only a single user (MCMachOStreamer), so it makes more sense to
move the version emission to the source of the data.
2024-08-14 09:24:07 +02:00
Alastair Houghton
5ae9faa538
[Object][x86-64] Add support for R_X86_64_GLOB_DAT relocations. (#103029)
Add support for `R_X86_64_GLOB_DAT` relocations to the relocation
resolver.

rdar://133510292
2024-08-14 07:54:43 +10:00
Jacob Lalonde
b1edac0496
[Obj2Yaml] Add support for minidump generation with 64b memory ranges. (#101272)
This PR adds support for `obj2yaml` and `yaml2obj` to generate minidumps
that have a Memory64List stream. This is a prerequisite to #101086.

Worth noting
- ~~const dropped on minidumps so we could cache a MemoryDescriptor_64
to it's actual offset, preventing the need to loop multiple times~~
- doesn't reuse the existing `ListStream` code in some places, because
the Memory64List has a different width size field (unsigned 64), and a
larger header than all the other streams. I determined refactoring the
existing code to support Mem64 would be worse than supporting the
special case.
2024-08-12 14:35:19 -07:00
Fangrui Song
edf45e4edd
Suppress spurious warnings due to R_RISCV_SET_ULEB128
llvm-objdump -S issues unnecessary warnings for RISC-V relocatable files
containing .debug_loclists or .debug_rnglists sections with ULEB128
relocations. This occurred because `DWARFObjInMemory` verifies support for all
relocation types, triggering warnings for unsupported ones.

```
% llvm-objdump -S a.o
...
0000000000000000 <foo>:
warning: failed to compute relocation: R_RISCV_SUB_ULEB128, Invalid data was encountered while parsing the file
warning: failed to compute relocation: R_RISCV_SET_ULEB128, Invalid data was encountered while parsing the file
...
```

This change fixes #101544 by declaring support for the two ULEB128
relocation types, silencing the spurious warnings.

---

In DWARF v5 builds, DW_LLE_offset_pair/DW_RLE_offset_pair might be
generated in .debug_loclists/.debug_rnglists with ULEB128 relocations.
They are only read by llvm-dwarfdump to dump section content and verbose
DW_AT_location/DW_AT_ranges output for relocatable files.

The DebugInfoDWARF user (e.g. DWARFDebugRnglists.cpp) calls
`Data.getULEB128` without checking the ULEB128 relocations, as the
unrelocated value holds meaning (refer to the assembler
implementation https://reviews.llvm.org/D157657). This differs from
`.quad .Lfoo`, which requires relocation reading (e.g.
https://reviews.llvm.org/D74404).

Pull Request: https://github.com/llvm/llvm-project/pull/101607
2024-08-09 10:59:20 -07:00
Jacek Caban
1d77dd50f1
[llvm-readobj][COFF] Dump hybrid objects for ARM64X files. (#102245) 2024-08-09 15:55:28 +02:00
Simon Pilgrim
79daad3479 Fix MSVC "result of 32-bit shift implicitly converted to 64 bits" warning. NFC. 2024-08-07 11:00:23 +01:00
Simon Pilgrim
c84a936516 Remove unnecessary break to fix static analysis warning. 2024-08-07 11:00:23 +01:00
Simon Pilgrim
8fd5dafc74 Fix MSVC "not all control paths return a value" warning. NFC. 2024-08-07 11:00:22 +01:00
yonghong-song
03958680b2
[BPF] Make llvm-objdump disasm default cpu v4 (#102166)
Currently, with the following example,
  $ cat t.c
  void foo(int a, _Atomic int *b)
  {
   *b &= a;
  }
  $ clang --target=bpf -O2 -c -mcpu=v3 t.c
  $ llvm-objdump -d t.o
  t.o:    file format elf64-bpf

  Disassembly of section .text:

  0000000000000000 <foo>:
       0:       c3 12 00 00 51 00 00 00 <unknown>
       1:       95 00 00 00 00 00 00 00 exit

Basically, the default cpu for llvm-objdump is v1 and it won't be able
to decode insn properly.

If we add --mcpu=v3 to llvm-objdump command line, we will have
  $ llvm-objdump -d --mcpu=v3 t.o

  t.o:    file format elf64-bpf

  Disassembly of section .text:

  0000000000000000 <foo>:
0: c3 12 00 00 51 00 00 00 w1 = atomic_fetch_and((u32 *)(r2 + 0x0), w1)
       1:       95 00 00 00 00 00 00 00 exit

The atomic_fetch_and insn can be decoded properly. Using latest cpu
version --mcpu=v4 can also decode properly like the above --mcpu=v3.

To avoid the above '<unknown>' decoding with common 'llvm-objdump -d
t.o', this patch marked the default cpu for llvm-objdump with the
current highest cpu number v4 in ELFObjectFileBase::tryGetCPUName(). The
cpu number in ELFObjectFileBase::tryGetCPUName() will be adjusted in the
future if cpu number is increased e.g. v5 etc. Such an approach also
aligns with gcc-bpf as discussed in [1].

Six bpf unit tests are affected with this change. I changed test output
for three unit tests and added --mcpu=v1 for the other three unit tests,
to demonstrate the default (cpu v4) behavior and explicit --mcpu=v1
behavior.

[1]
https://lore.kernel.org/bpf/6f32c0a1-9de2-4145-92ea-be025362182f@linux.dev/T/#m0f7e63c390bc8f5a5523e7f2f0537becd4205200

Co-authored-by: Yonghong Song <yonghong.song@linux.dev>
2024-08-06 18:23:46 -07:00