3 Commits

Author	SHA1	Message	Date
Florian Hahn	131343d35b	[PhaseOrdering] Update tests after 23c2f2e6b24d.	2021-06-07 10:59:30 +01:00
Sanjay Patel	6fd91be354	[Reassociate] allow or->add with shl operands ... As discussed in: https://llvm.org/PR49055 We invert instcombine's add->or transform here because it makes it easier to identify factorization transforms like the mul in the motivating test. This extends the logic added with: https://reviews.llvm.org/rG70472f3 https://reviews.llvm.org/rG93f3d7f (I intentionally kept the formatting fix in this patch to provide more context about the calling logic.)	2021-02-07 09:45:19 -05:00
Sanjay Patel	8d9527a0bf	[PhaseOrdering] add test to show combined result of reassociate+instcombine+vectorizers; NFC	2021-02-05 14:25:19 -05:00