29 Commits

Author SHA1 Message Date
Pawan Nirpal
a5ba6067d6
[Clang][NFC] Use Hex Encoding for Intel CPU CPUID family (#153004)
Use Hex Encoding for CPUID family to match number format with Intel ISE
rev.58:
https://cdrdv2.intel.com/v1/dl/getContent/671368
2025-08-14 18:36:34 +02:00
Phoebe Wang
a63931292b
[X86] Fix typo of gracemont (#118486) 2024-12-03 20:56:52 +08:00
Phoebe Wang
3348b4688f
[X86][compiler-rt] Split CPU names even they have the same subtype (#118237)
Fixes: #118205
2024-12-02 18:51:19 +08:00
Freddy Ye
97836bed63
Reland "[X86] Support -march=diamondrapids (#113881)" (#116564)
Ref.: https://cdrdv2.intel.com/v1/dl/getContent/671368
2024-11-18 10:40:32 +08:00
Freddy Ye
90e92239bd
Revert "[X86] Support -march=diamondrapids (#113881)" (#116563)
This reverts commit 826b845c9e97448395431be3e4e5da585bd98c5e.
2024-11-18 08:45:28 +08:00
Freddy Ye
826b845c9e
[X86] Support -march=diamondrapids (#113881)
Ref.: https://cdrdv2.intel.com/v1/dl/getContent/671368
2024-11-18 08:31:17 +08:00
Freddy Ye
c4248fa3ed
[X86] Support MOVRS and AVX10.2 instructions. (#113274)
Ref.: https://cdrdv2.intel.com/v1/dl/getContent/671368
2024-10-25 09:00:19 +08:00
Freddy Ye
9e3d4653af
[X86] Update Model value for Arrow Lake. (#113273)
Ref.: https://cdrdv2.intel.com/v1/dl/getContent/671368
2024-10-23 09:44:26 +08:00
RipleyTom
c5f7a32356
[X86] Add AMD Llano family detection (#111312)
Very simple one liner, adds the missing detection for the Llano family
which is essentially a refreshed K10:
Documentation of the family id:
https://en.wikichip.org/wiki/amd/cpuid#Family_18_.2812h.29
Documentation that it fits into amdfam10:
https://en.wikipedia.org/wiki/AMD_10h#12h
2024-10-07 08:33:26 -07:00
Ganesh
02e4186d0b
[X86] AMD Zen 5 Initial enablement (#107964)
This patch enables the basic skeleton enablement of AMD next gen zen5 CPUs.
2024-09-13 17:45:33 +01:00
Phoebe Wang
259ca9ee9c
Reland "[X86][AVX10.2] Support AVX10.2 option and VMPSADBW/VADDP[D,H,S] new instructions (#101452)" (#101616)
Ref.: https://cdrdv2.intel.com/v1/dl/getContent/828965
2024-08-03 09:26:07 +08:00
Phoebe Wang
2e0588d5e1
Revert "[X86][AVX10.2] Support AVX10.2 option and VMPSADBW/VADDP[D,H,S] new instructions" (#101612)
Reverts llvm/llvm-project#101452

There are several buildbot failed. Revert first.
2024-08-02 13:04:10 +08:00
Phoebe Wang
10bad2c8d7
[X86][AVX10.2] Support AVX10.2 option and VMPSADBW/VADDP[D,H,S] new instructions (#101452)
Ref.: https://cdrdv2.intel.com/v1/dl/getContent/828965
2024-08-02 12:10:50 +08:00
Dmitry Chestnykh
d09fc8f0b7
[compiler-rt][builtins] Fix -Werror build problem (#100312)
GCC-14.1.1 emit an error due to uninitialized variables
x86.c:303:17: error: ‘EAX’ may be used uninitialized
[-Werror=maybe-uninitialized]
x86.c:970:35: error: ‘MaxLevel’ may be used uninitialized
[-Werror=maybe-uninitialized]
x86.c:987:48: error: ‘MaxExtLevel’ may be used uninitialized
[-Werror=maybe-uninitialized]
It doesn't handle properly that these variables initialized indirectly
in functions that takes pointers to them
2024-07-24 10:41:25 +03:00
Aiden Grossman
599f8e1120 Reland "[compiler-rt][X86] Use functions in cpuid.h instead of inline assembly (#97877)"
This reverts commit f1905f064451bf688577976a13000c9c47e58452.

This relands commit 19cf8deabe1124831164987f1b9bf2f806c0a875.

There were issues with the preprocessor includes that should have
excluded MSVC still including clang functions building on windows and
using intrin.h. This relanding fixes this behavior by additionally
wrapping the uses of __get_cpuid and __get_cpuid_count in _MSC_VER so
that clang in MSVC mode, which includes intrin.h, does not have any
conflicts.
2024-07-24 03:58:23 +00:00
James Y Knight
3c6ea7b716
Remove 3DNow! from X86TargetParser. (#99352)
This addresses the spurious inclusion of (now unsupported) target
features '-3dnow' and '-3dnowa' when disabling mmx (when then caused log
output from `clang -mno-mmx`).

It should've been part of PR #96246, but was missed.

Also tweaks the warning in prfchwintrin.h to not recommend the
deprecated mm3dnow.h header.
2024-07-20 11:28:06 -04:00
Aiden Grossman
f1905f0644 Revert "[compiler-rt][X86] Use functions in cpuid.h instead of inline assembly (#97877)"
This reverts commit f6616e99c71c15d530060346ec29c3246d7fc235.

Was causing buildbot failures on Windows. I also remember seeing a
AMDGPU buildbot failing somewhere on a warning as they have -Werror
enabled.
2024-07-09 01:14:02 +00:00
Aiden Grossman
f6616e99c7 Reland "Revert "[compiler-rt][X86] Use functions in cpuid.h instead of inline assembly (#97877)""
This reverts commit 2039e130649d8469bc85fa31ba7422d1d3739f90.

This relands commit 19cf8deabe1124831164987f1b9bf2f806c0a875.

Added some additional preprocessor directives to ensure that Host.cpp
only includes cpuid.h when being built on x86.
2024-07-08 21:47:40 +00:00
Aiden Grossman
87e914db85
[compiler-rt][X86] Unify getAMDProcessorTypeAndSubType (#97863)
This patch unifies the implementation of getAMDProcessorTypeAndSubtype
between compiler-rt and LLVM.

This patch is intended to be a step towards pulling these functions out
into identical .inc files to better facilitate code sharing between LLVM
and compiler-rt.
2024-07-08 11:03:29 -07:00
Aiden Grossman
2039e13064 Revert "[compiler-rt][X86] Use functions in cpuid.h instead of inline assembly (#97877)"
This reverts commit 19cf8deabe1124831164987f1b9bf2f806c0a875.

This was causing quite a few buildbot failures (see the PR description).
Reverting for now while I have time to sort it out. Seems like it should
just be conditional preprocessor macros for X86 however.
2024-07-08 18:00:51 +00:00
Aiden Grossman
19cf8deabe
[compiler-rt][X86] Use functions in cpuid.h instead of inline assembly (#97877)
This patch makes the host/feature detection in compiler-rt and LLVM use
the functions provided in cpuid.h(__get_cpuid, __get_cpuid_count)
instead of inline assembly. This simplifies the implementation and moves
any inline assembly away to a more common place.

A while ago, some similar cleanup was attempted, but this ended up
resulting in some compilation errors due to toolchain minimum version
issues (https://bugs.llvm.org/show_bug.cgi?id=30384). After the
reversion landed, there have been no attempts since then to clean up the
code, even though the minimum supported compilers now support the
relevant functions (https://godbolt.org/z/o1Mjz8ndv).
2024-07-08 10:54:35 -07:00
Freddy Ye
1fe6be8794
[X86] Support APXF to enable __builtin_cpu_supports. (#80636)
For referring, APX's spec:
https://cdrdv2.intel.com/v1/dl/getContent/784266
APX's index in libgcc:
https://github.com/gcc-mirror/gcc/blob/master/gcc/common/config/i386/i386-cpuinfo.h#L267
2024-02-23 15:18:42 +08:00
Freddy Ye
72105605d1
[X86] Support more ISAs to enable __builtin_cpu_supports (#79086)
This patch will also expand supports for attribute/target, while
the priority of newly supported ISAs will be set to zero.
2024-02-04 21:21:12 +08:00
Freddy Ye
f3a4de395c
[X86] Support "f16c" and "avx512fp16" for __builtin_cpu_supports (#78384)
This resolves issue #65320.
This also supports clarify sapphirerapids and cooperlake for
cpu_specific/dispatch.
2024-01-18 09:22:04 +08:00
Aiden Grossman
3ddf368524 [X86] Fix warning in cpu detection due to unsigned comparison
a15532d7647a8a4b7fd2889bd97f6f72f273c4bf landed a patch that added
support for detecting more AMD znver2 CPUs and cleaned up some of the
surrounding code, including the znver3 detection. Since one model group
is 00h-0fh, I adjusted the check to include checking if the value is
greater than zero. Since the value is unsigned, this is always true and
gcc warns on it. This patch removes the comparison with zero to get rid
of the compiler warning.
2023-12-29 17:58:53 -08:00
Aiden Grossman
a15532d764
[X86] Add CPU detection for more znver2 CPUs (#74955)
This patch adds proper detection support for more znver2 CPUs.

Specifically, this adds in support for CPUs codenamed Renoir, Lucienne,
and Mendocino.

This was originally proposedfor Renoir in
https://reviews.llvm.org/D96220 and
got approved, but slipped through the cracks. However, there is still a
demand for this feature.

In addition to adding support for more znver2 CPUs, this patch also includes
some additional refactoring and comments related to cpu model
information for zen CPUs.

Fixes https://github.com/llvm/llvm-project/issues/74934.
2023-12-21 23:39:28 -08:00
Jon Roelofs
9237cfa65b
[builtins] Refactor cpu_model support to reduce #if nesting. NFCI
Reviewers: petrhosek, DavidSpickett

Pull Request: https://github.com/llvm/llvm-project/pull/75635
2023-12-19 11:19:51 -07:00
Jon Roelofs
b72e160914
Revert "[builtins] Refactor cpu_model support to reduce #if nesting. NFCI"
This reverts commit 025d048b1cac1183c85acc9d58941b9909f6ec11.

It broke one of the sanitizer bots:

https://lab.llvm.org/buildbot/#/builders/240/builds/20666
2023-12-19 11:17:24 -07:00
Jon Roelofs
025d048b1c
[builtins] Refactor cpu_model support to reduce #if nesting. NFCI
Reviewers: petrhosek, DavidSpickett

Pull Request: https://github.com/llvm/llvm-project/pull/75635
2023-12-19 11:09:50 -07:00