not just an Instruction*, at least in one unfortunate case:
the first operand to the va_arg instruction.
Modify ValueToDefVecMap to map from Value*, not Instruction*.
llvm-svn: 7052
SETTING the operand to be an immediate or have verified that one of the operands
is really a SignExtended or Unextended immediate value already, which warrants
an 'i' opcode.
llvm-svn: 6662
the loop, and in both cases. In the first case, it is a VReg that is a constant
so it may be actually converted to a constant. In the second case, it is already
a constant, but then if it doesn't change its type (e.g. to become a register
and have the value loaded from memory if it is too large to live in its
instruction field), we must change the opcode BEFORE the 'continue', otherwise
we miss the opportunity.
llvm-svn: 6602
TmpInstruction constructors because every TmpInstruction object has
to be registered with a MachineCodeForInstruction to prevent leaks.
This simplifies the user's code.
llvm-svn: 6469
preallocated. While reg-to-reg dependences were already handled, this
change required new code for adding edges to/from call instructions.
This was part of the extensive changes to the way code generation occurs
for function call arguments and return values.
See log for CodeGen/PhyRegAlloc.cpp.
llvm-svn: 6467
call arguments and return values:
Now all copy operations before and after a call are generated during
selection instead of during register allocation.
The values are copied to virtual registers (or to the stack), but
in the former case these operands are marked with the correct physical
registers according to the calling convention.
Although this complicates scheduling and does not work well with
live range analysis, it simplifies the machine-dependent part of
register allocation.
llvm-svn: 6465
Fixed spilling of %fcc[0-3] which are part of %fsr.
(2) Moved some machine-independent reg-class code to class TargetRegInfo
from SparcReg{Class,}Info.
(3) Renamed MachienOperand::opIsDef to MachineOperand::opIsDefOnly()
and related functions and flags. Fixed several bugs where only
"isDef" was being checked, not "isDefAndUse".
llvm-svn: 6341
* *** Finally mark values that are inputs to PHIs as killed when appropriate.
This should make the generated code quite a bit better. For example, the
local-ra will not have to spill PHI inputs at the end of predecessor BB's
anymore.
llvm-svn: 6117
* Change getVarInfo to take real virtual register numbers and offset them
itself. This has caused me so much grief, it's not even funny.
llvm-svn: 6115
