Fix two bugs in CIR's handling of `[[no_unique_address]]` fields:
- Record layout: Use the base subobject type (without tail padding)
instead of the complete object type for [[no_unique_address]] fields,
allowing subsequent fields to overlap with tail padding.
- Field access: Insert bitcasts from the base subobject pointer to the
complete object pointer after cir.get_member for potentially-overlapping
fields, so downstream code sees the expected type.
- Zero-sized fields: Handle truly empty [[no_unique_address]] fields by
computing their address via byte offsets rather than cir.get_member,
since they have no entry in the record layout.
A known gap (CIR copies 8 bytes where OG copies 5 via
`ConstructorMemcpyizer`) is noted for follow-up.
Handle empty unions in CIR record lowering and LLVM conversion by
emitting padding when needed, guarding `getLargestMember` for
empty/padded unions, and lowering to empty or padded LLVM structs based
on language rules.
Added regression tests for C and C++ empty union lowering in
`clang/test/CIR/CodeGen/empty-union.c` and `empty-union.cpp`.
This change cleans up some cir::MissingFeature asserts in
CIRGenRecordLayoutBuilder.cpp. In a couple of cases the asserts were
stale markers that we failed to remove when the correspond support was
implemented.
In one case, a cir::MissingFeature::bitfields() assert was ambiguous in
meaning and has been replaced by a comment and something more specific.
The missing feature in this case is just a bit of debug code to verify
certain bitfield-related conditions. This check should be added, but it
is not functionally required.
This patch adds basic support for constant record initializer list
expressions. There's a couple of limitations:
* No zero initialized padding bytes in C mode
* No bitfields
* No designated initializer lists
* Record alignments are not calculated, yet
* ILEs of derived records don't work, yet
* The constant attribute is not propagated to the backend, resulting in
non-constants being emitted in the LLVM IR
This adds support for declaring a class with a virtual base class and
initializing the vptr in the constructor. This does not yet handle
constructors that require a virtual table table (VTT) implicit argument.
This PR adds support for loading and storing volatile bit-field members
according to the AAPCS specification.
> A volatile bit-field must always be accessed using an access width
appropriate to the type of its container, except when any of the
following are true:
>
> * The bit-field container overlaps with a zero-length bit-field.
> * The bit-field container overlaps with a non-bit-field member.
For example, if a bit-field is declared as `int`, the load/store must
use a 32-bit access, even if the field itself is only 3 bits wide.
This PR fixes the outdated logic for accumulating bitfields in
`accumulateFields`. The old approach remained after the algorithm was
updated. A non-bitfield member would act as a barrier, causing
`accumulateBitFields` to receive an incomplete range of fields. As a
result, it failed to accumulate them properly when clipping was
necessary.
For reference, in ClangIR we already handle this correctly:
[b647f4b97b/clang/lib/CIR/CodeGen/CIRRecordLayoutBuilder.cpp (L711-L714))
This PR adds the implementation of the `ComputeVolatileBitfields`
function for the AAPCS ABI, following the rules described in [AAPCS64
§8.1.8.5 Volatile
Bit-fields](f52e1ad3f8/aapcs64/aapcs64.rst (8185volatile-bit-fields----preserving-number-and-width-of-container-accesses)).
When accessing a volatile bit-field either reading or writing the
compiler must perform a load or store using the access size that matches
the width of the declared type (i.e., the type of the container), rather
than the packed bit-field size.
For example, if a field is declared as `int`, it must read or write 32
bits, even if the bit-field is only 3 bits wide.
The `ComputeVolatileBitfields` function calculates the correct values
and offsets necessary for proper lowering of volatile bitfields.
Support for emitting calls to `get_bitfield` and `set_bitfield` with the
correct access size for volatile bitfields will be implemented in a
future PR.
This PR adds support for `-ffine-grained-bitfield-accesses`. I reused
the tests from classic CodeGen, available here:
[c2c881fcc8/clang/test/CodeGenCXX/finegrain-bitfield-access.cpp)
We produce almost exactly the same codegen, except when returning a
variable: we emit an extra variable to hold the return value, whereas
classic CodeGen does not. Also, the GEP instructions use slightly
different syntax compared to classic CodeGen.
This change removes a bit of code that was left as an artifact of a
previous "not yet implemented" state. The implementation is in place,
but the code to report an NYI diagnostic was left behind.
This PR upstreams functionality for computing volatile bitfields when
the target follows the AAPCS ABI. The implementation matches the one in
the incubator, so no tests are included as the feature is not yet fully
implemented (NYI).
This change adds support for bitfields CIR records can now contain bit
fields.
I’ve updated the `CIRGenBitFieldInfo` comment, which originally came
from the incubator and was identical to the one in OGCodeGen, to better
reflect the current implementation.
Support for bitfields in unions big-endian architectures and `get` and
`set` operations remains unimplemented and will be addressed in a future
patch.
This adds the minimal support for declaring a pointer to a derived
class. This includes only the changes necessary to compute the record
layout for the derived class and declare a variable that points to it.
Support for accessing members of either the derived or base class is
deferred until a later change, as is support for declaring a variable
that is an instance of the derived class.
This change adds additional checks to a few places where a simple struct
in C++ code was triggering `errorNYI` in places where no additional
handling was needed, and adds a very small amount of trivial
initialization. The code now checks for the conditions that do require
extra handling before issuing the diagnostic.
New tests are added for declaring and using a simple struct in C++ code.
This change adds support for packing and padding record types in ClangIR
and introduces some infrastructure needed for this computation.
Although union support has not been upstreamed yet, there is no good way
to report unions as NYI in the layout computation, so the code added
here includes layout computation for unions. Unions will be added soon.
This adds basic support for populating record types. In order to keep
the change small, everything non-essential was deferred to a later
change set. Only non-recursive structures are handled. Structures
padding is not yet implemented. Bitfields are not supported. No attempt
is made to handle ABI requirements for passing structure arguments.
