409092 Commits

Author SHA1 Message Date
Kazu Hirata
8414321bec [Hexagon] Use range-based for loops (NFC) 2021-12-28 23:47:25 -08:00
Johannes Doerfert
7e14e881c4 [OpenMP][OpenACC] Update test after encoding change in D113126 2021-12-29 01:29:07 -06:00
Johannes Doerfert
944aa0421c Reapply "[OpenMP][NFCI] Embed the source location string size in the ident_t"
This reverts commit 73ece231ee0cf048d56841f47915beb1db6afc26 and
reapplies 7bfcdbcbf368cea14a5236080af975d5878a46eb with mlir changes.
Also reverts commit 423ba12971bac8397c87fcf975ba6a4b7530ed28 and
includes the unit test changes of
16da2140045808b2aea1d28366ca7d326eb3c809.
2021-12-29 01:10:38 -06:00
Mehdi Amini
423ba12971 Revert "[OpenMP][FIX] Also update unit test after API change"
This reverts commit 16da2140045808b2aea1d28366ca7d326eb3c809.

Revert unit-test API update after previous revert of the API change.
2021-12-29 07:08:58 +00:00
Mehdi Amini
73ece231ee Revert "[OpenMP][NFCI] Embed the source location string size in the ident_t"
This reverts commit 7bfcdbcbf368cea14a5236080af975d5878a46eb.
Broke MLIR build
2021-12-29 06:57:36 +00:00
Kazu Hirata
773ea16eba [AST] Fix a warning
This patch fixes:

  mlir/include/mlir/Tools/PDLL/AST/Types.h:54:3: error: definition of
  implicit copy assignment operator for 'Type' is deprecated because
  it has a user-declared copy constructor [-Werror,-Wdeprecated-copy]
2021-12-28 22:52:56 -08:00
Johannes Doerfert
5602c866c0 [Attributor] Look through allocated heap memory
AAPointerInfo, and thereby other places, can look already through
internal global and stack memory. This patch enables them to look
through heap memory returned by functions with a `noalias` return.

In the future we can look through `noalias` arguments as well but that
will require AAIsDead to learn that such memory can be inspected by the
caller later on. We also need teach AAPointerInfo about dominance to
actually deal with memory that might not be `null` or `undef`
initialized. D106397 is a first step in that direction already.

Reviewed By: kuter

Differential Revision: https://reviews.llvm.org/D109170
2021-12-29 00:21:36 -06:00
Johannes Doerfert
3e0c512ce6 [OpenMP] Simplify all stores in the device code
Similar to loads, we want to be aggressive when it comes to store
simplification. Not everything in LLVM handles dead stores well when
address space casts are involved, we can simply ask the Attributor to do
it for us though.

Reviewed By: tianshilei1992

Differential Revision: https://reviews.llvm.org/D109998
2021-12-29 00:19:38 -06:00
Johannes Doerfert
16da214004 [OpenMP][FIX] Also update unit test after API change 2021-12-29 00:17:36 -06:00
Johannes Doerfert
7f1eaeafe7 [OpenMP][NFC] Extract assumption helpers into own header file 2021-12-28 23:53:29 -06:00
Johannes Doerfert
7bfcdbcbf3 [OpenMP][NFCI] Embed the source location string size in the ident_t
One of the unused ident_t fields now holds the size of the string
(=const char *) field so we have an easier time dealing with those
in the future.

Differential Revision: https://reviews.llvm.org/D113126
2021-12-28 23:53:29 -06:00
Johannes Doerfert
6e2fcf8513 [Attributor][FIX] Ensure store uses are correlated with reloads
While we skipped uses in stores if we can find all copies of the value
when the memory is loaded, we did not correlate the use in the store
with the use in the load. So far this lead to less precise results in the
offset calculations which prevented deductions. With the new
EquivalentUseCB callback argument the user of checkForAllUses can be
informed of the correlation and act on it appropriately.

Differential Revision: https://reviews.llvm.org/D109662
2021-12-28 23:53:29 -06:00
Johannes Doerfert
9f04a0ea43 [OpenMP][FIX] Make AAExecutionDomain deterministic 2021-12-28 23:53:29 -06:00
Johannes Doerfert
ba70f3a5d9 [OpenMP][FIX] Make heap2shared deterministic
Issue #52875 reported non-determinism, this is the first step to avoid
it. We iterate over MallocCalls so we should keep the order stable.
2021-12-28 23:53:28 -06:00
Johannes Doerfert
7de5da2a67 [OpenMP][NFC] Move address space enum into OMPConstants header 2021-12-28 23:53:28 -06:00
Johannes Doerfert
73104ad65b [OpenMP][NFC] Move headers into include folder 2021-12-28 23:53:28 -06:00
William S. Moses
99fc000c87 [MLIR] Expose atomicrmw and/or
LLVM (dialect and IR) have atomics for and/or. This patch enables atomic_rmw ops in the standard dialect for and/or that lower to these (in addition to the existing atomics such as addi, etc).

Reviewed By: mehdi_amini

Differential Revision: https://reviews.llvm.org/D116345
2021-12-29 00:23:28 -05:00
William S. Moses
ca8997eb7f [MLIR] Add constant folder for fptosi and friends
This patch adds constant folds for FPToSI/FPToUI/SIToFP/UIToFP

Reviewed By: mehdi_amini, bondhugula

Differential Revision: https://reviews.llvm.org/D116321
2021-12-28 23:50:01 -05:00
Joe Loser
7f410251e8
[libcxx][test] Remove redundant semiregular checks for CPOs
Some individual test files verify the CPO under test satisfies
`semiregular` concept.  This is redundant since it is already part of the test
in verifying whether the entity is indeed a CPO in
`libcxx/test/std/library/description/conventions/customization.point.object/cpo.compile.pass.cpp`.

Differential Revision: https://reviews.llvm.org/D116173
2021-12-28 22:09:12 -05:00
Craig Topper
f7b096d754 [RISCV] Add more div by constant test cases.
Some constants require more instructions than others. This adds
additional test for each variation. UDIV has 2 variations, SDIV has
4 variations.

Some of these sequence may have gotten worse on RV32 when we started
doing the div by constant optimization before type legalization. We
materialized a smaller constant, but we require more instructions
to emulate 8 or 16 bit right shifts. This was hidden by the lack
of test coverage.

I've also added Zba and Zbb test cases to show the affect of sext.b,
sext.h, zext.h, and zext.w on some of the shifts. In some cases
we end up generating more code after the multiply because we use
a zext.h+srli and sext.h+srai where without Zbb we share a slli
between a srli and srai.
2021-12-28 18:55:36 -08:00
Fangrui Song
dd2fbbbb2d [llvm-profdata][docs] Use ` instead of 2021-12-28 18:03:28 -08:00
Kyungwoo Lee
4ecf15b789 [llvm-profdata] Make -debug-info visible
Add the option comment in .rst.

Reviewed By: ellis

Differential Revision: https://reviews.llvm.org/D116348
2021-12-28 17:35:08 -08:00
Fangrui Song
de92a13fec [ELF] --gc-sections: Work around SHT_PROGBITS .init_array.N for Rust
See https://github.com/rust-lang/rust/issues/92181
2021-12-28 16:40:51 -08:00
Mike Hommey
319181f767 [lld-macho] Fix alignment of TLV data sections
References from thread-local variable sections are treated as offsets
relative to the start of the thread-local data memory area, which is
initialized via copying all the TLV data sections (which are all
contiguous). If later data sections require a greater alignment than
earlier ones, the offsets of data within those sections won't be
guaranteed to aligned unless we normalize alignments. We therefore use
the largest alignment for all TLV data sections.

Reviewed By: #lld-macho, int3

Differential Revision: https://reviews.llvm.org/D116263
2021-12-28 19:03:13 -05:00
modimo
ba51d26ec4 [CodeView] Clamp Frontend version
D43002 introduced a test debug-info-objname.cpp that outputted the current compiler version into CodeView. Internally we appended a date to the patch version and overflowed the 16-bits allocated to that space. This change clamps the Frontend version outputted values to 16-bits like rGd1185fc081ead71a8bf239ff1814f5ff73084c15 did for the Backend version.

Testing:
ninja check-all
newly added tests correctly clamps and no longer asserts when trying to output the field

Reviewed By: aganea

Differential Revision: https://reviews.llvm.org/D116243
2021-12-28 15:22:18 -08:00
Krzysztof Parzyszek
6a6ac3b36f [Hexagon] Support BUILD_VECTOR of floating point HVX vectors
Co-authored-by: Anirudh Sundar Subramaniam <quic_sanirudh@quicinc.com>
Co-authored-by: Ankit Aggarwal <aankit@quicinc.com>
2021-12-28 14:59:08 -08:00
Shilei Tian
943d1d83dd [OpenMP][CUDA] Add resource pool for CUevent
Following D111954, this patch adds the resource pool for CUevent.

Reviewed By: ye-luo

Differential Revision: https://reviews.llvm.org/D116315
2021-12-28 17:42:38 -05:00
Ellis Hoag
18ffb5dc25 [InstrProf] Prevent duplicate functions in correlated data
When using debug info for profile correlation, avoid adding duplicate
functions in the synthetic Data section.

Before this patch, n duplicate function entries in the Data section would
cause counter values to be a factor of n larger. I built instrumented
clang with and without debug info correlation and got these summaries.

```
# With Debug Info Correlate
$ llvm-profdata show default.profdata
Instrumentation level: IR  entry_first = 0
Total functions: 182530
Maximum function count: 52034
Maximum internal block count: 5763

# Without
$ llvm-profdata show default.profdata
Instrumentation level: IR  entry_first = 0
Total functions: 183212
Maximum function count: 52034
Maximum internal block count: 5766
```

The slight difference in counts seem to be mostly from FileSystem and
Map functions and the difference in the number of instrumented functions
seems to come from missing debug info like destructors without source.

Reviewed By: kyulee

Differential Revision: https://reviews.llvm.org/D116051
2021-12-28 14:20:59 -08:00
Craig Topper
1c6b740d4b [TargetLowering] Remove workaround for old behavior of getShiftAmountTy. NFC
getShiftAmountTy used to directly return the shift amount type from
the target which could be too small for large illegal types. For
example, X86 always returns i8.

The code here detected this and used i32 instead if it won't fit. This
behavior was added to getShiftAmountTy in D112469 so we no longer need
this workaround.
2021-12-28 14:08:25 -08:00
Nick Desaulniers
cd284b7ac0 [clang][ARM] re-use arm::isHardTPSupported for hardware TLS check
This conditional check for -mstack-protector-guard=tls got out of sync
with the conditional check for -mtp=cp15 by me in D114116, because I
forgot about the similar check added in D113026.

Re-use the code in arm::isHardTPSupported so that these aren't out of
sync.

Interestingly, our CI reported this when testing
-mstack-protector-guard=tls; it was only reproducible with Debian's LLVM
and not upstream LLVM due to this out of tree patch:
https://salsa.debian.org/pkg-llvm-team/llvm-toolchain/-/blob/snapshot/debian/patches/930008-arm.diff

Fixes: https://github.com/ClangBuiltLinux/linux/issues/1502

Reviewed By: ardb

Differential Revision: https://reviews.llvm.org/D116233
2021-12-28 13:28:34 -08:00
Shilei Tian
357c8031ff [OpenMP][Plugin] Minor adjustments to ResourcePool
This patch makes some minor adjustments to `ResourcePool`:
- Don't initialize the resources if `Size` is 0 which can avoid assertion.
- Add a new interface function `clear` to release all hold resources.
- If initial size is 0, resize to 1 when the first request is encountered.

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D116340
2021-12-28 16:11:03 -05:00
Renato Golin
c5e8eb9783 Documentation for the process of adding new targets
Plenty of new targets nowadays and I found myself repeating the same
thing over and over, so this is more or less what we said over the last
few years, but condensed in an ordered fashion and easy to digest.

This does not change any of the recommendations, only documents what we
have been saying for years.
2021-12-28 21:00:26 +00:00
Krzysztof Parzyszek
7df136bcf2 [Hexagon] Delete unused declaration of LowerHvxMul, NFC 2021-12-28 11:36:07 -08:00
Brian Cain
b05ed0d2cb [Hexagon] Add testcase for arch flags 2021-12-28 11:31:58 -08:00
Rob Suderman
f0cb77d7d5 [mlir][tosa] Resubmit split tosa-to-linalg named ops out of pass
Includes dependency fix that resulted in canonicalizer pass not linking in.

Linalg named ops lowering are moved to a separate pass. This allows TOSA
canonicalizers to run between named-ops lowerings and the general TOSA
lowerings. This allows the TOSA canonicalizers to run between lowerings.

Differential Revision: https://reviews.llvm.org/D116057
2021-12-28 11:22:58 -08:00
Krzysztof Parzyszek
20135c8a53 [Hexagon] Move testcase accidentally committed to wrong directory
llvm/test/DebugInfo/Hexagon/zreg-post-inc.s -> llvm/test/MC/Hexagon/zreg-post-inc.s
2021-12-28 11:21:54 -08:00
Michael Benfield
89aa87c4e6 [clang] Fix AttrDocs.td formatting.
This should fix the builder clang-sphinx-docs.
2021-12-28 19:13:03 +00:00
David Green
43e500d791 [AArch64] Minor AArch64MIPeepholeOpt cleanup. NFC
We should always be in SSA form when running the pass, so turn a check
into an assert.
2021-12-28 19:10:01 +00:00
Roman Lebedev
d5a4d6a497
[BitcodeReader] propagateAttributeTypes(): fix opaque pointer handling
Can't get the pointee type of an opaque pointer,
but in that case said attributes must already be typed,
so just don't try to rewrite them if they already are.
2021-12-28 22:06:51 +03:00
Greg Clayton
48207b2559 Fix "settings set -g" so it works again.
When we switched options over to use the Options.td file, a bug was introduced that caused the "-g" option for "settings set" to require a filename arguemnt. This patch fixes this issue and adds a test so this doesn't regress.

Reviewed By: JDevlieghere

Differential Revision: https://reviews.llvm.org/D116012
2021-12-28 11:03:09 -08:00
Greg Clayton
a2154b1951 Cache the manual DWARF index out to the LLDB cache directory when the LLDB index cache is enabled.
This patch add the ability to cache the manual DWARF indexing results to disk for faster subsequent debug sessions. Manual DWARF indexing is time consuming and causes all DWARF to be fully parsed and indexed each time you debug a binary that doesn't have an acceptable accelerator table. Acceptable accelerator tables include .debug_names in DWARF5 or Apple accelerator tables.

This patch breaks up testing by testing all of the encoding and decoding of required C++ objects in a gtest unit test, and then has a test to verify the debug info cache is generated correctly.

This patch also adds the ability to track when a symbol table or DWARF index is loaded or saved to the cache in the "statistics dump" command. This is essential to know in statistics as it can help explain why a debug session was slower or faster than expected.

Reviewed By: labath, wallace

Differential Revision: https://reviews.llvm.org/D115951
2021-12-28 11:00:28 -08:00
Fangrui Song
b5d3bbcc94 [CMake] Remove unneeded CLANG_DEFAULT_PIE_ON_LINUX canonicalization after D115751 2021-12-28 10:49:52 -08:00
Kazu Hirata
e6e7bdd6a9 Drop unnecessary const from return types (NFC)
Identified with readability-const-return-type.
2021-12-28 10:01:39 -08:00
Brian Cain
1e7bd93ff2 [Hexagon] Add HexagonMCInstrInfo::IsABranchingInst, NFC 2021-12-28 09:51:27 -08:00
Brian Cain
c5327137df [Hexagon] Fix for producer operands search w/z-reg
Z-register does not show up in defs, so checks searching
for the def operand must look for a different def index
than they would normally.
2021-12-28 09:19:59 -08:00
Tony Tye
0ac939f3e2 [AMDGPU][NFC] Update to DWARF extension for heterogeneous debugging
- Update documentation on the DWARF extension for heterogeneous
  debugging to better reference the DWARF Version 5 standard.
- Numerous other corrections.

Reviewed By: kzhuravl

Differential Revision: https://reviews.llvm.org/D116275
2021-12-28 17:13:45 +00:00
Tony Tye
4360207a21 [AMDGPU][NFC] Update DWARF extension allowing locations on stack
Add changes to the DWARF Version 5 standard to the DWARF extension to
allow locations on the evaluation stack documentation.

Reviewed By: kzhuravl

Differential Revision: https://reviews.llvm.org/D116265
2021-12-28 17:12:20 +00:00
Kazu Hirata
5a667c0e74 [llvm] Use nullptr instead of 0 (NFC)
Identified with modernize-use-nullptr.
2021-12-28 08:52:25 -08:00
Florian Hahn
9d297c7894
[VPlan] Add prepareToExecute to set up live-ins (NFC).
This patch adds a new prepareToExecute helper to set up live-ins, so
VPTransformState doesn't need to hold values like TripCount.

This also requires making the trip count operand for ActiveLaneMask
explicit in VPlan.

Reviewed By: Ayal

Differential Revision: https://reviews.llvm.org/D116320
2021-12-28 17:49:47 +01:00
Krzysztof Parzyszek
648246cce6 [Hexagon] Remove isPredicateRegister in favor of isPredReg, NFC
HexagonMCChecker has its own function isPredicateRegister, which does
the same thing as HexagonMCInstrInfo::isPredReg.
2021-12-28 08:40:40 -08:00