5 Commits

Author SHA1 Message Date
Md Abdullah Shahneous Bari
ffd29734cc
[mlir][gpu] Extend mgpumoduleLoadJIT API to add assemblySize parameter (#189429)
When JITing SPIR-V using LevelZero API, it expects the length of the
string since passed input data is a `void *`. Problem is, getting the
length of the string is not possible using something like
`strlen(reinterpret_cast<char *>(data))` in `mgpuModuleLoadJIT`
implementation. Becasuse the SPIR-V binary contains null bytes (i.e.,
the data is binary SPIR-V, not null-terminated text).

As a result we need to pass the `assmeblySize` via the
`mgpuModuleLoadJIT(void* data, int optLevel, size_t assmeblySize)`.
2026-04-03 12:45:40 -05:00
Md Abdullah Shahneous Bari
88bc265295
[XeVM] Use ocloc for binary generation. (#188331)
XeVM currently doesn't support native binary generation. This PR enables
Ahead of Time (AOT) compilation of gpu module to native binary using
`ocloc`.

Currently, only works with LevelZeroRuntimeWrappers.
2026-03-27 13:29:33 -05:00
Sang Ik Lee
78f259fcc1
[MLIR] mlir_levelzero_runtime: remove dependency on LLVM (#182942)
L0 runtime can be built standalone without any dependency on LLVM/MLIR
components.
Remove remaining small dependency from L0 runtime
2026-03-02 14:04:57 -08:00
Mehdi Amini
ff130f293d [MLIR] Apply clang-tidy fixes for misc-use-internal-linkage in LevelZeroRuntimeWrappers.cpp (NFC) 2025-09-30 01:26:40 -07:00
Md Abdullah Shahneous Bari
281e6d2cc4
[mlir][ExecutionEngine] Add LevelZeroRuntimeWrapper. (#151038)
Adds LevelZeroRuntime wrapper and tests.

Co-authored-by: Artem Kroviakov <artem.kroviakov@intel.com>
Co-authored-by: Nishant Patel <nishant.b.patel@intel.com>

---------

Co-authored-by: Artem Kroviakov <artem.kroviakov@intel.com>
Co-authored-by: Nishant Patel <nishant.b.patel@intel.com>
2025-08-06 16:48:59 -05:00