update

llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp

@@ -2434,6 +2434,7 @@ static SDValue lowerBUILD_VECTORAsBroadCastLoad(BuildVectorSDNode *BVOp,
 SDValue LoongArchTargetLowering::lowerBUILD_VECTOR(SDValue Op,
                                                    SelectionDAG &DAG) const {
   BuildVectorSDNode *Node = cast<BuildVectorSDNode>(Op);
+  MVT VT = Node->getSimpleValueType(0);
   EVT ResTy = Op->getValueType(0);
   unsigned NumElts = ResTy.getVectorNumElements();
   SDLoc DL(Op);
@@ -2517,6 +2518,66 @@ SDValue LoongArchTargetLowering::lowerBUILD_VECTOR(SDValue Op,
   }
 
   if (!IsConstant) {
+    // If the BUILD_VECTOR has a repeated pattern, use INSERT_VECTOR_ELT to fill
+    // the sub-sequence of the vector and then broadcast the sub-sequence.
+    //
+    // TODO: If the BUILD_VECTOR contains undef elements, consider falling
+    // back to use INSERT_VECTOR_ELT to materialize the vector, because it
+    // generates worse code in some cases. This could be further optimized
+    // with more consideration.
+    SmallVector<SDValue> Sequence;
+    BitVector UndefElements;
+    if (Node->getRepeatedSequence(Sequence, &UndefElements) &&
+        UndefElements.count() == 0) {
+      SDValue Vector = DAG.getUNDEF(ResTy);
+      SDValue FillVec = Vector;
+      EVT FillTy = ResTy;
+
+      // Using LSX instructions to fill the sub-sequence of 256-bits vector,
+      // because the high part can be simply treated as undef.
+      if (Is256Vec) {
+        FillTy = ResTy.getHalfNumVectorElementsVT(*DAG.getContext());
+        FillVec = DAG.getExtractSubvector(DL, FillTy, Vector, 0);
+      }
+
+      SDValue Op0 = Sequence[0];
+      unsigned SeqLen = Sequence.size();
+      if (!Op0.isUndef())
+        FillVec = DAG.getNode(ISD::SCALAR_TO_VECTOR, DL, FillTy, Op0);
+      for (unsigned i = 1; i < SeqLen; ++i) {
+        SDValue Opi = Sequence[i];
+        if (Opi.isUndef())
+          continue;
+        FillVec = DAG.getNode(ISD::INSERT_VECTOR_ELT, DL, FillTy, FillVec, Opi,
+                              DAG.getConstant(i, DL, Subtarget.getGRLenVT()));
+      }
+
+      unsigned SplatLen = NumElts / SeqLen;
+      MVT SplatEltTy = MVT::getIntegerVT(VT.getScalarSizeInBits() * SeqLen);
+      MVT SplatTy = MVT::getVectorVT(SplatEltTy, SplatLen);
+
+      // If size of the sub-sequence is half of a 256-bits vector, bitcast the
+      // vector to v4i64 type in order to match the pattern of XVREPLVE0Q.
+      if (SplatEltTy == MVT::i128)
+        SplatTy = MVT::v4i64;
+
+      SDValue SplatVec;
+      SDValue SrcVec = DAG.getBitcast(
+          SplatTy,
+          Is256Vec ? DAG.getInsertSubvector(DL, Vector, FillVec, 0) : FillVec);
+      if (Is256Vec) {
+        SplatVec =
+            DAG.getNode((SplatEltTy == MVT::i128) ? LoongArchISD::XVREPLVE0Q
+                                                  : LoongArchISD::XVREPLVE0,
+                        DL, SplatTy, SrcVec);
+      } else {
+        SplatVec = DAG.getNode(LoongArchISD::VREPLVEI, DL, SplatTy, SrcVec,
+                               DAG.getConstant(0, DL, Subtarget.getGRLenVT()));
+      }
+
+      return DAG.getBitcast(ResTy, SplatVec);
+    }
+
     // Use INSERT_VECTOR_ELT operations rather than expand to stores.
     // The resulting code is the same length as the expansion, but it doesn't
     // use memory operations.
@@ -6637,6 +6698,8 @@ const char *LoongArchTargetLowering::getTargetNodeName(unsigned Opcode) const {
     NODE_NAME_CASE(VREPLVEI)
     NODE_NAME_CASE(VREPLGR2VR)
     NODE_NAME_CASE(XVPERMI)
+    NODE_NAME_CASE(XVREPLVE0)
+    NODE_NAME_CASE(XVREPLVE0Q)
     NODE_NAME_CASE(VPICK_SEXT_ELT)
     NODE_NAME_CASE(VPICK_ZEXT_ELT)
     NODE_NAME_CASE(VREPLVE)

llvm/lib/Target/LoongArch/LoongArchISelLowering.h

@@ -141,6 +141,8 @@ enum NodeType : unsigned {
   VREPLVEI,
   VREPLGR2VR,
   XVPERMI,
+  XVREPLVE0,
+  XVREPLVE0Q,
 
   // Extended vector element extraction
   VPICK_SEXT_ELT,

llvm/lib/Target/LoongArch/LoongArchLASXInstrInfo.td

@@ -10,8 +10,13 @@
 //
 //===----------------------------------------------------------------------===//
 
+def SDT_LoongArchXVREPLVE0 : SDTypeProfile<1, 1, [SDTCisVec<0>,
+                                                  SDTCisSameAs<0, 1>]>;
+
 // Target nodes.
 def loongarch_xvpermi: SDNode<"LoongArchISD::XVPERMI", SDT_LoongArchV1RUimm>;
+def loongarch_xvreplve0: SDNode<"LoongArchISD::XVREPLVE0", SDT_LoongArchXVREPLVE0>;
+def loongarch_xvreplve0q: SDNode<"LoongArchISD::XVREPLVE0Q", SDT_LoongArchXVREPLVE0>;
 def loongarch_xvmskltz: SDNode<"LoongArchISD::XVMSKLTZ", SDT_LoongArchVMSKCOND>;
 def loongarch_xvmskgez: SDNode<"LoongArchISD::XVMSKGEZ", SDT_LoongArchVMSKCOND>;
 def loongarch_xvmskeqz: SDNode<"LoongArchISD::XVMSKEQZ", SDT_LoongArchVMSKCOND>;
@@ -1852,11 +1857,26 @@ def : Pat<(loongarch_xvpermi v4i64:$xj, immZExt8: $ui8),
 def : Pat<(loongarch_xvpermi v4f64:$xj, immZExt8: $ui8),
           (XVPERMI_D v4f64:$xj, immZExt8: $ui8)>;
 
-// XVREPLVE0_{W/D}
+// XVREPLVE0_{B/H/W/D/Q}
+def : Pat<(loongarch_xvreplve0 v32i8:$xj),
+          (XVREPLVE0_B v32i8:$xj)>;
+def : Pat<(loongarch_xvreplve0 v16i16:$xj),
+          (XVREPLVE0_H v16i16:$xj)>;
+def : Pat<(loongarch_xvreplve0 v8i32:$xj),
+          (XVREPLVE0_W v8i32:$xj)>;
+def : Pat<(loongarch_xvreplve0 v4i64:$xj),
+          (XVREPLVE0_D v4i64:$xj)>;
+def : Pat<(loongarch_xvreplve0 v8f32:$xj),
+          (XVREPLVE0_W v8f32:$xj)>;
+def : Pat<(loongarch_xvreplve0 v4f64:$xj),
+          (XVREPLVE0_D v4f64:$xj)>;
 def : Pat<(lasxsplatf32 FPR32:$fj),
           (XVREPLVE0_W (SUBREG_TO_REG (i64 0), FPR32:$fj, sub_32))>;
 def : Pat<(lasxsplatf64 FPR64:$fj),
           (XVREPLVE0_D (SUBREG_TO_REG (i64 0), FPR64:$fj, sub_64))>;
+foreach vt = [v32i8, v16i16, v8i32, v4i64, v8f32, v4f64] in
+  def : Pat<(vt (loongarch_xvreplve0q LASX256:$xj)),
+            (XVREPLVE0_Q LASX256:$xj)>;
 
 // VSTELM
 defm : VstelmPat<truncstorei8, v32i8, XVSTELM_B, simm8, uimm5>;

llvm/test/CodeGen/LoongArch/lasx/build-vector.ll

@@ -589,6 +589,218 @@ entry:
   ret void
 }
 
+define void @buildvector_v32i8_subseq_2(ptr %dst, i8 %a0, i8 %a1, i8 %a2, i8 %a3, i8 %a4, i8 %a5, i8 %a6, i8 %a7, i8 %a8, i8 %a9, i8 %a10, i8 %a11, i8 %a12, i8 %a13, i8 %a14, i8 %a15) nounwind {
+; CHECK-LABEL: buildvector_v32i8_subseq_2:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    ld.b $t0, $sp, 64
+; CHECK-NEXT:    ld.b $t1, $sp, 56
+; CHECK-NEXT:    ld.b $t2, $sp, 48
+; CHECK-NEXT:    ld.b $t3, $sp, 40
+; CHECK-NEXT:    ld.b $t4, $sp, 32
+; CHECK-NEXT:    ld.b $t5, $sp, 24
+; CHECK-NEXT:    ld.b $t6, $sp, 16
+; CHECK-NEXT:    ld.b $t7, $sp, 8
+; CHECK-NEXT:    ld.b $t8, $sp, 0
+; CHECK-NEXT:    vinsgr2vr.b $vr0, $a1, 0
+; CHECK-NEXT:    vinsgr2vr.b $vr0, $a2, 1
+; CHECK-NEXT:    vinsgr2vr.b $vr0, $a3, 2
+; CHECK-NEXT:    vinsgr2vr.b $vr0, $a4, 3
+; CHECK-NEXT:    vinsgr2vr.b $vr0, $a5, 4
+; CHECK-NEXT:    vinsgr2vr.b $vr0, $a6, 5
+; CHECK-NEXT:    vinsgr2vr.b $vr0, $a7, 6
+; CHECK-NEXT:    vinsgr2vr.b $vr0, $t8, 7
+; CHECK-NEXT:    vinsgr2vr.b $vr0, $t7, 8
+; CHECK-NEXT:    vinsgr2vr.b $vr0, $t6, 9
+; CHECK-NEXT:    vinsgr2vr.b $vr0, $t5, 10
+; CHECK-NEXT:    vinsgr2vr.b $vr0, $t4, 11
+; CHECK-NEXT:    vinsgr2vr.b $vr0, $t3, 12
+; CHECK-NEXT:    vinsgr2vr.b $vr0, $t2, 13
+; CHECK-NEXT:    vinsgr2vr.b $vr0, $t1, 14
+; CHECK-NEXT:    vinsgr2vr.b $vr0, $t0, 15
+; CHECK-NEXT:    xvreplve0.q $xr0, $xr0
+; CHECK-NEXT:    xvst $xr0, $a0, 0
+; CHECK-NEXT:    ret
+entry:
+  %ins0  = insertelement <32 x i8> undef,  i8 %a0,  i32 0
+  %ins1  = insertelement <32 x i8> %ins0,  i8 %a1,  i32 1
+  %ins2  = insertelement <32 x i8> %ins1,  i8 %a2,  i32 2
+  %ins3  = insertelement <32 x i8> %ins2,  i8 %a3,  i32 3
+  %ins4  = insertelement <32 x i8> %ins3,  i8 %a4,  i32 4
+  %ins5  = insertelement <32 x i8> %ins4,  i8 %a5,  i32 5
+  %ins6  = insertelement <32 x i8> %ins5,  i8 %a6,  i32 6
+  %ins7  = insertelement <32 x i8> %ins6,  i8 %a7,  i32 7
+  %ins8  = insertelement <32 x i8> %ins7,  i8 %a8,  i32 8
+  %ins9  = insertelement <32 x i8> %ins8,  i8 %a9,  i32 9
+  %ins10 = insertelement <32 x i8> %ins9,  i8 %a10, i32 10
+  %ins11 = insertelement <32 x i8> %ins10, i8 %a11, i32 11
+  %ins12 = insertelement <32 x i8> %ins11, i8 %a12, i32 12
+  %ins13 = insertelement <32 x i8> %ins12, i8 %a13, i32 13
+  %ins14 = insertelement <32 x i8> %ins13, i8 %a14, i32 14
+  %ins15 = insertelement <32 x i8> %ins14, i8 %a15, i32 15
+  %ins16 = insertelement <32 x i8> %ins15, i8 %a0,  i32 16
+  %ins17 = insertelement <32 x i8> %ins16, i8 %a1,  i32 17
+  %ins18 = insertelement <32 x i8> %ins17, i8 %a2,  i32 18
+  %ins19 = insertelement <32 x i8> %ins18, i8 %a3,  i32 19
+  %ins20 = insertelement <32 x i8> %ins19, i8 %a4,  i32 20
+  %ins21 = insertelement <32 x i8> %ins20, i8 %a5,  i32 21
+  %ins22 = insertelement <32 x i8> %ins21, i8 %a6,  i32 22
+  %ins23 = insertelement <32 x i8> %ins22, i8 %a7,  i32 23
+  %ins24 = insertelement <32 x i8> %ins23, i8 %a8,  i32 24
+  %ins25 = insertelement <32 x i8> %ins24, i8 %a9,  i32 25
+  %ins26 = insertelement <32 x i8> %ins25, i8 %a10, i32 26
+  %ins27 = insertelement <32 x i8> %ins26, i8 %a11, i32 27
+  %ins28 = insertelement <32 x i8> %ins27, i8 %a12, i32 28
+  %ins29 = insertelement <32 x i8> %ins28, i8 %a13, i32 29
+  %ins30 = insertelement <32 x i8> %ins29, i8 %a14, i32 30
+  %ins31 = insertelement <32 x i8> %ins30, i8 %a15, i32 31
+  store <32 x i8> %ins31, ptr %dst
+  ret void
+}
+
+define void @buildvector_v32i8_subseq_4(ptr %dst, i8 %a0, i8 %a1, i8 %a2, i8 %a3, i8 %a4, i8 %a5, i8 %a6, i8 %a7) nounwind {
+; CHECK-LABEL: buildvector_v32i8_subseq_4:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    ld.b $t0, $sp, 0
+; CHECK-NEXT:    vinsgr2vr.b $vr0, $a1, 0
+; CHECK-NEXT:    vinsgr2vr.b $vr0, $a2, 1
+; CHECK-NEXT:    vinsgr2vr.b $vr0, $a3, 2
+; CHECK-NEXT:    vinsgr2vr.b $vr0, $a4, 3
+; CHECK-NEXT:    vinsgr2vr.b $vr0, $a5, 4
+; CHECK-NEXT:    vinsgr2vr.b $vr0, $a6, 5
+; CHECK-NEXT:    vinsgr2vr.b $vr0, $a7, 6
+; CHECK-NEXT:    vinsgr2vr.b $vr0, $t0, 7
+; CHECK-NEXT:    xvreplve0.d $xr0, $xr0
+; CHECK-NEXT:    xvst $xr0, $a0, 0
+; CHECK-NEXT:    ret
+entry:
+  %ins0  = insertelement <32 x i8> undef,  i8 %a0, i32 0
+  %ins1  = insertelement <32 x i8> %ins0,  i8 %a1, i32 1
+  %ins2  = insertelement <32 x i8> %ins1,  i8 %a2, i32 2
+  %ins3  = insertelement <32 x i8> %ins2,  i8 %a3, i32 3
+  %ins4  = insertelement <32 x i8> %ins3,  i8 %a4, i32 4
+  %ins5  = insertelement <32 x i8> %ins4,  i8 %a5, i32 5
+  %ins6  = insertelement <32 x i8> %ins5,  i8 %a6, i32 6
+  %ins7  = insertelement <32 x i8> %ins6,  i8 %a7, i32 7
+  %ins8  = insertelement <32 x i8> %ins7,  i8 %a0, i32 8
+  %ins9  = insertelement <32 x i8> %ins8,  i8 %a1, i32 9
+  %ins10 = insertelement <32 x i8> %ins9,  i8 %a2, i32 10
+  %ins11 = insertelement <32 x i8> %ins10, i8 %a3, i32 11
+  %ins12 = insertelement <32 x i8> %ins11, i8 %a4, i32 12
+  %ins13 = insertelement <32 x i8> %ins12, i8 %a5, i32 13
+  %ins14 = insertelement <32 x i8> %ins13, i8 %a6, i32 14
+  %ins15 = insertelement <32 x i8> %ins14, i8 %a7, i32 15
+  %ins16 = insertelement <32 x i8> %ins15, i8 %a0, i32 16
+  %ins17 = insertelement <32 x i8> %ins16, i8 %a1, i32 17
+  %ins18 = insertelement <32 x i8> %ins17, i8 %a2, i32 18
+  %ins19 = insertelement <32 x i8> %ins18, i8 %a3, i32 19
+  %ins20 = insertelement <32 x i8> %ins19, i8 %a4, i32 20
+  %ins21 = insertelement <32 x i8> %ins20, i8 %a5, i32 21
+  %ins22 = insertelement <32 x i8> %ins21, i8 %a6, i32 22
+  %ins23 = insertelement <32 x i8> %ins22, i8 %a7, i32 23
+  %ins24 = insertelement <32 x i8> %ins23, i8 %a0, i32 24
+  %ins25 = insertelement <32 x i8> %ins24, i8 %a1, i32 25
+  %ins26 = insertelement <32 x i8> %ins25, i8 %a2, i32 26
+  %ins27 = insertelement <32 x i8> %ins26, i8 %a3, i32 27
+  %ins28 = insertelement <32 x i8> %ins27, i8 %a4, i32 28
+  %ins29 = insertelement <32 x i8> %ins28, i8 %a5, i32 29
+  %ins30 = insertelement <32 x i8> %ins29, i8 %a6, i32 30
+  %ins31 = insertelement <32 x i8> %ins30, i8 %a7, i32 31
+  store <32 x i8> %ins31, ptr %dst
+  ret void
+}
+
+define void @buildvector_v32i8_subseq_8(ptr %dst, i8 %a0, i8 %a1, i8 %a2, i8 %a3) nounwind {
+; CHECK-LABEL: buildvector_v32i8_subseq_8:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    vinsgr2vr.b $vr0, $a1, 0
+; CHECK-NEXT:    vinsgr2vr.b $vr0, $a2, 1
+; CHECK-NEXT:    vinsgr2vr.b $vr0, $a3, 2
+; CHECK-NEXT:    vinsgr2vr.b $vr0, $a4, 3
+; CHECK-NEXT:    xvreplve0.w $xr0, $xr0
+; CHECK-NEXT:    xvst $xr0, $a0, 0
+; CHECK-NEXT:    ret
+entry:
+  %ins0  = insertelement <32 x i8> undef,  i8 %a0, i32 0
+  %ins1  = insertelement <32 x i8> %ins0,  i8 %a1, i32 1
+  %ins2  = insertelement <32 x i8> %ins1,  i8 %a2, i32 2
+  %ins3  = insertelement <32 x i8> %ins2,  i8 %a3, i32 3
+  %ins4  = insertelement <32 x i8> %ins3,  i8 %a0, i32 4
+  %ins5  = insertelement <32 x i8> %ins4,  i8 %a1, i32 5
+  %ins6  = insertelement <32 x i8> %ins5,  i8 %a2, i32 6
+  %ins7  = insertelement <32 x i8> %ins6,  i8 %a3, i32 7
+  %ins8  = insertelement <32 x i8> %ins7,  i8 %a0, i32 8
+  %ins9  = insertelement <32 x i8> %ins8,  i8 %a1, i32 9
+  %ins10 = insertelement <32 x i8> %ins9,  i8 %a2, i32 10
+  %ins11 = insertelement <32 x i8> %ins10, i8 %a3, i32 11
+  %ins12 = insertelement <32 x i8> %ins11, i8 %a0, i32 12
+  %ins13 = insertelement <32 x i8> %ins12, i8 %a1, i32 13
+  %ins14 = insertelement <32 x i8> %ins13, i8 %a2, i32 14
+  %ins15 = insertelement <32 x i8> %ins14, i8 %a3, i32 15
+  %ins16 = insertelement <32 x i8> %ins15, i8 %a0, i32 16
+  %ins17 = insertelement <32 x i8> %ins16, i8 %a1, i32 17
+  %ins18 = insertelement <32 x i8> %ins17, i8 %a2, i32 18
+  %ins19 = insertelement <32 x i8> %ins18, i8 %a3, i32 19
+  %ins20 = insertelement <32 x i8> %ins19, i8 %a0, i32 20
+  %ins21 = insertelement <32 x i8> %ins20, i8 %a1, i32 21
+  %ins22 = insertelement <32 x i8> %ins21, i8 %a2, i32 22
+  %ins23 = insertelement <32 x i8> %ins22, i8 %a3, i32 23
+  %ins24 = insertelement <32 x i8> %ins23, i8 %a0, i32 24
+  %ins25 = insertelement <32 x i8> %ins24, i8 %a1, i32 25
+  %ins26 = insertelement <32 x i8> %ins25, i8 %a2, i32 26
+  %ins27 = insertelement <32 x i8> %ins26, i8 %a3, i32 27
+  %ins28 = insertelement <32 x i8> %ins27, i8 %a0, i32 28
+  %ins29 = insertelement <32 x i8> %ins28, i8 %a1, i32 29
+  %ins30 = insertelement <32 x i8> %ins29, i8 %a2, i32 30
+  %ins31 = insertelement <32 x i8> %ins30, i8 %a3, i32 31
+  store <32 x i8> %ins31, ptr %dst
+  ret void
+}
+
+define void @buildvector_v32i8_subseq_16(ptr %dst, i8 %a0, i8 %a1) nounwind {
+; CHECK-LABEL: buildvector_v32i8_subseq_16:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    vinsgr2vr.b $vr0, $a1, 0
+; CHECK-NEXT:    vinsgr2vr.b $vr0, $a2, 1
+; CHECK-NEXT:    xvreplve0.h $xr0, $xr0
+; CHECK-NEXT:    xvst $xr0, $a0, 0
+; CHECK-NEXT:    ret
+entry:
+  %ins0  = insertelement <32 x i8> undef,  i8 %a0, i32 0
+  %ins1  = insertelement <32 x i8> %ins0,  i8 %a1, i32 1
+  %ins2  = insertelement <32 x i8> %ins1,  i8 %a0, i32 2
+  %ins3  = insertelement <32 x i8> %ins2,  i8 %a1, i32 3
+  %ins4  = insertelement <32 x i8> %ins3,  i8 %a0, i32 4
+  %ins5  = insertelement <32 x i8> %ins4,  i8 %a1, i32 5
+  %ins6  = insertelement <32 x i8> %ins5,  i8 %a0, i32 6
+  %ins7  = insertelement <32 x i8> %ins6,  i8 %a1, i32 7
+  %ins8  = insertelement <32 x i8> %ins7,  i8 %a0, i32 8
+  %ins9  = insertelement <32 x i8> %ins8,  i8 %a1, i32 9
+  %ins10 = insertelement <32 x i8> %ins9,  i8 %a0, i32 10
+  %ins11 = insertelement <32 x i8> %ins10, i8 %a1, i32 11
+  %ins12 = insertelement <32 x i8> %ins11, i8 %a0, i32 12
+  %ins13 = insertelement <32 x i8> %ins12, i8 %a1, i32 13
+  %ins14 = insertelement <32 x i8> %ins13, i8 %a0, i32 14
+  %ins15 = insertelement <32 x i8> %ins14, i8 %a1, i32 15
+  %ins16 = insertelement <32 x i8> %ins15, i8 %a0, i32 16
+  %ins17 = insertelement <32 x i8> %ins16, i8 %a1, i32 17
+  %ins18 = insertelement <32 x i8> %ins17, i8 %a0, i32 18
+  %ins19 = insertelement <32 x i8> %ins18, i8 %a1, i32 19
+  %ins20 = insertelement <32 x i8> %ins19, i8 %a0, i32 20
+  %ins21 = insertelement <32 x i8> %ins20, i8 %a1, i32 21
+  %ins22 = insertelement <32 x i8> %ins21, i8 %a0, i32 22
+  %ins23 = insertelement <32 x i8> %ins22, i8 %a1, i32 23
+  %ins24 = insertelement <32 x i8> %ins23, i8 %a0, i32 24
+  %ins25 = insertelement <32 x i8> %ins24, i8 %a1, i32 25
+  %ins26 = insertelement <32 x i8> %ins25, i8 %a0, i32 26
+  %ins27 = insertelement <32 x i8> %ins26, i8 %a1, i32 27
+  %ins28 = insertelement <32 x i8> %ins27, i8 %a0, i32 28
+  %ins29 = insertelement <32 x i8> %ins28, i8 %a1, i32 29
+  %ins30 = insertelement <32 x i8> %ins29, i8 %a0, i32 30
+  %ins31 = insertelement <32 x i8> %ins30, i8 %a1, i32 31
+  store <32 x i8> %ins31, ptr %dst
+  ret void
+}
+
 define void @buildvector_v16i16(ptr %dst, i16 %a0, i16 %a1, i16 %a2, i16 %a3, i16 %a4, i16 %a5, i16 %a6, i16 %a7, i16 %a8, i16 %a9, i16 %a10, i16 %a11, i16 %a12, i16 %a13, i16 %a14, i16 %a15) nounwind {
 ; CHECK-LABEL: buildvector_v16i16:
 ; CHECK:       # %bb.0: # %entry
@@ -763,6 +975,102 @@ entry:
   ret void
 }
 
+define void @buildvector_v16i16_subseq_2(ptr %dst, i16 %a0, i16 %a1, i16 %a2, i16 %a3, i16 %a4, i16 %a5, i16 %a6, i16 %a7) nounwind {
+; CHECK-LABEL: buildvector_v16i16_subseq_2:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    ld.h $t0, $sp, 0
+; CHECK-NEXT:    vinsgr2vr.h $vr0, $a1, 0
+; CHECK-NEXT:    vinsgr2vr.h $vr0, $a2, 1
+; CHECK-NEXT:    vinsgr2vr.h $vr0, $a3, 2
+; CHECK-NEXT:    vinsgr2vr.h $vr0, $a4, 3
+; CHECK-NEXT:    vinsgr2vr.h $vr0, $a5, 4
+; CHECK-NEXT:    vinsgr2vr.h $vr0, $a6, 5
+; CHECK-NEXT:    vinsgr2vr.h $vr0, $a7, 6
+; CHECK-NEXT:    vinsgr2vr.h $vr0, $t0, 7
+; CHECK-NEXT:    xvreplve0.q $xr0, $xr0
+; CHECK-NEXT:    xvst $xr0, $a0, 0
+; CHECK-NEXT:    ret
+entry:
+  %ins0  = insertelement <16 x i16> undef,  i16 %a0, i32 0
+  %ins1  = insertelement <16 x i16> %ins0,  i16 %a1, i32 1
+  %ins2  = insertelement <16 x i16> %ins1,  i16 %a2, i32 2
+  %ins3  = insertelement <16 x i16> %ins2,  i16 %a3, i32 3
+  %ins4  = insertelement <16 x i16> %ins3,  i16 %a4, i32 4
+  %ins5  = insertelement <16 x i16> %ins4,  i16 %a5, i32 5
+  %ins6  = insertelement <16 x i16> %ins5,  i16 %a6, i32 6
+  %ins7  = insertelement <16 x i16> %ins6,  i16 %a7, i32 7
+  %ins8  = insertelement <16 x i16> %ins7,  i16 %a0, i32 8
+  %ins9  = insertelement <16 x i16> %ins8,  i16 %a1, i32 9
+  %ins10 = insertelement <16 x i16> %ins9,  i16 %a2, i32 10
+  %ins11 = insertelement <16 x i16> %ins10, i16 %a3, i32 11
+  %ins12 = insertelement <16 x i16> %ins11, i16 %a4, i32 12
+  %ins13 = insertelement <16 x i16> %ins12, i16 %a5, i32 13
+  %ins14 = insertelement <16 x i16> %ins13, i16 %a6, i32 14
+  %ins15 = insertelement <16 x i16> %ins14, i16 %a7, i32 15
+  store <16 x i16> %ins15, ptr %dst
+  ret void
+}
+
+define void @buildvector_v16i16_subseq_4(ptr %dst, i16 %a0, i16 %a1, i16 %a2, i16 %a3) nounwind {
+; CHECK-LABEL: buildvector_v16i16_subseq_4:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    vinsgr2vr.h $vr0, $a1, 0
+; CHECK-NEXT:    vinsgr2vr.h $vr0, $a2, 1
+; CHECK-NEXT:    vinsgr2vr.h $vr0, $a3, 2
+; CHECK-NEXT:    vinsgr2vr.h $vr0, $a4, 3
+; CHECK-NEXT:    xvreplve0.d $xr0, $xr0
+; CHECK-NEXT:    xvst $xr0, $a0, 0
+; CHECK-NEXT:    ret
+entry:
+  %ins0  = insertelement <16 x i16> undef,  i16 %a0, i32 0
+  %ins1  = insertelement <16 x i16> %ins0,  i16 %a1, i32 1
+  %ins2  = insertelement <16 x i16> %ins1,  i16 %a2, i32 2
+  %ins3  = insertelement <16 x i16> %ins2,  i16 %a3, i32 3
+  %ins4  = insertelement <16 x i16> %ins3,  i16 %a0, i32 4
+  %ins5  = insertelement <16 x i16> %ins4,  i16 %a1, i32 5
+  %ins6  = insertelement <16 x i16> %ins5,  i16 %a2, i32 6
+  %ins7  = insertelement <16 x i16> %ins6,  i16 %a3, i32 7
+  %ins8  = insertelement <16 x i16> %ins7,  i16 %a0, i32 8
+  %ins9  = insertelement <16 x i16> %ins8,  i16 %a1, i32 9
+  %ins10 = insertelement <16 x i16> %ins9,  i16 %a2, i32 10
+  %ins11 = insertelement <16 x i16> %ins10, i16 %a3, i32 11
+  %ins12 = insertelement <16 x i16> %ins11, i16 %a0, i32 12
+  %ins13 = insertelement <16 x i16> %ins12, i16 %a1, i32 13
+  %ins14 = insertelement <16 x i16> %ins13, i16 %a2, i32 14
+  %ins15 = insertelement <16 x i16> %ins14, i16 %a3, i32 15
+  store <16 x i16> %ins15, ptr %dst
+  ret void
+}
+
+define void @buildvector_v16i16_subseq_8(ptr %dst, i16 %a0, i16 %a1) nounwind {
+; CHECK-LABEL: buildvector_v16i16_subseq_8:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    vinsgr2vr.h $vr0, $a1, 0
+; CHECK-NEXT:    vinsgr2vr.h $vr0, $a2, 1
+; CHECK-NEXT:    xvreplve0.w $xr0, $xr0
+; CHECK-NEXT:    xvst $xr0, $a0, 0
+; CHECK-NEXT:    ret
+entry:
+  %ins0  = insertelement <16 x i16> undef,  i16 %a0, i32 0
+  %ins1  = insertelement <16 x i16> %ins0,  i16 %a1, i32 1
+  %ins2  = insertelement <16 x i16> %ins1,  i16 %a0, i32 2
+  %ins3  = insertelement <16 x i16> %ins2,  i16 %a1, i32 3
+  %ins4  = insertelement <16 x i16> %ins3,  i16 %a0, i32 4
+  %ins5  = insertelement <16 x i16> %ins4,  i16 %a1, i32 5
+  %ins6  = insertelement <16 x i16> %ins5,  i16 %a0, i32 6
+  %ins7  = insertelement <16 x i16> %ins6,  i16 %a1, i32 7
+  %ins8  = insertelement <16 x i16> %ins7,  i16 %a0, i32 8
+  %ins9  = insertelement <16 x i16> %ins8,  i16 %a1, i32 9
+  %ins10 = insertelement <16 x i16> %ins9,  i16 %a0, i32 10
+  %ins11 = insertelement <16 x i16> %ins10, i16 %a1, i32 11
+  %ins12 = insertelement <16 x i16> %ins11, i16 %a0, i32 12
+  %ins13 = insertelement <16 x i16> %ins12, i16 %a1, i32 13
+  %ins14 = insertelement <16 x i16> %ins13, i16 %a0, i32 14
+  %ins15 = insertelement <16 x i16> %ins14, i16 %a1, i32 15
+  store <16 x i16> %ins15, ptr %dst
+  ret void
+}
+
 define void @buildvector_v8i32(ptr %dst, i32 %a0, i32 %a1, i32 %a2, i32 %a3, i32 %a4, i32 %a5, i32 %a6, i32 %a7) nounwind {
 ; CHECK-LABEL: buildvector_v8i32:
 ; CHECK:       # %bb.0: # %entry
@@ -835,6 +1143,50 @@ entry:
   ret void
 }
 
+define void @buildvector_v8i32_subseq_2(ptr %dst, i32 %a0, i32 %a1, i32 %a2, i32 %a3) nounwind {
+; CHECK-LABEL: buildvector_v8i32_subseq_2:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    vinsgr2vr.w $vr0, $a1, 0
+; CHECK-NEXT:    vinsgr2vr.w $vr0, $a2, 1
+; CHECK-NEXT:    vinsgr2vr.w $vr0, $a3, 2
+; CHECK-NEXT:    vinsgr2vr.w $vr0, $a4, 3
+; CHECK-NEXT:    xvreplve0.q $xr0, $xr0
+; CHECK-NEXT:    xvst $xr0, $a0, 0
+; CHECK-NEXT:    ret
+entry:
+  %ins0 = insertelement <8 x i32> undef, i32 %a0, i32 0
+  %ins1 = insertelement <8 x i32> %ins0, i32 %a1, i32 1
+  %ins2 = insertelement <8 x i32> %ins1, i32 %a2, i32 2
+  %ins3 = insertelement <8 x i32> %ins2, i32 %a3, i32 3
+  %ins4 = insertelement <8 x i32> %ins3, i32 %a0, i32 4
+  %ins5 = insertelement <8 x i32> %ins4, i32 %a1, i32 5
+  %ins6 = insertelement <8 x i32> %ins5, i32 %a2, i32 6
+  %ins7 = insertelement <8 x i32> %ins6, i32 %a3, i32 7
+  store <8 x i32> %ins7, ptr %dst
+  ret void
+}
+
+define void @buildvector_v8i32_subseq_4(ptr %dst, i32 %a0, i32 %a1) nounwind {
+; CHECK-LABEL: buildvector_v8i32_subseq_4:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    vinsgr2vr.w $vr0, $a1, 0
+; CHECK-NEXT:    vinsgr2vr.w $vr0, $a2, 1
+; CHECK-NEXT:    xvreplve0.d $xr0, $xr0
+; CHECK-NEXT:    xvst $xr0, $a0, 0
+; CHECK-NEXT:    ret
+entry:
+  %ins0 = insertelement <8 x i32> undef, i32 %a0, i32 0
+  %ins1 = insertelement <8 x i32> %ins0, i32 %a1, i32 1
+  %ins2 = insertelement <8 x i32> %ins1, i32 %a0, i32 2
+  %ins3 = insertelement <8 x i32> %ins2, i32 %a1, i32 3
+  %ins4 = insertelement <8 x i32> %ins3, i32 %a0, i32 4
+  %ins5 = insertelement <8 x i32> %ins4, i32 %a1, i32 5
+  %ins6 = insertelement <8 x i32> %ins5, i32 %a0, i32 6
+  %ins7 = insertelement <8 x i32> %ins6, i32 %a1, i32 7
+  store <8 x i32> %ins7, ptr %dst
+  ret void
+}
+
 define void @buildvector_v4i64(ptr %dst, i64 %a0, i64 %a1, i64 %a2, i64 %a3) nounwind {
 ; CHECK-LABEL: buildvector_v4i64:
 ; CHECK:       # %bb.0: # %entry
@@ -886,6 +1238,23 @@ entry:
   ret void
 }
 
+define void @buildvector_v4i64_subseq_2(ptr %dst, i64 %a0, i64 %a1) nounwind {
+; CHECK-LABEL: buildvector_v4i64_subseq_2:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    vinsgr2vr.d $vr0, $a1, 0
+; CHECK-NEXT:    vinsgr2vr.d $vr0, $a2, 1
+; CHECK-NEXT:    xvreplve0.q $xr0, $xr0
+; CHECK-NEXT:    xvst $xr0, $a0, 0
+; CHECK-NEXT:    ret
+entry:
+  %ins0 = insertelement <4 x i64> undef, i64 %a0, i32 0
+  %ins1 = insertelement <4 x i64> %ins0, i64 %a1, i32 1
+  %ins2 = insertelement <4 x i64> %ins1, i64 %a0, i32 2
+  %ins3 = insertelement <4 x i64> %ins2, i64 %a1, i32 3
+  store <4 x i64> %ins3, ptr %dst
+  ret void
+}
+
 define void @buildvector_v8f32(ptr %dst, float %a0, float %a1, float %a2, float %a3, float %a4, float %a5, float %a6, float %a7) nounwind {
 ; CHECK-LABEL: buildvector_v8f32:
 ; CHECK:       # %bb.0: # %entry
@@ -973,6 +1342,54 @@ entry:
   ret void
 }
 
+define void @buildvector_v8f32_subseq_2(ptr %dst, float %a0, float %a1, float %a2, float %a3) nounwind {
+; CHECK-LABEL: buildvector_v8f32_subseq_2:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    # kill: def $f3 killed $f3 def $vr3
+; CHECK-NEXT:    # kill: def $f2 killed $f2 def $vr2
+; CHECK-NEXT:    # kill: def $f1 killed $f1 def $vr1
+; CHECK-NEXT:    # kill: def $f0 killed $f0 def $xr0
+; CHECK-NEXT:    vextrins.w $vr0, $vr1, 16
+; CHECK-NEXT:    vextrins.w $vr0, $vr2, 32
+; CHECK-NEXT:    vextrins.w $vr0, $vr3, 48
+; CHECK-NEXT:    xvreplve0.q $xr0, $xr0
+; CHECK-NEXT:    xvst $xr0, $a0, 0
+; CHECK-NEXT:    ret
+entry:
+  %ins0 = insertelement <8 x float> undef, float %a0, i32 0
+  %ins1 = insertelement <8 x float> %ins0, float %a1, i32 1
+  %ins2 = insertelement <8 x float> %ins1, float %a2, i32 2
+  %ins3 = insertelement <8 x float> %ins2, float %a3, i32 3
+  %ins4 = insertelement <8 x float> %ins3, float %a0, i32 4
+  %ins5 = insertelement <8 x float> %ins4, float %a1, i32 5
+  %ins6 = insertelement <8 x float> %ins5, float %a2, i32 6
+  %ins7 = insertelement <8 x float> %ins6, float %a3, i32 7
+  store <8 x float> %ins7, ptr %dst
+  ret void
+}
+
+define void @buildvector_v8f32_subseq_4(ptr %dst, float %a0, float %a1) nounwind {
+; CHECK-LABEL: buildvector_v8f32_subseq_4:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    # kill: def $f1 killed $f1 def $vr1
+; CHECK-NEXT:    # kill: def $f0 killed $f0 def $xr0
+; CHECK-NEXT:    vextrins.w $vr0, $vr1, 16
+; CHECK-NEXT:    xvreplve0.d $xr0, $xr0
+; CHECK-NEXT:    xvst $xr0, $a0, 0
+; CHECK-NEXT:    ret
+entry:
+  %ins0 = insertelement <8 x float> undef, float %a0, i32 0
+  %ins1 = insertelement <8 x float> %ins0, float %a1, i32 1
+  %ins2 = insertelement <8 x float> %ins1, float %a0, i32 2
+  %ins3 = insertelement <8 x float> %ins2, float %a1, i32 3
+  %ins4 = insertelement <8 x float> %ins3, float %a0, i32 4
+  %ins5 = insertelement <8 x float> %ins4, float %a1, i32 5
+  %ins6 = insertelement <8 x float> %ins5, float %a0, i32 6
+  %ins7 = insertelement <8 x float> %ins6, float %a1, i32 7
+  store <8 x float> %ins7, ptr %dst
+  ret void
+}
+
 define void @buildvector_v4f64(ptr %dst, double %a0, double %a1, double %a2, double %a3) nounwind {
 ; CHECK-LABEL: buildvector_v4f64:
 ; CHECK:       # %bb.0: # %entry
@@ -1029,3 +1446,21 @@ entry:
   store <4 x double> %ins3, ptr %dst
   ret void
 }
+
+define void @buildvector_v4f64_subseq_2(ptr %dst, double %a0, double %a1) nounwind {
+; CHECK-LABEL: buildvector_v4f64_subseq_2:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    # kill: def $f1_64 killed $f1_64 def $vr1
+; CHECK-NEXT:    # kill: def $f0_64 killed $f0_64 def $xr0
+; CHECK-NEXT:    vextrins.d $vr0, $vr1, 16
+; CHECK-NEXT:    xvreplve0.q $xr0, $xr0
+; CHECK-NEXT:    xvst $xr0, $a0, 0
+; CHECK-NEXT:    ret
+entry:
+  %ins0 = insertelement <4 x double> undef, double %a0, i32 0
+  %ins1 = insertelement <4 x double> %ins0, double %a1, i32 1
+  %ins2 = insertelement <4 x double> %ins1, double %a0, i32 2
+  %ins3 = insertelement <4 x double> %ins2, double %a1, i32 3
+  store <4 x double> %ins3, ptr %dst
+  ret void
+}

llvm/test/CodeGen/LoongArch/lsx/build-vector.ll

@@ -338,6 +338,102 @@ entry:
   ret void
 }
 
+define void @buildvector_v16i8_subseq_2(ptr %dst, i8 %a0, i8 %a1, i8 %a2, i8 %a3, i8 %a4, i8 %a5, i8 %a6, i8 %a7) nounwind {
+; CHECK-LABEL: buildvector_v16i8_subseq_2:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    ld.b $t0, $sp, 0
+; CHECK-NEXT:    vinsgr2vr.b $vr0, $a1, 0
+; CHECK-NEXT:    vinsgr2vr.b $vr0, $a2, 1
+; CHECK-NEXT:    vinsgr2vr.b $vr0, $a3, 2
+; CHECK-NEXT:    vinsgr2vr.b $vr0, $a4, 3
+; CHECK-NEXT:    vinsgr2vr.b $vr0, $a5, 4
+; CHECK-NEXT:    vinsgr2vr.b $vr0, $a6, 5
+; CHECK-NEXT:    vinsgr2vr.b $vr0, $a7, 6
+; CHECK-NEXT:    vinsgr2vr.b $vr0, $t0, 7
+; CHECK-NEXT:    vreplvei.d $vr0, $vr0, 0
+; CHECK-NEXT:    vst $vr0, $a0, 0
+; CHECK-NEXT:    ret
+entry:
+  %ins0  = insertelement <16 x i8> undef,  i8 %a0, i32 0
+  %ins1  = insertelement <16 x i8> %ins0,  i8 %a1, i32 1
+  %ins2  = insertelement <16 x i8> %ins1,  i8 %a2, i32 2
+  %ins3  = insertelement <16 x i8> %ins2,  i8 %a3, i32 3
+  %ins4  = insertelement <16 x i8> %ins3,  i8 %a4, i32 4
+  %ins5  = insertelement <16 x i8> %ins4,  i8 %a5, i32 5
+  %ins6  = insertelement <16 x i8> %ins5,  i8 %a6, i32 6
+  %ins7  = insertelement <16 x i8> %ins6,  i8 %a7, i32 7
+  %ins8  = insertelement <16 x i8> %ins7,  i8 %a0, i32 8
+  %ins9  = insertelement <16 x i8> %ins8,  i8 %a1, i32 9
+  %ins10 = insertelement <16 x i8> %ins9,  i8 %a2, i32 10
+  %ins11 = insertelement <16 x i8> %ins10, i8 %a3, i32 11
+  %ins12 = insertelement <16 x i8> %ins11, i8 %a4, i32 12
+  %ins13 = insertelement <16 x i8> %ins12, i8 %a5, i32 13
+  %ins14 = insertelement <16 x i8> %ins13, i8 %a6, i32 14
+  %ins15 = insertelement <16 x i8> %ins14, i8 %a7, i32 15
+  store <16 x i8> %ins15, ptr %dst
+  ret void
+}
+
+define void @buildvector_v16i8_subseq_4(ptr %dst, i8 %a0, i8 %a1, i8 %a2, i8 %a3) nounwind {
+; CHECK-LABEL: buildvector_v16i8_subseq_4:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    vinsgr2vr.b $vr0, $a1, 0
+; CHECK-NEXT:    vinsgr2vr.b $vr0, $a2, 1
+; CHECK-NEXT:    vinsgr2vr.b $vr0, $a3, 2
+; CHECK-NEXT:    vinsgr2vr.b $vr0, $a4, 3
+; CHECK-NEXT:    vreplvei.w $vr0, $vr0, 0
+; CHECK-NEXT:    vst $vr0, $a0, 0
+; CHECK-NEXT:    ret
+entry:
+  %ins0  = insertelement <16 x i8> undef,  i8 %a0, i32 0
+  %ins1  = insertelement <16 x i8> %ins0,  i8 %a1, i32 1
+  %ins2  = insertelement <16 x i8> %ins1,  i8 %a2, i32 2
+  %ins3  = insertelement <16 x i8> %ins2,  i8 %a3, i32 3
+  %ins4  = insertelement <16 x i8> %ins3,  i8 %a0, i32 4
+  %ins5  = insertelement <16 x i8> %ins4,  i8 %a1, i32 5
+  %ins6  = insertelement <16 x i8> %ins5,  i8 %a2, i32 6
+  %ins7  = insertelement <16 x i8> %ins6,  i8 %a3, i32 7
+  %ins8  = insertelement <16 x i8> %ins7,  i8 %a0, i32 8
+  %ins9  = insertelement <16 x i8> %ins8,  i8 %a1, i32 9
+  %ins10 = insertelement <16 x i8> %ins9,  i8 %a2, i32 10
+  %ins11 = insertelement <16 x i8> %ins10, i8 %a3, i32 11
+  %ins12 = insertelement <16 x i8> %ins11, i8 %a0, i32 12
+  %ins13 = insertelement <16 x i8> %ins12, i8 %a1, i32 13
+  %ins14 = insertelement <16 x i8> %ins13, i8 %a2, i32 14
+  %ins15 = insertelement <16 x i8> %ins14, i8 %a3, i32 15
+  store <16 x i8> %ins15, ptr %dst
+  ret void
+}
+
+define void @buildvector_v16i8_subseq_8(ptr %dst, i8 %a0, i8 %a1) nounwind {
+; CHECK-LABEL: buildvector_v16i8_subseq_8:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    vinsgr2vr.b $vr0, $a1, 0
+; CHECK-NEXT:    vinsgr2vr.b $vr0, $a2, 1
+; CHECK-NEXT:    vreplvei.h $vr0, $vr0, 0
+; CHECK-NEXT:    vst $vr0, $a0, 0
+; CHECK-NEXT:    ret
+entry:
+  %ins0  = insertelement <16 x i8> undef,  i8 %a0, i32 0
+  %ins1  = insertelement <16 x i8> %ins0,  i8 %a1, i32 1
+  %ins2  = insertelement <16 x i8> %ins1,  i8 %a0, i32 2
+  %ins3  = insertelement <16 x i8> %ins2,  i8 %a1, i32 3
+  %ins4  = insertelement <16 x i8> %ins3,  i8 %a0, i32 4
+  %ins5  = insertelement <16 x i8> %ins4,  i8 %a1, i32 5
+  %ins6  = insertelement <16 x i8> %ins5,  i8 %a0, i32 6
+  %ins7  = insertelement <16 x i8> %ins6,  i8 %a1, i32 7
+  %ins8  = insertelement <16 x i8> %ins7,  i8 %a0, i32 8
+  %ins9  = insertelement <16 x i8> %ins8,  i8 %a1, i32 9
+  %ins10 = insertelement <16 x i8> %ins9,  i8 %a0, i32 10
+  %ins11 = insertelement <16 x i8> %ins10, i8 %a1, i32 11
+  %ins12 = insertelement <16 x i8> %ins11, i8 %a0, i32 12
+  %ins13 = insertelement <16 x i8> %ins12, i8 %a1, i32 13
+  %ins14 = insertelement <16 x i8> %ins13, i8 %a0, i32 14
+  %ins15 = insertelement <16 x i8> %ins14, i8 %a1, i32 15
+  store <16 x i8> %ins15, ptr %dst
+  ret void
+}
+
 define void @buildvector_v8i16(ptr %dst, i16 %a0, i16 %a1, i16 %a2, i16 %a3, i16 %a4, i16 %a5, i16 %a6, i16 %a7) nounwind {
 ; CHECK-LABEL: buildvector_v8i16:
 ; CHECK:       # %bb.0: # %entry
@@ -410,6 +506,50 @@ entry:
   ret void
 }
 
+define void @buildvector_v8i16_subseq_2(ptr %dst, i16 %a0, i16 %a1, i16 %a2, i16 %a3) nounwind {
+; CHECK-LABEL: buildvector_v8i16_subseq_2:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    vinsgr2vr.h $vr0, $a1, 0
+; CHECK-NEXT:    vinsgr2vr.h $vr0, $a2, 1
+; CHECK-NEXT:    vinsgr2vr.h $vr0, $a3, 2
+; CHECK-NEXT:    vinsgr2vr.h $vr0, $a4, 3
+; CHECK-NEXT:    vreplvei.d $vr0, $vr0, 0
+; CHECK-NEXT:    vst $vr0, $a0, 0
+; CHECK-NEXT:    ret
+entry:
+  %ins0 = insertelement <8 x i16> undef, i16 %a0, i32 0
+  %ins1 = insertelement <8 x i16> %ins0, i16 %a1, i32 1
+  %ins2 = insertelement <8 x i16> %ins1, i16 %a2, i32 2
+  %ins3 = insertelement <8 x i16> %ins2, i16 %a3, i32 3
+  %ins4 = insertelement <8 x i16> %ins3, i16 %a0, i32 4
+  %ins5 = insertelement <8 x i16> %ins4, i16 %a1, i32 5
+  %ins6 = insertelement <8 x i16> %ins5, i16 %a2, i32 6
+  %ins7 = insertelement <8 x i16> %ins6, i16 %a3, i32 7
+  store <8 x i16> %ins7, ptr %dst
+  ret void
+}
+
+define void @buildvector_v8i16_subseq_4(ptr %dst, i16 %a0, i16 %a1) nounwind {
+; CHECK-LABEL: buildvector_v8i16_subseq_4:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    vinsgr2vr.h $vr0, $a1, 0
+; CHECK-NEXT:    vinsgr2vr.h $vr0, $a2, 1
+; CHECK-NEXT:    vreplvei.w $vr0, $vr0, 0
+; CHECK-NEXT:    vst $vr0, $a0, 0
+; CHECK-NEXT:    ret
+entry:
+  %ins0 = insertelement <8 x i16> undef, i16 %a0, i32 0
+  %ins1 = insertelement <8 x i16> %ins0, i16 %a1, i32 1
+  %ins2 = insertelement <8 x i16> %ins1, i16 %a0, i32 2
+  %ins3 = insertelement <8 x i16> %ins2, i16 %a1, i32 3
+  %ins4 = insertelement <8 x i16> %ins3, i16 %a0, i32 4
+  %ins5 = insertelement <8 x i16> %ins4, i16 %a1, i32 5
+  %ins6 = insertelement <8 x i16> %ins5, i16 %a0, i32 6
+  %ins7 = insertelement <8 x i16> %ins6, i16 %a1, i32 7
+  store <8 x i16> %ins7, ptr %dst
+  ret void
+}
+
 define void @buildvector_v4i32(ptr %dst, i32 %a0, i32 %a1, i32 %a2, i32 %a3) nounwind {
 ; CHECK-LABEL: buildvector_v4i32:
 ; CHECK:       # %bb.0: # %entry
@@ -462,6 +602,23 @@ entry:
   ret void
 }
 
+define void @buildvector_v4i32_subseq_2(ptr %dst, i32 %a0, i32 %a1) nounwind {
+; CHECK-LABEL: buildvector_v4i32_subseq_2:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    vinsgr2vr.w $vr0, $a1, 0
+; CHECK-NEXT:    vinsgr2vr.w $vr0, $a2, 1
+; CHECK-NEXT:    vreplvei.d $vr0, $vr0, 0
+; CHECK-NEXT:    vst $vr0, $a0, 0
+; CHECK-NEXT:    ret
+entry:
+  %ins0 = insertelement <4 x i32> undef, i32 %a0, i32 0
+  %ins1 = insertelement <4 x i32> %ins0, i32 %a1, i32 1
+  %ins2 = insertelement <4 x i32> %ins1, i32 %a0, i32 2
+  %ins3 = insertelement <4 x i32> %ins2, i32 %a1, i32 3
+  store <4 x i32> %ins3, ptr %dst
+  ret void
+}
+
 define void @buildvector_v2i64(ptr %dst, i64 %a0, i64 %a1) nounwind {
 ; CHECK-LABEL: buildvector_v2i64:
 ; CHECK:       # %bb.0: # %entry
@@ -562,6 +719,24 @@ entry:
   ret void
 }
 
+define void @buildvector_v4f32_subseq_2(ptr %dst, float %a0, float %a1) nounwind {
+; CHECK-LABEL: buildvector_v4f32_subseq_2:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    # kill: def $f1 killed $f1 def $vr1
+; CHECK-NEXT:    # kill: def $f0 killed $f0 def $vr0
+; CHECK-NEXT:    vextrins.w $vr0, $vr1, 16
+; CHECK-NEXT:    vreplvei.d $vr0, $vr0, 0
+; CHECK-NEXT:    vst $vr0, $a0, 0
+; CHECK-NEXT:    ret
+entry:
+  %ins0 = insertelement <4 x float> undef, float %a0, i32 0
+  %ins1 = insertelement <4 x float> %ins0, float %a1, i32 1
+  %ins2 = insertelement <4 x float> %ins1, float %a0, i32 2
+  %ins3 = insertelement <4 x float> %ins2, float %a1, i32 3
+  store <4 x float> %ins3, ptr %dst
+  ret void
+}
+
 define void @buildvector_v2f64(ptr %dst, double %a0, double %a1) nounwind {
 ; CHECK-LABEL: buildvector_v2f64:
 ; CHECK:       # %bb.0: # %entry