; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
; RUN:   -mcpu=pwr10 -ppc-asm-full-reg-names \
; RUN:   -ppc-vsr-nums-as-vr < %s | FileCheck %s
; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \
; RUN:   -mcpu=pwr10 -ppc-asm-full-reg-names \
; RUN:   -ppc-vsr-nums-as-vr < %s | FileCheck %s --check-prefix=CHECK-BE

; Function Attrs: nofree nounwind writeonly
define dso_local void @test60(i8* nocapture readnone %vqp, i8* nocapture readnone %vpp, <16 x i8> %vc, i8* nocapture %resp) {
; CHECK-LABEL: test60:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    xvcvspbf16 vs0, v2
; CHECK-NEXT:    stxv vs0, 0(r7)
; CHECK-NEXT:    blr
;
; CHECK-BE-LABEL: test60:
; CHECK-BE:       # %bb.0: # %entry
; CHECK-BE-NEXT:    xvcvspbf16 vs0, v2
; CHECK-BE-NEXT:    stxv vs0, 0(r7)
; CHECK-BE-NEXT:    blr
entry:
  %0 = tail call <16 x i8> @llvm.ppc.vsx.xvcvspbf16(<16 x i8> %vc)
  %1 = bitcast i8* %resp to <16 x i8>*
  store <16 x i8> %0, <16 x i8>* %1, align 16
  ret void
}
; Function Attrs: nounwind readnone
declare <16 x i8> @llvm.ppc.vsx.xvcvspbf16(<16 x i8>)

; Function Attrs: nofree nounwind writeonly
define dso_local void @test61(i8* nocapture readnone %vqp, i8* nocapture readnone %vpp, <16 x i8> %vc, i8* nocapture %resp) {
; CHECK-LABEL: test61:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    xvcvbf16spn vs0, v2
; CHECK-NEXT:    stxv vs0, 0(r7)
; CHECK-NEXT:    blr
;
; CHECK-BE-LABEL: test61:
; CHECK-BE:       # %bb.0: # %entry
; CHECK-BE-NEXT:    xvcvbf16spn vs0, v2
; CHECK-BE-NEXT:    stxv vs0, 0(r7)
; CHECK-BE-NEXT:    blr
entry:
  %0 = tail call <16 x i8> @llvm.ppc.vsx.xvcvbf16spn(<16 x i8> %vc)
  %1 = bitcast i8* %resp to <16 x i8>*
  store <16 x i8> %0, <16 x i8>* %1, align 16
  ret void
}

; Function Attrs: nounwind readnone
declare <16 x i8> @llvm.ppc.vsx.xvcvbf16spn(<16 x i8>)