// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ // Test target codegen - host bc file has to be created first. // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=nvptx64-nvidia-cuda -emit-llvm-bc %s -o %t-ppc-host.bc // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -x c++ -triple nvptx64-unknown-unknown -fopenmp-targets=nvptx64-nvidia-cuda -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck --check-prefixes=CHECK-64 %s // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=nvptx-nvidia-cuda -emit-llvm-bc %s -o %t-x86-host.bc // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -x c++ -triple nvptx-unknown-unknown -fopenmp-targets=nvptx-nvidia-cuda -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck --check-prefixes=CHECK-32 %s // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -fexceptions -fcxx-exceptions -x c++ -triple nvptx-unknown-unknown -fopenmp-targets=nvptx-nvidia-cuda -emit-llvm %s -fopenmp-is-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck --check-prefixes=CHECK-32-EX %s // expected-no-diagnostics #ifndef HEADER #define HEADER int a; void foo() { #pragma omp target teams distribute parallel for simd if(a) for (int i = 0; i < 10; ++i) ; #pragma omp target teams distribute parallel for simd schedule(static) for (int i = 0; i < 10; ++i) ; #pragma omp target teams distribute parallel for simd schedule(static, 1) for (int i = 0; i < 10; ++i) ; #pragma omp target teams distribute parallel for simd schedule(auto) for (int i = 0; i < 10; ++i) ; #pragma omp target teams distribute parallel for simd schedule(runtime) for (int i = 0; i < 10; ++i) ; #pragma omp target teams distribute parallel for simd schedule(dynamic) for (int i = 0; i < 10; ++i) ; #pragma omp target teams distribute parallel for simd schedule(guided) for (int i = 0; i < 10; ++i) ; int a; #pragma omp target teams distribute parallel for lastprivate(a) for (int i = 0; i < 10; ++i) a = i; #pragma omp target teams distribute parallel for schedule(static) for (int i = 0; i < 10; ++i) ; #pragma omp target teams distribute parallel for schedule(static, 1) for (int i = 0; i < 10; ++i) ; #pragma omp target teams distribute parallel for schedule(auto) for (int i = 0; i < 10; ++i) ; #pragma omp target teams distribute parallel for schedule(runtime) for (int i = 0; i < 10; ++i) ; #pragma omp target teams distribute parallel for schedule(dynamic) for (int i = 0; i < 10; ++i) ; #pragma omp target teams distribute parallel for schedule(guided) for (int i = 0; i < 10; ++i) ; #pragma omp target teams { int b; #pragma omp distribute parallel for simd for (int i = 0; i < 10; ++i) ; ; } #pragma omp target teams { int b[] = {2, 3, sizeof(int)}; #pragma omp distribute parallel for simd schedule(static) for (int i = 0; i < 10; ++i) ; } #pragma omp target teams { int b; #pragma omp distribute parallel for simd schedule(static, 1) for (int i = 0; i < 10; ++i) ; int &c = b; } #pragma omp target teams #pragma omp distribute parallel for simd schedule(auto) for (int i = 0; i < 10; ++i) ; #pragma omp target teams #pragma omp distribute parallel for simd schedule(runtime) for (int i = 0; i < 10; ++i) ; #pragma omp target teams #pragma omp distribute parallel for simd schedule(dynamic) for (int i = 0; i < 10; ++i) ; #pragma omp target teams #pragma omp distribute parallel for simd schedule(guided) for (int i = 0; i < 10; ++i) ; #pragma omp target teams #pragma omp distribute parallel for for (int i = 0; i < 10; ++i) ; #pragma omp target teams #pragma omp distribute parallel for schedule(static) for (int i = 0; i < 10; ++i) ; #pragma omp target teams #pragma omp distribute parallel for schedule(static, 1) for (int i = 0; i < 10; ++i) ; #pragma omp target teams #pragma omp distribute parallel for schedule(auto) for (int i = 0; i < 10; ++i) ; #pragma omp target teams #pragma omp distribute parallel for schedule(runtime) for (int i = 0; i < 10; ++i) ; #pragma omp target teams #pragma omp distribute parallel for schedule(dynamic) for (int i = 0; i < 10; ++i) ; #pragma omp target teams #pragma omp distribute parallel for schedule(guided) for (int i = 0; i < 10; ++i) ; #pragma omp target #pragma omp teams #pragma omp distribute parallel for for (int i = 0; i < 10; ++i) ; #pragma omp target #pragma omp teams #pragma omp distribute parallel for schedule(static) for (int i = 0; i < 10; ++i) ; #pragma omp target #pragma omp teams #pragma omp distribute parallel for schedule(static, 1) for (int i = 0; i < 10; ++i) ; #pragma omp target #pragma omp teams #pragma omp distribute parallel for schedule(auto) for (int i = 0; i < 10; ++i) ; #pragma omp target #pragma omp teams #pragma omp distribute parallel for schedule(runtime) for (int i = 0; i < 10; ++i) ; #pragma omp target #pragma omp teams #pragma omp distribute parallel for schedule(dynamic) for (int i = 0; i < 10; ++i) ; #pragma omp target #pragma omp teams #pragma omp distribute parallel for schedule(guided) for (int i = 0; i < 10; ++i) ; #pragma omp target parallel for if(a) for (int i = 0; i < 10; ++i) ; #pragma omp target parallel for schedule(static) for (int i = 0; i < 10; ++i) ; #pragma omp target parallel for schedule(static, 1) for (int i = 0; i < 10; ++i) ; #pragma omp target parallel for schedule(auto) for (int i = 0; i < 10; ++i) ; #pragma omp target parallel for schedule(runtime) for (int i = 0; i < 10; ++i) ; #pragma omp target parallel for schedule(dynamic) for (int i = 0; i < 10; ++i) ; #pragma omp target parallel for schedule(guided) for (int i = 0; i < 10; ++i) ; #pragma omp target parallel if(a) #pragma omp for simd for (int i = 0; i < 10; ++i) ; #pragma omp target parallel #pragma omp for simd schedule(static) for (int i = 0; i < 10; ++i) ; #pragma omp target parallel #pragma omp for simd schedule(static, 1) for (int i = 0; i < 10; ++i) ; #pragma omp target parallel #pragma omp for simd schedule(auto) for (int i = 0; i < 10; ++i) ; #pragma omp target parallel #pragma omp for simd schedule(runtime) for (int i = 0; i < 10; ++i) ; #pragma omp target parallel #pragma omp for simd schedule(dynamic) for (int i = 0; i < 10; ++i) ; #pragma omp target parallel #pragma omp for simd schedule(guided) for (int i = 0; i < 10; ++i) ; #pragma omp target #pragma omp parallel #pragma omp for simd ordered for (int i = 0; i < 10; ++i) ; #pragma omp target #pragma omp parallel #pragma omp for simd schedule(static) for (int i = 0; i < 10; ++i) ; #pragma omp target #pragma omp parallel #pragma omp for simd schedule(static, 1) for (int i = 0; i < 10; ++i) ; #pragma omp target #pragma omp parallel #pragma omp for simd schedule(auto) for (int i = 0; i < 10; ++i) ; #pragma omp target #pragma omp parallel #pragma omp for simd schedule(runtime) for (int i = 0; i < 10; ++i) ; #pragma omp target #pragma omp parallel #pragma omp for simd schedule(dynamic) for (int i = 0; i < 10; ++i) ; #pragma omp target #pragma omp parallel #pragma omp for simd schedule(guided) for (int i = 0; i < 10; ++i) ; #pragma omp target #pragma omp parallel for for (int i = 0; i < 10; ++i) ; #pragma omp target #pragma omp parallel for schedule(static) for (int i = 0; i < 10; ++i) ; #pragma omp target #pragma omp parallel for schedule(static, 1) for (int i = 0; i < 10; ++i) ; #pragma omp target #pragma omp parallel for schedule(auto) for (int i = 0; i < 10; ++i) ; #pragma omp target #pragma omp parallel for schedule(runtime) for (int i = 0; i < 10; ++i) ; #pragma omp target #pragma omp parallel for schedule(dynamic) for (int i = 0; i < 10; ++i) ; #pragma omp target #pragma omp parallel for schedule(guided) for (int i = 0; i < 10; ++i) ; } #endif // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l15 // CHECK-64-SAME: (i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0:[0-9]+]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 // CHECK-64-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 // CHECK-64-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 // CHECK-64-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8* // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1:[0-9]+]], i8 2, i1 false) // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-64: user_code.entry: // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-64-NEXT: [[TMP2:%.*]] = load i8, i8* [[CONV]], align 1 // CHECK-64-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP2]] to i1 // CHECK-64-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8* // CHECK-64-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8 // CHECK-64-NEXT: store i8 [[FROMBOOL]], i8* [[CONV1]], align 1 // CHECK-64-NEXT: [[TMP3:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 // CHECK-64-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 // CHECK-64-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4 // CHECK-64-NEXT: call void @__omp_outlined__(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i64 [[TMP3]]) #[[ATTR2:[0-9]+]] // CHECK-64-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-64-NEXT: ret void // CHECK-64: worker.exit: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@__omp_outlined__ // CHECK-64-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1:[0-9]+]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [3 x i8*], align 8 // CHECK-64-NEXT: [[DOTCAPTURE_EXPR__CASTED16:%.*]] = alloca i64, align 8 // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS19:%.*]] = alloca [3 x i8*], align 8 // CHECK-64-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 // CHECK-64-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 // CHECK-64-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8* // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block() // CHECK-64-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-64-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP1]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-64-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-64: cond.true: // CHECK-64-NEXT: br label [[COND_END:%.*]] // CHECK-64: cond.false: // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: br label [[COND_END]] // CHECK-64: cond.end: // CHECK-64-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-64-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[TMP5:%.*]] = load i8, i8* [[CONV]], align 1 // CHECK-64-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP5]] to i1 // CHECK-64-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] // CHECK-64: omp_if.then: // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-64: omp.inner.for.cond: // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP130:![0-9]+]] // CHECK-64-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP6]], 10 // CHECK-64-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-64: omp.inner.for.body: // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP130]] // CHECK-64-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 // CHECK-64-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP130]] // CHECK-64-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 // CHECK-64-NEXT: [[TMP11:%.*]] = load i8, i8* [[CONV]], align 1, !llvm.access.group [[ACC_GRP130]] // CHECK-64-NEXT: [[TOBOOL2:%.*]] = trunc i8 [[TMP11]] to i1 // CHECK-64-NEXT: [[CONV3:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8* // CHECK-64-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL2]] to i8 // CHECK-64-NEXT: store i8 [[FROMBOOL]], i8* [[CONV3]], align 1, !llvm.access.group [[ACC_GRP130]] // CHECK-64-NEXT: [[TMP12:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8, !llvm.access.group [[ACC_GRP130]] // CHECK-64-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0 // CHECK-64-NEXT: [[TMP14:%.*]] = inttoptr i64 [[TMP8]] to i8* // CHECK-64-NEXT: store i8* [[TMP14]], i8** [[TMP13]], align 8, !llvm.access.group [[ACC_GRP130]] // CHECK-64-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1 // CHECK-64-NEXT: [[TMP16:%.*]] = inttoptr i64 [[TMP10]] to i8* // CHECK-64-NEXT: store i8* [[TMP16]], i8** [[TMP15]], align 8, !llvm.access.group [[ACC_GRP130]] // CHECK-64-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 2 // CHECK-64-NEXT: [[TMP18:%.*]] = inttoptr i64 [[TMP12]] to i8* // CHECK-64-NEXT: store i8* [[TMP18]], i8** [[TMP17]], align 8, !llvm.access.group [[ACC_GRP130]] // CHECK-64-NEXT: [[TMP19:%.*]] = load i8, i8* [[CONV]], align 1, !llvm.access.group [[ACC_GRP130]] // CHECK-64-NEXT: [[TOBOOL4:%.*]] = trunc i8 [[TMP19]] to i1 // CHECK-64-NEXT: [[TMP20:%.*]] = zext i1 [[TOBOOL4]] to i32 // CHECK-64-NEXT: [[TMP21:%.*]] = bitcast [3 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-64-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 [[TMP20]], i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i64, i64, i64)* @__omp_outlined__1 to i8*), i8* null, i8** [[TMP21]], i64 3), !llvm.access.group [[ACC_GRP130]] // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-64: omp.inner.for.inc: // CHECK-64-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP130]] // CHECK-64-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP130]] // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP22]], [[TMP23]] // CHECK-64-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP130]] // CHECK-64-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP130]] // CHECK-64-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP130]] // CHECK-64-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP24]], [[TMP25]] // CHECK-64-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP130]] // CHECK-64-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP130]] // CHECK-64-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP130]] // CHECK-64-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP26]], [[TMP27]] // CHECK-64-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP130]] // CHECK-64-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP130]] // CHECK-64-NEXT: [[CMP7:%.*]] = icmp sgt i32 [[TMP28]], 9 // CHECK-64-NEXT: br i1 [[CMP7]], label [[COND_TRUE8:%.*]], label [[COND_FALSE9:%.*]] // CHECK-64: cond.true8: // CHECK-64-NEXT: br label [[COND_END10:%.*]] // CHECK-64: cond.false9: // CHECK-64-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP130]] // CHECK-64-NEXT: br label [[COND_END10]] // CHECK-64: cond.end10: // CHECK-64-NEXT: [[COND11:%.*]] = phi i32 [ 9, [[COND_TRUE8]] ], [ [[TMP29]], [[COND_FALSE9]] ] // CHECK-64-NEXT: store i32 [[COND11]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP130]] // CHECK-64-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP130]] // CHECK-64-NEXT: store i32 [[TMP30]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP130]] // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP131:![0-9]+]] // CHECK-64: omp.inner.for.end: // CHECK-64-NEXT: br label [[OMP_IF_END:%.*]] // CHECK-64: omp_if.else: // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND12:%.*]] // CHECK-64: omp.inner.for.cond12: // CHECK-64-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[CMP13:%.*]] = icmp slt i32 [[TMP31]], 10 // CHECK-64-NEXT: br i1 [[CMP13]], label [[OMP_INNER_FOR_BODY14:%.*]], label [[OMP_INNER_FOR_END30:%.*]] // CHECK-64: omp.inner.for.body14: // CHECK-64-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: [[TMP33:%.*]] = zext i32 [[TMP32]] to i64 // CHECK-64-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP35:%.*]] = zext i32 [[TMP34]] to i64 // CHECK-64-NEXT: [[TMP36:%.*]] = load i8, i8* [[CONV]], align 1 // CHECK-64-NEXT: [[TOBOOL15:%.*]] = trunc i8 [[TMP36]] to i1 // CHECK-64-NEXT: [[CONV17:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED16]] to i8* // CHECK-64-NEXT: [[FROMBOOL18:%.*]] = zext i1 [[TOBOOL15]] to i8 // CHECK-64-NEXT: store i8 [[FROMBOOL18]], i8* [[CONV17]], align 1 // CHECK-64-NEXT: [[TMP37:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED16]], align 8 // CHECK-64-NEXT: [[TMP38:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS19]], i64 0, i64 0 // CHECK-64-NEXT: [[TMP39:%.*]] = inttoptr i64 [[TMP33]] to i8* // CHECK-64-NEXT: store i8* [[TMP39]], i8** [[TMP38]], align 8 // CHECK-64-NEXT: [[TMP40:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS19]], i64 0, i64 1 // CHECK-64-NEXT: [[TMP41:%.*]] = inttoptr i64 [[TMP35]] to i8* // CHECK-64-NEXT: store i8* [[TMP41]], i8** [[TMP40]], align 8 // CHECK-64-NEXT: [[TMP42:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS19]], i64 0, i64 2 // CHECK-64-NEXT: [[TMP43:%.*]] = inttoptr i64 [[TMP37]] to i8* // CHECK-64-NEXT: store i8* [[TMP43]], i8** [[TMP42]], align 8 // CHECK-64-NEXT: [[TMP44:%.*]] = load i8, i8* [[CONV]], align 1 // CHECK-64-NEXT: [[TOBOOL20:%.*]] = trunc i8 [[TMP44]] to i1 // CHECK-64-NEXT: [[TMP45:%.*]] = zext i1 [[TOBOOL20]] to i32 // CHECK-64-NEXT: [[TMP46:%.*]] = bitcast [3 x i8*]* [[CAPTURED_VARS_ADDRS19]] to i8** // CHECK-64-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 [[TMP45]], i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i64, i64, i64)* @__omp_outlined__2 to i8*), i8* null, i8** [[TMP46]], i64 3) // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC21:%.*]] // CHECK-64: omp.inner.for.inc21: // CHECK-64-NEXT: [[TMP47:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[TMP48:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: [[ADD22:%.*]] = add nsw i32 [[TMP47]], [[TMP48]] // CHECK-64-NEXT: store i32 [[ADD22]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[TMP49:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: [[TMP50:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: [[ADD23:%.*]] = add nsw i32 [[TMP49]], [[TMP50]] // CHECK-64-NEXT: store i32 [[ADD23]], i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: [[TMP51:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP52:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: [[ADD24:%.*]] = add nsw i32 [[TMP51]], [[TMP52]] // CHECK-64-NEXT: store i32 [[ADD24]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP53:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[CMP25:%.*]] = icmp sgt i32 [[TMP53]], 9 // CHECK-64-NEXT: br i1 [[CMP25]], label [[COND_TRUE26:%.*]], label [[COND_FALSE27:%.*]] // CHECK-64: cond.true26: // CHECK-64-NEXT: br label [[COND_END28:%.*]] // CHECK-64: cond.false27: // CHECK-64-NEXT: [[TMP54:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: br label [[COND_END28]] // CHECK-64: cond.end28: // CHECK-64-NEXT: [[COND29:%.*]] = phi i32 [ 9, [[COND_TRUE26]] ], [ [[TMP54]], [[COND_FALSE27]] ] // CHECK-64-NEXT: store i32 [[COND29]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP55:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP55]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND12]], !llvm.loop [[LOOP134:![0-9]+]] // CHECK-64: omp.inner.for.end30: // CHECK-64-NEXT: br label [[OMP_IF_END]] // CHECK-64: omp_if.end: // CHECK-64-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-64: omp.loop.exit: // CHECK-64-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) // CHECK-64-NEXT: [[TMP56:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[TMP57:%.*]] = icmp ne i32 [[TMP56]], 0 // CHECK-64-NEXT: br i1 [[TMP57]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-64: .omp.final.then: // CHECK-64-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-64-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-64: .omp.final.done: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@__omp_outlined__1 // CHECK-64-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 // CHECK-64-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 // CHECK-64-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 // CHECK-64-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 // CHECK-64-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8* // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 // CHECK-64-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP0]] to i32 // CHECK-64-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 // CHECK-64-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP1]] to i32 // CHECK-64-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[TMP2:%.*]] = load i8, i8* [[CONV]], align 1 // CHECK-64-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP2]] to i1 // CHECK-64-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] // CHECK-64: omp_if.then: // CHECK-64-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 // CHECK-64-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-64: omp.inner.for.cond: // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP136:![0-9]+]] // CHECK-64-NEXT: [[CONV3:%.*]] = sext i32 [[TMP6]] to i64 // CHECK-64-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8, !llvm.access.group [[ACC_GRP136]] // CHECK-64-NEXT: [[CMP:%.*]] = icmp ule i64 [[CONV3]], [[TMP7]] // CHECK-64-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-64: omp.inner.for.body: // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP136]] // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-64-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP136]] // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-64: omp.body.continue: // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-64: omp.inner.for.inc: // CHECK-64-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP136]] // CHECK-64-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP136]] // CHECK-64-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP9]], [[TMP10]] // CHECK-64-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP136]] // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP137:![0-9]+]] // CHECK-64: omp.inner.for.end: // CHECK-64-NEXT: br label [[OMP_IF_END:%.*]] // CHECK-64: omp_if.else: // CHECK-64-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 // CHECK-64-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP12]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) // CHECK-64-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND5:%.*]] // CHECK-64: omp.inner.for.cond5: // CHECK-64-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[CONV6:%.*]] = sext i32 [[TMP14]] to i64 // CHECK-64-NEXT: [[TMP15:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 // CHECK-64-NEXT: [[CMP7:%.*]] = icmp ule i64 [[CONV6]], [[TMP15]] // CHECK-64-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY8:%.*]], label [[OMP_INNER_FOR_END14:%.*]] // CHECK-64: omp.inner.for.body8: // CHECK-64-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[MUL9:%.*]] = mul nsw i32 [[TMP16]], 1 // CHECK-64-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL9]] // CHECK-64-NEXT: store i32 [[ADD10]], i32* [[I]], align 4 // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE11:%.*]] // CHECK-64: omp.body.continue11: // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC12:%.*]] // CHECK-64: omp.inner.for.inc12: // CHECK-64-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: [[ADD13:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] // CHECK-64-NEXT: store i32 [[ADD13]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND5]], !llvm.loop [[LOOP139:![0-9]+]] // CHECK-64: omp.inner.for.end14: // CHECK-64-NEXT: br label [[OMP_IF_END]] // CHECK-64: omp_if.end: // CHECK-64-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-64: omp.loop.exit: // CHECK-64-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4 // CHECK-64-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP20]]) // CHECK-64-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0 // CHECK-64-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-64: .omp.final.then: // CHECK-64-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-64-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-64: .omp.final.done: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@__omp_outlined__2 // CHECK-64-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 // CHECK-64-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 // CHECK-64-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 // CHECK-64-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 // CHECK-64-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8* // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 // CHECK-64-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP0]] to i32 // CHECK-64-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 // CHECK-64-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP1]] to i32 // CHECK-64-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[TMP2:%.*]] = load i8, i8* [[CONV]], align 1 // CHECK-64-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP2]] to i1 // CHECK-64-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] // CHECK-64: omp_if.then: // CHECK-64-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 // CHECK-64-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-64: omp.inner.for.cond: // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP140:![0-9]+]] // CHECK-64-NEXT: [[CONV3:%.*]] = sext i32 [[TMP6]] to i64 // CHECK-64-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8, !llvm.access.group [[ACC_GRP140]] // CHECK-64-NEXT: [[CMP:%.*]] = icmp ule i64 [[CONV3]], [[TMP7]] // CHECK-64-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-64: omp.inner.for.body: // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP140]] // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-64-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP140]] // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-64: omp.body.continue: // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-64: omp.inner.for.inc: // CHECK-64-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP140]] // CHECK-64-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP140]] // CHECK-64-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP9]], [[TMP10]] // CHECK-64-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP140]] // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP141:![0-9]+]] // CHECK-64: omp.inner.for.end: // CHECK-64-NEXT: br label [[OMP_IF_END:%.*]] // CHECK-64: omp_if.else: // CHECK-64-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 // CHECK-64-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP12]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) // CHECK-64-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND5:%.*]] // CHECK-64: omp.inner.for.cond5: // CHECK-64-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[CONV6:%.*]] = sext i32 [[TMP14]] to i64 // CHECK-64-NEXT: [[TMP15:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 // CHECK-64-NEXT: [[CMP7:%.*]] = icmp ule i64 [[CONV6]], [[TMP15]] // CHECK-64-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY8:%.*]], label [[OMP_INNER_FOR_END14:%.*]] // CHECK-64: omp.inner.for.body8: // CHECK-64-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[MUL9:%.*]] = mul nsw i32 [[TMP16]], 1 // CHECK-64-NEXT: [[ADD10:%.*]] = add nsw i32 0, [[MUL9]] // CHECK-64-NEXT: store i32 [[ADD10]], i32* [[I]], align 4 // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE11:%.*]] // CHECK-64: omp.body.continue11: // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC12:%.*]] // CHECK-64: omp.inner.for.inc12: // CHECK-64-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: [[ADD13:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] // CHECK-64-NEXT: store i32 [[ADD13]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND5]], !llvm.loop [[LOOP143:![0-9]+]] // CHECK-64: omp.inner.for.end14: // CHECK-64-NEXT: br label [[OMP_IF_END]] // CHECK-64: omp_if.end: // CHECK-64-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-64: omp.loop.exit: // CHECK-64-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4 // CHECK-64-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP20]]) // CHECK-64-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0 // CHECK-64-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-64: .omp.final.then: // CHECK-64-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-64-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-64: .omp.final.done: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l18 // CHECK-64-SAME: () #[[ATTR0]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-64: user_code.entry: // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-64-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 // CHECK-64-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4 // CHECK-64-NEXT: call void @__omp_outlined__3(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR2]] // CHECK-64-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-64-NEXT: ret void // CHECK-64: worker.exit: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@__omp_outlined__3 // CHECK-64-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x i8*], align 8 // CHECK-64-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block() // CHECK-64-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-64-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-64-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-64: cond.true: // CHECK-64-NEXT: br label [[COND_END:%.*]] // CHECK-64: cond.false: // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: br label [[COND_END]] // CHECK-64: cond.end: // CHECK-64-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-64-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-64: omp.inner.for.cond: // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP144:![0-9]+]] // CHECK-64-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10 // CHECK-64-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-64: omp.inner.for.body: // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP144]] // CHECK-64-NEXT: [[TMP7:%.*]] = zext i32 [[TMP6]] to i64 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP144]] // CHECK-64-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 // CHECK-64-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0 // CHECK-64-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP7]] to i8* // CHECK-64-NEXT: store i8* [[TMP11]], i8** [[TMP10]], align 8, !llvm.access.group [[ACC_GRP144]] // CHECK-64-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1 // CHECK-64-NEXT: [[TMP13:%.*]] = inttoptr i64 [[TMP9]] to i8* // CHECK-64-NEXT: store i8* [[TMP13]], i8** [[TMP12]], align 8, !llvm.access.group [[ACC_GRP144]] // CHECK-64-NEXT: [[TMP14:%.*]] = bitcast [2 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-64-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i64, i64)* @__omp_outlined__4 to i8*), i8* null, i8** [[TMP14]], i64 2), !llvm.access.group [[ACC_GRP144]] // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-64: omp.inner.for.inc: // CHECK-64-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP144]] // CHECK-64-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP144]] // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] // CHECK-64-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP144]] // CHECK-64-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP144]] // CHECK-64-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP144]] // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] // CHECK-64-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP144]] // CHECK-64-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP144]] // CHECK-64-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP144]] // CHECK-64-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] // CHECK-64-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP144]] // CHECK-64-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP144]] // CHECK-64-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP21]], 9 // CHECK-64-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]] // CHECK-64: cond.true5: // CHECK-64-NEXT: br label [[COND_END7:%.*]] // CHECK-64: cond.false6: // CHECK-64-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP144]] // CHECK-64-NEXT: br label [[COND_END7]] // CHECK-64: cond.end7: // CHECK-64-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP22]], [[COND_FALSE6]] ] // CHECK-64-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP144]] // CHECK-64-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP144]] // CHECK-64-NEXT: store i32 [[TMP23]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP144]] // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP145:![0-9]+]] // CHECK-64: omp.inner.for.end: // CHECK-64-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-64: omp.loop.exit: // CHECK-64-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) // CHECK-64-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0 // CHECK-64-NEXT: br i1 [[TMP25]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-64: .omp.final.then: // CHECK-64-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-64-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-64: .omp.final.done: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@__omp_outlined__4 // CHECK-64-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 // CHECK-64-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 // CHECK-64-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 // CHECK-64-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 // CHECK-64-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 // CHECK-64-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 // CHECK-64-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 9 // CHECK-64-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-64: cond.true: // CHECK-64-NEXT: br label [[COND_END:%.*]] // CHECK-64: cond.false: // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: br label [[COND_END]] // CHECK-64: cond.end: // CHECK-64-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] // CHECK-64-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-64: omp.inner.for.cond: // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP147:![0-9]+]] // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP147]] // CHECK-64-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] // CHECK-64-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-64: omp.inner.for.body: // CHECK-64-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP147]] // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-64-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP147]] // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-64: omp.body.continue: // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-64: omp.inner.for.inc: // CHECK-64-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP147]] // CHECK-64-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 // CHECK-64-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP147]] // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP148:![0-9]+]] // CHECK-64: omp.inner.for.end: // CHECK-64-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-64: omp.loop.exit: // CHECK-64-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]]) // CHECK-64-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0 // CHECK-64-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-64: .omp.final.then: // CHECK-64-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-64-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-64: .omp.final.done: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l21 // CHECK-64-SAME: () #[[ATTR0]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-64: user_code.entry: // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-64-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 // CHECK-64-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4 // CHECK-64-NEXT: call void @__omp_outlined__5(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR2]] // CHECK-64-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-64-NEXT: ret void // CHECK-64: worker.exit: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@__omp_outlined__5 // CHECK-64-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x i8*], align 8 // CHECK-64-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block() // CHECK-64-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-64-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-64-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-64: cond.true: // CHECK-64-NEXT: br label [[COND_END:%.*]] // CHECK-64: cond.false: // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: br label [[COND_END]] // CHECK-64: cond.end: // CHECK-64-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-64-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-64: omp.inner.for.cond: // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP150:![0-9]+]] // CHECK-64-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10 // CHECK-64-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-64: omp.inner.for.body: // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP150]] // CHECK-64-NEXT: [[TMP7:%.*]] = zext i32 [[TMP6]] to i64 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP150]] // CHECK-64-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 // CHECK-64-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0 // CHECK-64-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP7]] to i8* // CHECK-64-NEXT: store i8* [[TMP11]], i8** [[TMP10]], align 8, !llvm.access.group [[ACC_GRP150]] // CHECK-64-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1 // CHECK-64-NEXT: [[TMP13:%.*]] = inttoptr i64 [[TMP9]] to i8* // CHECK-64-NEXT: store i8* [[TMP13]], i8** [[TMP12]], align 8, !llvm.access.group [[ACC_GRP150]] // CHECK-64-NEXT: [[TMP14:%.*]] = bitcast [2 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-64-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i64, i64)* @__omp_outlined__6 to i8*), i8* null, i8** [[TMP14]], i64 2), !llvm.access.group [[ACC_GRP150]] // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-64: omp.inner.for.inc: // CHECK-64-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP150]] // CHECK-64-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP150]] // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] // CHECK-64-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP150]] // CHECK-64-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP150]] // CHECK-64-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP150]] // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] // CHECK-64-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP150]] // CHECK-64-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP150]] // CHECK-64-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP150]] // CHECK-64-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] // CHECK-64-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP150]] // CHECK-64-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP150]] // CHECK-64-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP21]], 9 // CHECK-64-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]] // CHECK-64: cond.true5: // CHECK-64-NEXT: br label [[COND_END7:%.*]] // CHECK-64: cond.false6: // CHECK-64-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP150]] // CHECK-64-NEXT: br label [[COND_END7]] // CHECK-64: cond.end7: // CHECK-64-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP22]], [[COND_FALSE6]] ] // CHECK-64-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP150]] // CHECK-64-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP150]] // CHECK-64-NEXT: store i32 [[TMP23]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP150]] // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP151:![0-9]+]] // CHECK-64: omp.inner.for.end: // CHECK-64-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-64: omp.loop.exit: // CHECK-64-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) // CHECK-64-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0 // CHECK-64-NEXT: br i1 [[TMP25]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-64: .omp.final.then: // CHECK-64-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-64-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-64: .omp.final.done: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@__omp_outlined__6 // CHECK-64-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 // CHECK-64-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 // CHECK-64-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 // CHECK-64-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 // CHECK-64-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 // CHECK-64-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 // CHECK-64-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP3]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-64: omp.inner.for.cond: // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP153:![0-9]+]] // CHECK-64-NEXT: [[CONV2:%.*]] = sext i32 [[TMP5]] to i64 // CHECK-64-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8, !llvm.access.group [[ACC_GRP153]] // CHECK-64-NEXT: [[CMP:%.*]] = icmp ule i64 [[CONV2]], [[TMP6]] // CHECK-64-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-64: omp.inner.for.body: // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP153]] // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-64-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP153]] // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-64: omp.body.continue: // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-64: omp.inner.for.inc: // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP153]] // CHECK-64-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP153]] // CHECK-64-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP8]], [[TMP9]] // CHECK-64-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP153]] // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP154:![0-9]+]] // CHECK-64: omp.inner.for.end: // CHECK-64-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-64: omp.loop.exit: // CHECK-64-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]]) // CHECK-64-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[TMP11:%.*]] = icmp ne i32 [[TMP10]], 0 // CHECK-64-NEXT: br i1 [[TMP11]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-64: .omp.final.then: // CHECK-64-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-64-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-64: .omp.final.done: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l24 // CHECK-64-SAME: () #[[ATTR0]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-64: user_code.entry: // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-64-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 // CHECK-64-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4 // CHECK-64-NEXT: call void @__omp_outlined__7(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR2]] // CHECK-64-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-64-NEXT: ret void // CHECK-64: worker.exit: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@__omp_outlined__7 // CHECK-64-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x i8*], align 8 // CHECK-64-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block() // CHECK-64-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-64-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-64-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-64: cond.true: // CHECK-64-NEXT: br label [[COND_END:%.*]] // CHECK-64: cond.false: // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: br label [[COND_END]] // CHECK-64: cond.end: // CHECK-64-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-64-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-64: omp.inner.for.cond: // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP156:![0-9]+]] // CHECK-64-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10 // CHECK-64-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-64: omp.inner.for.body: // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP156]] // CHECK-64-NEXT: [[TMP7:%.*]] = zext i32 [[TMP6]] to i64 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP156]] // CHECK-64-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 // CHECK-64-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0 // CHECK-64-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP7]] to i8* // CHECK-64-NEXT: store i8* [[TMP11]], i8** [[TMP10]], align 8, !llvm.access.group [[ACC_GRP156]] // CHECK-64-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1 // CHECK-64-NEXT: [[TMP13:%.*]] = inttoptr i64 [[TMP9]] to i8* // CHECK-64-NEXT: store i8* [[TMP13]], i8** [[TMP12]], align 8, !llvm.access.group [[ACC_GRP156]] // CHECK-64-NEXT: [[TMP14:%.*]] = bitcast [2 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-64-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i64, i64)* @__omp_outlined__8 to i8*), i8* null, i8** [[TMP14]], i64 2), !llvm.access.group [[ACC_GRP156]] // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-64: omp.inner.for.inc: // CHECK-64-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP156]] // CHECK-64-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP156]] // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] // CHECK-64-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP156]] // CHECK-64-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP156]] // CHECK-64-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP156]] // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] // CHECK-64-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP156]] // CHECK-64-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP156]] // CHECK-64-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP156]] // CHECK-64-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] // CHECK-64-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP156]] // CHECK-64-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP156]] // CHECK-64-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP21]], 9 // CHECK-64-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]] // CHECK-64: cond.true5: // CHECK-64-NEXT: br label [[COND_END7:%.*]] // CHECK-64: cond.false6: // CHECK-64-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP156]] // CHECK-64-NEXT: br label [[COND_END7]] // CHECK-64: cond.end7: // CHECK-64-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP22]], [[COND_FALSE6]] ] // CHECK-64-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP156]] // CHECK-64-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP156]] // CHECK-64-NEXT: store i32 [[TMP23]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP156]] // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP157:![0-9]+]] // CHECK-64: omp.inner.for.end: // CHECK-64-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-64: omp.loop.exit: // CHECK-64-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) // CHECK-64-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0 // CHECK-64-NEXT: br i1 [[TMP25]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-64: .omp.final.then: // CHECK-64-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-64-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-64: .omp.final.done: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@__omp_outlined__8 // CHECK-64-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 // CHECK-64-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 // CHECK-64-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 // CHECK-64-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 // CHECK-64-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 // CHECK-64-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 // CHECK-64-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 1073741862, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1) // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-64: omp.dispatch.cond: // CHECK-64-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-64-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0 // CHECK-64-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-64: omp.dispatch.body: // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-64: omp.inner.for.cond: // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP159:![0-9]+]] // CHECK-64-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP159]] // CHECK-64-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] // CHECK-64-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-64: omp.inner.for.body: // CHECK-64-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP159]] // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-64-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP159]] // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-64: omp.body.continue: // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-64: omp.inner.for.inc: // CHECK-64-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP159]] // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP11]], 1 // CHECK-64-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP159]] // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP160:![0-9]+]] // CHECK-64: omp.inner.for.end: // CHECK-64-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-64: omp.dispatch.inc: // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-64: omp.dispatch.end: // CHECK-64-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0 // CHECK-64-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-64: .omp.final.then: // CHECK-64-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-64-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-64: .omp.final.done: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l27 // CHECK-64-SAME: () #[[ATTR0]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-64: user_code.entry: // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-64-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 // CHECK-64-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4 // CHECK-64-NEXT: call void @__omp_outlined__9(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR2]] // CHECK-64-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-64-NEXT: ret void // CHECK-64: worker.exit: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@__omp_outlined__9 // CHECK-64-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x i8*], align 8 // CHECK-64-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block() // CHECK-64-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-64-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-64-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-64: cond.true: // CHECK-64-NEXT: br label [[COND_END:%.*]] // CHECK-64: cond.false: // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: br label [[COND_END]] // CHECK-64: cond.end: // CHECK-64-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-64-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-64: omp.inner.for.cond: // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP162:![0-9]+]] // CHECK-64-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10 // CHECK-64-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-64: omp.inner.for.body: // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP162]] // CHECK-64-NEXT: [[TMP7:%.*]] = zext i32 [[TMP6]] to i64 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP162]] // CHECK-64-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 // CHECK-64-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0 // CHECK-64-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP7]] to i8* // CHECK-64-NEXT: store i8* [[TMP11]], i8** [[TMP10]], align 8, !llvm.access.group [[ACC_GRP162]] // CHECK-64-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1 // CHECK-64-NEXT: [[TMP13:%.*]] = inttoptr i64 [[TMP9]] to i8* // CHECK-64-NEXT: store i8* [[TMP13]], i8** [[TMP12]], align 8, !llvm.access.group [[ACC_GRP162]] // CHECK-64-NEXT: [[TMP14:%.*]] = bitcast [2 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-64-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i64, i64)* @__omp_outlined__10 to i8*), i8* null, i8** [[TMP14]], i64 2), !llvm.access.group [[ACC_GRP162]] // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-64: omp.inner.for.inc: // CHECK-64-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP162]] // CHECK-64-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP162]] // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] // CHECK-64-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP162]] // CHECK-64-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP162]] // CHECK-64-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP162]] // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] // CHECK-64-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP162]] // CHECK-64-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP162]] // CHECK-64-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP162]] // CHECK-64-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] // CHECK-64-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP162]] // CHECK-64-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP162]] // CHECK-64-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP21]], 9 // CHECK-64-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]] // CHECK-64: cond.true5: // CHECK-64-NEXT: br label [[COND_END7:%.*]] // CHECK-64: cond.false6: // CHECK-64-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP162]] // CHECK-64-NEXT: br label [[COND_END7]] // CHECK-64: cond.end7: // CHECK-64-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP22]], [[COND_FALSE6]] ] // CHECK-64-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP162]] // CHECK-64-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP162]] // CHECK-64-NEXT: store i32 [[TMP23]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP162]] // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP163:![0-9]+]] // CHECK-64: omp.inner.for.end: // CHECK-64-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-64: omp.loop.exit: // CHECK-64-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) // CHECK-64-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0 // CHECK-64-NEXT: br i1 [[TMP25]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-64: .omp.final.then: // CHECK-64-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-64-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-64: .omp.final.done: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@__omp_outlined__10 // CHECK-64-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 // CHECK-64-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 // CHECK-64-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 // CHECK-64-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 // CHECK-64-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 // CHECK-64-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 // CHECK-64-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 1073741861, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1) // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-64: omp.dispatch.cond: // CHECK-64-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-64-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0 // CHECK-64-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-64: omp.dispatch.body: // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-64: omp.inner.for.cond: // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP165:![0-9]+]] // CHECK-64-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP165]] // CHECK-64-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] // CHECK-64-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-64: omp.inner.for.body: // CHECK-64-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP165]] // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-64-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP165]] // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-64: omp.body.continue: // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-64: omp.inner.for.inc: // CHECK-64-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP165]] // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP11]], 1 // CHECK-64-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP165]] // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP166:![0-9]+]] // CHECK-64: omp.inner.for.end: // CHECK-64-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-64: omp.dispatch.inc: // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-64: omp.dispatch.end: // CHECK-64-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0 // CHECK-64-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-64: .omp.final.then: // CHECK-64-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-64-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-64: .omp.final.done: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l30 // CHECK-64-SAME: () #[[ATTR0]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-64: user_code.entry: // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-64-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 // CHECK-64-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4 // CHECK-64-NEXT: call void @__omp_outlined__11(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR2]] // CHECK-64-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-64-NEXT: ret void // CHECK-64: worker.exit: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@__omp_outlined__11 // CHECK-64-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x i8*], align 8 // CHECK-64-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block() // CHECK-64-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-64-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-64-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-64: cond.true: // CHECK-64-NEXT: br label [[COND_END:%.*]] // CHECK-64: cond.false: // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: br label [[COND_END]] // CHECK-64: cond.end: // CHECK-64-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-64-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-64: omp.inner.for.cond: // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP168:![0-9]+]] // CHECK-64-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10 // CHECK-64-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-64: omp.inner.for.body: // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP168]] // CHECK-64-NEXT: [[TMP7:%.*]] = zext i32 [[TMP6]] to i64 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP168]] // CHECK-64-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 // CHECK-64-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0 // CHECK-64-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP7]] to i8* // CHECK-64-NEXT: store i8* [[TMP11]], i8** [[TMP10]], align 8, !llvm.access.group [[ACC_GRP168]] // CHECK-64-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1 // CHECK-64-NEXT: [[TMP13:%.*]] = inttoptr i64 [[TMP9]] to i8* // CHECK-64-NEXT: store i8* [[TMP13]], i8** [[TMP12]], align 8, !llvm.access.group [[ACC_GRP168]] // CHECK-64-NEXT: [[TMP14:%.*]] = bitcast [2 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-64-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i64, i64)* @__omp_outlined__12 to i8*), i8* null, i8** [[TMP14]], i64 2), !llvm.access.group [[ACC_GRP168]] // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-64: omp.inner.for.inc: // CHECK-64-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP168]] // CHECK-64-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP168]] // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] // CHECK-64-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP168]] // CHECK-64-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP168]] // CHECK-64-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP168]] // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] // CHECK-64-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP168]] // CHECK-64-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP168]] // CHECK-64-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP168]] // CHECK-64-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] // CHECK-64-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP168]] // CHECK-64-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP168]] // CHECK-64-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP21]], 9 // CHECK-64-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]] // CHECK-64: cond.true5: // CHECK-64-NEXT: br label [[COND_END7:%.*]] // CHECK-64: cond.false6: // CHECK-64-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP168]] // CHECK-64-NEXT: br label [[COND_END7]] // CHECK-64: cond.end7: // CHECK-64-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP22]], [[COND_FALSE6]] ] // CHECK-64-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP168]] // CHECK-64-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP168]] // CHECK-64-NEXT: store i32 [[TMP23]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP168]] // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP169:![0-9]+]] // CHECK-64: omp.inner.for.end: // CHECK-64-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-64: omp.loop.exit: // CHECK-64-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) // CHECK-64-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0 // CHECK-64-NEXT: br i1 [[TMP25]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-64: .omp.final.then: // CHECK-64-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-64-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-64: .omp.final.done: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@__omp_outlined__12 // CHECK-64-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 // CHECK-64-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 // CHECK-64-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 // CHECK-64-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 // CHECK-64-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 // CHECK-64-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 // CHECK-64-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 1073741859, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1) // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-64: omp.dispatch.cond: // CHECK-64-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-64-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0 // CHECK-64-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-64: omp.dispatch.body: // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-64: omp.inner.for.cond: // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP171:![0-9]+]] // CHECK-64-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP171]] // CHECK-64-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] // CHECK-64-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-64: omp.inner.for.body: // CHECK-64-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP171]] // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-64-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP171]] // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-64: omp.body.continue: // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-64: omp.inner.for.inc: // CHECK-64-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP171]] // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP11]], 1 // CHECK-64-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP171]] // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP172:![0-9]+]] // CHECK-64: omp.inner.for.end: // CHECK-64-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-64: omp.dispatch.inc: // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-64: omp.dispatch.end: // CHECK-64-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0 // CHECK-64-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-64: .omp.final.then: // CHECK-64-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-64-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-64: .omp.final.done: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l33 // CHECK-64-SAME: () #[[ATTR0]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-64: user_code.entry: // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-64-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 // CHECK-64-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4 // CHECK-64-NEXT: call void @__omp_outlined__13(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR2]] // CHECK-64-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-64-NEXT: ret void // CHECK-64: worker.exit: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@__omp_outlined__13 // CHECK-64-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x i8*], align 8 // CHECK-64-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block() // CHECK-64-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-64-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-64-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-64: cond.true: // CHECK-64-NEXT: br label [[COND_END:%.*]] // CHECK-64: cond.false: // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: br label [[COND_END]] // CHECK-64: cond.end: // CHECK-64-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-64-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-64: omp.inner.for.cond: // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP174:![0-9]+]] // CHECK-64-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10 // CHECK-64-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-64: omp.inner.for.body: // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP174]] // CHECK-64-NEXT: [[TMP7:%.*]] = zext i32 [[TMP6]] to i64 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP174]] // CHECK-64-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 // CHECK-64-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0 // CHECK-64-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP7]] to i8* // CHECK-64-NEXT: store i8* [[TMP11]], i8** [[TMP10]], align 8, !llvm.access.group [[ACC_GRP174]] // CHECK-64-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1 // CHECK-64-NEXT: [[TMP13:%.*]] = inttoptr i64 [[TMP9]] to i8* // CHECK-64-NEXT: store i8* [[TMP13]], i8** [[TMP12]], align 8, !llvm.access.group [[ACC_GRP174]] // CHECK-64-NEXT: [[TMP14:%.*]] = bitcast [2 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-64-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i64, i64)* @__omp_outlined__14 to i8*), i8* null, i8** [[TMP14]], i64 2), !llvm.access.group [[ACC_GRP174]] // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-64: omp.inner.for.inc: // CHECK-64-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP174]] // CHECK-64-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP174]] // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] // CHECK-64-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP174]] // CHECK-64-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP174]] // CHECK-64-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP174]] // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] // CHECK-64-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP174]] // CHECK-64-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP174]] // CHECK-64-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP174]] // CHECK-64-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] // CHECK-64-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP174]] // CHECK-64-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP174]] // CHECK-64-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP21]], 9 // CHECK-64-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]] // CHECK-64: cond.true5: // CHECK-64-NEXT: br label [[COND_END7:%.*]] // CHECK-64: cond.false6: // CHECK-64-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP174]] // CHECK-64-NEXT: br label [[COND_END7]] // CHECK-64: cond.end7: // CHECK-64-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP22]], [[COND_FALSE6]] ] // CHECK-64-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP174]] // CHECK-64-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP174]] // CHECK-64-NEXT: store i32 [[TMP23]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP174]] // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP175:![0-9]+]] // CHECK-64: omp.inner.for.end: // CHECK-64-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-64: omp.loop.exit: // CHECK-64-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) // CHECK-64-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0 // CHECK-64-NEXT: br i1 [[TMP25]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-64: .omp.final.then: // CHECK-64-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-64-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-64: .omp.final.done: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@__omp_outlined__14 // CHECK-64-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 // CHECK-64-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 // CHECK-64-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 // CHECK-64-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 // CHECK-64-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 // CHECK-64-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 // CHECK-64-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 1073741860, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1) // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-64: omp.dispatch.cond: // CHECK-64-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-64-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0 // CHECK-64-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-64: omp.dispatch.body: // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-64: omp.inner.for.cond: // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP177:![0-9]+]] // CHECK-64-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP177]] // CHECK-64-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] // CHECK-64-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-64: omp.inner.for.body: // CHECK-64-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP177]] // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-64-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP177]] // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-64: omp.body.continue: // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-64: omp.inner.for.inc: // CHECK-64-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP177]] // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP11]], 1 // CHECK-64-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP177]] // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP178:![0-9]+]] // CHECK-64: omp.inner.for.end: // CHECK-64-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-64: omp.dispatch.inc: // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-64: omp.dispatch.end: // CHECK-64-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0 // CHECK-64-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-64: .omp.final.then: // CHECK-64-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-64-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-64: .omp.final.done: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l37 // CHECK-64-SAME: (i64 noundef [[A:%.*]]) #[[ATTR0]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 // CHECK-64-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8 // CHECK-64-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 // CHECK-64-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32* // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-64: user_code.entry: // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4 // CHECK-64-NEXT: [[CONV1:%.*]] = bitcast i64* [[A_CASTED]] to i32* // CHECK-64-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4 // CHECK-64-NEXT: [[TMP3:%.*]] = load i64, i64* [[A_CASTED]], align 8 // CHECK-64-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 // CHECK-64-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4 // CHECK-64-NEXT: call void @__omp_outlined__15(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i64 [[TMP3]]) #[[ATTR2]] // CHECK-64-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-64-NEXT: ret void // CHECK-64: worker.exit: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@__omp_outlined__15 // CHECK-64-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[A:%.*]]) #[[ATTR1]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8 // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [3 x i8*], align 8 // CHECK-64-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 // CHECK-64-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 // CHECK-64-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32* // CHECK-64-NEXT: [[A1:%.*]] = call align 8 i8* @__kmpc_alloc_shared(i64 4) // CHECK-64-NEXT: [[A_ON_STACK:%.*]] = bitcast i8* [[A1]] to i32* // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block() // CHECK-64-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-64-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-64-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-64: cond.true: // CHECK-64-NEXT: br label [[COND_END:%.*]] // CHECK-64: cond.false: // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: br label [[COND_END]] // CHECK-64: cond.end: // CHECK-64-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-64-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-64: omp.inner.for.cond: // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[CMP2:%.*]] = icmp slt i32 [[TMP5]], 10 // CHECK-64-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-64: omp.inner.for.body: // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: [[TMP7:%.*]] = zext i32 [[TMP6]] to i64 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 // CHECK-64-NEXT: [[TMP10:%.*]] = load i32, i32* [[A_ON_STACK]], align 4 // CHECK-64-NEXT: [[CONV3:%.*]] = bitcast i64* [[A_CASTED]] to i32* // CHECK-64-NEXT: store i32 [[TMP10]], i32* [[CONV3]], align 4 // CHECK-64-NEXT: [[TMP11:%.*]] = load i64, i64* [[A_CASTED]], align 8 // CHECK-64-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0 // CHECK-64-NEXT: [[TMP13:%.*]] = inttoptr i64 [[TMP7]] to i8* // CHECK-64-NEXT: store i8* [[TMP13]], i8** [[TMP12]], align 8 // CHECK-64-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1 // CHECK-64-NEXT: [[TMP15:%.*]] = inttoptr i64 [[TMP9]] to i8* // CHECK-64-NEXT: store i8* [[TMP15]], i8** [[TMP14]], align 8 // CHECK-64-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 2 // CHECK-64-NEXT: [[TMP17:%.*]] = inttoptr i64 [[TMP11]] to i8* // CHECK-64-NEXT: store i8* [[TMP17]], i8** [[TMP16]], align 8 // CHECK-64-NEXT: [[TMP18:%.*]] = bitcast [3 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-64-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i64, i64, i64)* @__omp_outlined__16 to i8*), i8* null, i8** [[TMP18]], i64 3) // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-64: omp.inner.for.inc: // CHECK-64-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] // CHECK-64-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] // CHECK-64-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP23]], [[TMP24]] // CHECK-64-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP25]], 9 // CHECK-64-NEXT: br i1 [[CMP6]], label [[COND_TRUE7:%.*]], label [[COND_FALSE8:%.*]] // CHECK-64: cond.true7: // CHECK-64-NEXT: br label [[COND_END9:%.*]] // CHECK-64: cond.false8: // CHECK-64-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: br label [[COND_END9]] // CHECK-64: cond.end9: // CHECK-64-NEXT: [[COND10:%.*]] = phi i32 [ 9, [[COND_TRUE7]] ], [ [[TMP26]], [[COND_FALSE8]] ] // CHECK-64-NEXT: store i32 [[COND10]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP27]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK-64: omp.inner.for.end: // CHECK-64-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-64: omp.loop.exit: // CHECK-64-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) // CHECK-64-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0 // CHECK-64-NEXT: br i1 [[TMP29]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] // CHECK-64: .omp.lastprivate.then: // CHECK-64-NEXT: [[TMP30:%.*]] = load i32, i32* [[A_ON_STACK]], align 4 // CHECK-64-NEXT: store i32 [[TMP30]], i32* [[CONV]], align 4 // CHECK-64-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] // CHECK-64: .omp.lastprivate.done: // CHECK-64-NEXT: call void @__kmpc_free_shared(i8* [[A1]], i64 4) // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@__omp_outlined__16 // CHECK-64-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[A:%.*]]) #[[ATTR1]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 // CHECK-64-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 // CHECK-64-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[A3:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 // CHECK-64-NEXT: store i64 [[A]], i64* [[A_ADDR]], align 8 // CHECK-64-NEXT: [[CONV:%.*]] = bitcast i64* [[A_ADDR]] to i32* // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 // CHECK-64-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP0]] to i32 // CHECK-64-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 // CHECK-64-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP1]] to i32 // CHECK-64-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 // CHECK-64-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP3]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-64: omp.inner.for.cond: // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[CONV4:%.*]] = sext i32 [[TMP5]] to i64 // CHECK-64-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 // CHECK-64-NEXT: [[CMP:%.*]] = icmp ule i64 [[CONV4]], [[TMP6]] // CHECK-64-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-64: omp.inner.for.body: // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-64-NEXT: store i32 [[ADD]], i32* [[I]], align 4 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, i32* [[I]], align 4 // CHECK-64-NEXT: store i32 [[TMP8]], i32* [[A3]], align 4 // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-64: omp.body.continue: // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-64: omp.inner.for.inc: // CHECK-64-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP9]], [[TMP10]] // CHECK-64-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK-64: omp.inner.for.end: // CHECK-64-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-64: omp.loop.exit: // CHECK-64-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]]) // CHECK-64-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0 // CHECK-64-NEXT: br i1 [[TMP12]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] // CHECK-64: .omp.lastprivate.then: // CHECK-64-NEXT: [[TMP13:%.*]] = load i32, i32* [[A3]], align 4 // CHECK-64-NEXT: store i32 [[TMP13]], i32* [[CONV]], align 4 // CHECK-64-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] // CHECK-64: .omp.lastprivate.done: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l40 // CHECK-64-SAME: () #[[ATTR0]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-64: user_code.entry: // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-64-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 // CHECK-64-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4 // CHECK-64-NEXT: call void @__omp_outlined__17(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR2]] // CHECK-64-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-64-NEXT: ret void // CHECK-64: worker.exit: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@__omp_outlined__17 // CHECK-64-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x i8*], align 8 // CHECK-64-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block() // CHECK-64-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-64-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-64-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-64: cond.true: // CHECK-64-NEXT: br label [[COND_END:%.*]] // CHECK-64: cond.false: // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: br label [[COND_END]] // CHECK-64: cond.end: // CHECK-64-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-64-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-64: omp.inner.for.cond: // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10 // CHECK-64-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-64: omp.inner.for.body: // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: [[TMP7:%.*]] = zext i32 [[TMP6]] to i64 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 // CHECK-64-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0 // CHECK-64-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP7]] to i8* // CHECK-64-NEXT: store i8* [[TMP11]], i8** [[TMP10]], align 8 // CHECK-64-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1 // CHECK-64-NEXT: [[TMP13:%.*]] = inttoptr i64 [[TMP9]] to i8* // CHECK-64-NEXT: store i8* [[TMP13]], i8** [[TMP12]], align 8 // CHECK-64-NEXT: [[TMP14:%.*]] = bitcast [2 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-64-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i64, i64)* @__omp_outlined__18 to i8*), i8* null, i8** [[TMP14]], i64 2) // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-64: omp.inner.for.inc: // CHECK-64-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] // CHECK-64-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] // CHECK-64-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] // CHECK-64-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP21]], 9 // CHECK-64-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]] // CHECK-64: cond.true5: // CHECK-64-NEXT: br label [[COND_END7:%.*]] // CHECK-64: cond.false6: // CHECK-64-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: br label [[COND_END7]] // CHECK-64: cond.end7: // CHECK-64-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP22]], [[COND_FALSE6]] ] // CHECK-64-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP23]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK-64: omp.inner.for.end: // CHECK-64-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-64: omp.loop.exit: // CHECK-64-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@__omp_outlined__18 // CHECK-64-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 // CHECK-64-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 // CHECK-64-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 // CHECK-64-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 // CHECK-64-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 // CHECK-64-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 // CHECK-64-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 9 // CHECK-64-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-64: cond.true: // CHECK-64-NEXT: br label [[COND_END:%.*]] // CHECK-64: cond.false: // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: br label [[COND_END]] // CHECK-64: cond.end: // CHECK-64-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] // CHECK-64-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-64: omp.inner.for.cond: // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] // CHECK-64-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-64: omp.inner.for.body: // CHECK-64-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-64-NEXT: store i32 [[ADD]], i32* [[I]], align 4 // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-64: omp.body.continue: // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-64: omp.inner.for.inc: // CHECK-64-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 // CHECK-64-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK-64: omp.inner.for.end: // CHECK-64-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-64: omp.loop.exit: // CHECK-64-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]]) // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l43 // CHECK-64-SAME: () #[[ATTR0]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-64: user_code.entry: // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-64-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 // CHECK-64-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4 // CHECK-64-NEXT: call void @__omp_outlined__19(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR2]] // CHECK-64-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-64-NEXT: ret void // CHECK-64: worker.exit: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@__omp_outlined__19 // CHECK-64-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x i8*], align 8 // CHECK-64-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block() // CHECK-64-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-64-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-64-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-64: cond.true: // CHECK-64-NEXT: br label [[COND_END:%.*]] // CHECK-64: cond.false: // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: br label [[COND_END]] // CHECK-64: cond.end: // CHECK-64-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-64-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-64: omp.inner.for.cond: // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10 // CHECK-64-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-64: omp.inner.for.body: // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: [[TMP7:%.*]] = zext i32 [[TMP6]] to i64 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 // CHECK-64-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0 // CHECK-64-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP7]] to i8* // CHECK-64-NEXT: store i8* [[TMP11]], i8** [[TMP10]], align 8 // CHECK-64-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1 // CHECK-64-NEXT: [[TMP13:%.*]] = inttoptr i64 [[TMP9]] to i8* // CHECK-64-NEXT: store i8* [[TMP13]], i8** [[TMP12]], align 8 // CHECK-64-NEXT: [[TMP14:%.*]] = bitcast [2 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-64-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i64, i64)* @__omp_outlined__20 to i8*), i8* null, i8** [[TMP14]], i64 2) // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-64: omp.inner.for.inc: // CHECK-64-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] // CHECK-64-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] // CHECK-64-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] // CHECK-64-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP21]], 9 // CHECK-64-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]] // CHECK-64: cond.true5: // CHECK-64-NEXT: br label [[COND_END7:%.*]] // CHECK-64: cond.false6: // CHECK-64-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: br label [[COND_END7]] // CHECK-64: cond.end7: // CHECK-64-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP22]], [[COND_FALSE6]] ] // CHECK-64-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP23]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK-64: omp.inner.for.end: // CHECK-64-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-64: omp.loop.exit: // CHECK-64-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@__omp_outlined__20 // CHECK-64-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 // CHECK-64-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 // CHECK-64-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 // CHECK-64-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 // CHECK-64-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 // CHECK-64-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 // CHECK-64-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP3]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-64: omp.inner.for.cond: // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[CONV2:%.*]] = sext i32 [[TMP5]] to i64 // CHECK-64-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 // CHECK-64-NEXT: [[CMP:%.*]] = icmp ule i64 [[CONV2]], [[TMP6]] // CHECK-64-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-64: omp.inner.for.body: // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-64-NEXT: store i32 [[ADD]], i32* [[I]], align 4 // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-64: omp.body.continue: // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-64: omp.inner.for.inc: // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP8]], [[TMP9]] // CHECK-64-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK-64: omp.inner.for.end: // CHECK-64-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-64: omp.loop.exit: // CHECK-64-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]]) // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l46 // CHECK-64-SAME: () #[[ATTR0]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-64: user_code.entry: // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-64-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 // CHECK-64-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4 // CHECK-64-NEXT: call void @__omp_outlined__21(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR2]] // CHECK-64-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-64-NEXT: ret void // CHECK-64: worker.exit: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@__omp_outlined__21 // CHECK-64-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x i8*], align 8 // CHECK-64-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block() // CHECK-64-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-64-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-64-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-64: cond.true: // CHECK-64-NEXT: br label [[COND_END:%.*]] // CHECK-64: cond.false: // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: br label [[COND_END]] // CHECK-64: cond.end: // CHECK-64-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-64-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-64: omp.inner.for.cond: // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10 // CHECK-64-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-64: omp.inner.for.body: // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: [[TMP7:%.*]] = zext i32 [[TMP6]] to i64 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 // CHECK-64-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0 // CHECK-64-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP7]] to i8* // CHECK-64-NEXT: store i8* [[TMP11]], i8** [[TMP10]], align 8 // CHECK-64-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1 // CHECK-64-NEXT: [[TMP13:%.*]] = inttoptr i64 [[TMP9]] to i8* // CHECK-64-NEXT: store i8* [[TMP13]], i8** [[TMP12]], align 8 // CHECK-64-NEXT: [[TMP14:%.*]] = bitcast [2 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-64-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i64, i64)* @__omp_outlined__22 to i8*), i8* null, i8** [[TMP14]], i64 2) // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-64: omp.inner.for.inc: // CHECK-64-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] // CHECK-64-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] // CHECK-64-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] // CHECK-64-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP21]], 9 // CHECK-64-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]] // CHECK-64: cond.true5: // CHECK-64-NEXT: br label [[COND_END7:%.*]] // CHECK-64: cond.false6: // CHECK-64-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: br label [[COND_END7]] // CHECK-64: cond.end7: // CHECK-64-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP22]], [[COND_FALSE6]] ] // CHECK-64-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP23]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK-64: omp.inner.for.end: // CHECK-64-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-64: omp.loop.exit: // CHECK-64-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@__omp_outlined__22 // CHECK-64-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 // CHECK-64-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 // CHECK-64-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 // CHECK-64-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 // CHECK-64-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 // CHECK-64-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 // CHECK-64-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 1073741862, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1) // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-64: omp.dispatch.cond: // CHECK-64-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-64-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0 // CHECK-64-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-64: omp.dispatch.body: // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-64: omp.inner.for.cond: // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP180:![0-9]+]] // CHECK-64-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP180]] // CHECK-64-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] // CHECK-64-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-64: omp.inner.for.body: // CHECK-64-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP180]] // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-64-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP180]] // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-64: omp.body.continue: // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-64: omp.inner.for.inc: // CHECK-64-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP180]] // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP11]], 1 // CHECK-64-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP180]] // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP181:![0-9]+]] // CHECK-64: omp.inner.for.end: // CHECK-64-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-64: omp.dispatch.inc: // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-64: omp.dispatch.end: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l49 // CHECK-64-SAME: () #[[ATTR0]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-64: user_code.entry: // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-64-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 // CHECK-64-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4 // CHECK-64-NEXT: call void @__omp_outlined__23(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR2]] // CHECK-64-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-64-NEXT: ret void // CHECK-64: worker.exit: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@__omp_outlined__23 // CHECK-64-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x i8*], align 8 // CHECK-64-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block() // CHECK-64-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-64-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-64-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-64: cond.true: // CHECK-64-NEXT: br label [[COND_END:%.*]] // CHECK-64: cond.false: // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: br label [[COND_END]] // CHECK-64: cond.end: // CHECK-64-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-64-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-64: omp.inner.for.cond: // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10 // CHECK-64-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-64: omp.inner.for.body: // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: [[TMP7:%.*]] = zext i32 [[TMP6]] to i64 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 // CHECK-64-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0 // CHECK-64-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP7]] to i8* // CHECK-64-NEXT: store i8* [[TMP11]], i8** [[TMP10]], align 8 // CHECK-64-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1 // CHECK-64-NEXT: [[TMP13:%.*]] = inttoptr i64 [[TMP9]] to i8* // CHECK-64-NEXT: store i8* [[TMP13]], i8** [[TMP12]], align 8 // CHECK-64-NEXT: [[TMP14:%.*]] = bitcast [2 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-64-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i64, i64)* @__omp_outlined__24 to i8*), i8* null, i8** [[TMP14]], i64 2) // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-64: omp.inner.for.inc: // CHECK-64-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] // CHECK-64-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] // CHECK-64-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] // CHECK-64-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP21]], 9 // CHECK-64-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]] // CHECK-64: cond.true5: // CHECK-64-NEXT: br label [[COND_END7:%.*]] // CHECK-64: cond.false6: // CHECK-64-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: br label [[COND_END7]] // CHECK-64: cond.end7: // CHECK-64-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP22]], [[COND_FALSE6]] ] // CHECK-64-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP23]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK-64: omp.inner.for.end: // CHECK-64-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-64: omp.loop.exit: // CHECK-64-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@__omp_outlined__24 // CHECK-64-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 // CHECK-64-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 // CHECK-64-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 // CHECK-64-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 // CHECK-64-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 // CHECK-64-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 // CHECK-64-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 1073741861, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1) // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-64: omp.dispatch.cond: // CHECK-64-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-64-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0 // CHECK-64-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-64: omp.dispatch.body: // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-64: omp.inner.for.cond: // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP183:![0-9]+]] // CHECK-64-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP183]] // CHECK-64-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] // CHECK-64-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-64: omp.inner.for.body: // CHECK-64-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP183]] // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-64-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP183]] // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-64: omp.body.continue: // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-64: omp.inner.for.inc: // CHECK-64-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP183]] // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP11]], 1 // CHECK-64-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP183]] // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP184:![0-9]+]] // CHECK-64: omp.inner.for.end: // CHECK-64-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-64: omp.dispatch.inc: // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-64: omp.dispatch.end: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l52 // CHECK-64-SAME: () #[[ATTR0]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-64: user_code.entry: // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-64-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 // CHECK-64-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4 // CHECK-64-NEXT: call void @__omp_outlined__25(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR2]] // CHECK-64-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-64-NEXT: ret void // CHECK-64: worker.exit: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@__omp_outlined__25 // CHECK-64-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x i8*], align 8 // CHECK-64-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block() // CHECK-64-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-64-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-64-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-64: cond.true: // CHECK-64-NEXT: br label [[COND_END:%.*]] // CHECK-64: cond.false: // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: br label [[COND_END]] // CHECK-64: cond.end: // CHECK-64-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-64-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-64: omp.inner.for.cond: // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10 // CHECK-64-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-64: omp.inner.for.body: // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: [[TMP7:%.*]] = zext i32 [[TMP6]] to i64 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 // CHECK-64-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0 // CHECK-64-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP7]] to i8* // CHECK-64-NEXT: store i8* [[TMP11]], i8** [[TMP10]], align 8 // CHECK-64-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1 // CHECK-64-NEXT: [[TMP13:%.*]] = inttoptr i64 [[TMP9]] to i8* // CHECK-64-NEXT: store i8* [[TMP13]], i8** [[TMP12]], align 8 // CHECK-64-NEXT: [[TMP14:%.*]] = bitcast [2 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-64-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i64, i64)* @__omp_outlined__26 to i8*), i8* null, i8** [[TMP14]], i64 2) // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-64: omp.inner.for.inc: // CHECK-64-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] // CHECK-64-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] // CHECK-64-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] // CHECK-64-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP21]], 9 // CHECK-64-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]] // CHECK-64: cond.true5: // CHECK-64-NEXT: br label [[COND_END7:%.*]] // CHECK-64: cond.false6: // CHECK-64-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: br label [[COND_END7]] // CHECK-64: cond.end7: // CHECK-64-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP22]], [[COND_FALSE6]] ] // CHECK-64-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP23]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK-64: omp.inner.for.end: // CHECK-64-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-64: omp.loop.exit: // CHECK-64-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@__omp_outlined__26 // CHECK-64-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 // CHECK-64-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 // CHECK-64-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 // CHECK-64-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 // CHECK-64-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 // CHECK-64-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 // CHECK-64-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 1073741859, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1) // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-64: omp.dispatch.cond: // CHECK-64-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-64-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0 // CHECK-64-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-64: omp.dispatch.body: // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-64: omp.inner.for.cond: // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP186:![0-9]+]] // CHECK-64-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP186]] // CHECK-64-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] // CHECK-64-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-64: omp.inner.for.body: // CHECK-64-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP186]] // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-64-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP186]] // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-64: omp.body.continue: // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-64: omp.inner.for.inc: // CHECK-64-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP186]] // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP11]], 1 // CHECK-64-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP186]] // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP187:![0-9]+]] // CHECK-64: omp.inner.for.end: // CHECK-64-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-64: omp.dispatch.inc: // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-64: omp.dispatch.end: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l55 // CHECK-64-SAME: () #[[ATTR0]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-64: user_code.entry: // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-64-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 // CHECK-64-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4 // CHECK-64-NEXT: call void @__omp_outlined__27(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR2]] // CHECK-64-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-64-NEXT: ret void // CHECK-64: worker.exit: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@__omp_outlined__27 // CHECK-64-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x i8*], align 8 // CHECK-64-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block() // CHECK-64-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-64-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-64-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-64: cond.true: // CHECK-64-NEXT: br label [[COND_END:%.*]] // CHECK-64: cond.false: // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: br label [[COND_END]] // CHECK-64: cond.end: // CHECK-64-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-64-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-64: omp.inner.for.cond: // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10 // CHECK-64-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-64: omp.inner.for.body: // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: [[TMP7:%.*]] = zext i32 [[TMP6]] to i64 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 // CHECK-64-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0 // CHECK-64-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP7]] to i8* // CHECK-64-NEXT: store i8* [[TMP11]], i8** [[TMP10]], align 8 // CHECK-64-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1 // CHECK-64-NEXT: [[TMP13:%.*]] = inttoptr i64 [[TMP9]] to i8* // CHECK-64-NEXT: store i8* [[TMP13]], i8** [[TMP12]], align 8 // CHECK-64-NEXT: [[TMP14:%.*]] = bitcast [2 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-64-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i64, i64)* @__omp_outlined__28 to i8*), i8* null, i8** [[TMP14]], i64 2) // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-64: omp.inner.for.inc: // CHECK-64-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] // CHECK-64-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] // CHECK-64-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] // CHECK-64-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP21]], 9 // CHECK-64-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]] // CHECK-64: cond.true5: // CHECK-64-NEXT: br label [[COND_END7:%.*]] // CHECK-64: cond.false6: // CHECK-64-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: br label [[COND_END7]] // CHECK-64: cond.end7: // CHECK-64-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP22]], [[COND_FALSE6]] ] // CHECK-64-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP23]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK-64: omp.inner.for.end: // CHECK-64-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-64: omp.loop.exit: // CHECK-64-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@__omp_outlined__28 // CHECK-64-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 // CHECK-64-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 // CHECK-64-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 // CHECK-64-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 // CHECK-64-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 // CHECK-64-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 // CHECK-64-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 1073741860, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1) // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-64: omp.dispatch.cond: // CHECK-64-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-64-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0 // CHECK-64-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-64: omp.dispatch.body: // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-64: omp.inner.for.cond: // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP189:![0-9]+]] // CHECK-64-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP189]] // CHECK-64-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] // CHECK-64-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-64: omp.inner.for.body: // CHECK-64-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP189]] // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-64-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP189]] // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-64: omp.body.continue: // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-64: omp.inner.for.inc: // CHECK-64-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP189]] // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP11]], 1 // CHECK-64-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP189]] // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP190:![0-9]+]] // CHECK-64: omp.inner.for.end: // CHECK-64-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-64: omp.dispatch.inc: // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-64: omp.dispatch.end: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l58 // CHECK-64-SAME: () #[[ATTR0]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-64: user_code.entry: // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-64-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 // CHECK-64-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4 // CHECK-64-NEXT: call void @__omp_outlined__29(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR2]] // CHECK-64-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-64-NEXT: ret void // CHECK-64: worker.exit: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@__omp_outlined__29 // CHECK-64-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[B:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x i8*], align 8 // CHECK-64-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block() // CHECK-64-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-64-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-64-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-64: cond.true: // CHECK-64-NEXT: br label [[COND_END:%.*]] // CHECK-64: cond.false: // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: br label [[COND_END]] // CHECK-64: cond.end: // CHECK-64-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-64-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-64: omp.inner.for.cond: // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP192:![0-9]+]] // CHECK-64-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10 // CHECK-64-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-64: omp.inner.for.body: // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP192]] // CHECK-64-NEXT: [[TMP7:%.*]] = zext i32 [[TMP6]] to i64 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP192]] // CHECK-64-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 // CHECK-64-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0 // CHECK-64-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP7]] to i8* // CHECK-64-NEXT: store i8* [[TMP11]], i8** [[TMP10]], align 8, !llvm.access.group [[ACC_GRP192]] // CHECK-64-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1 // CHECK-64-NEXT: [[TMP13:%.*]] = inttoptr i64 [[TMP9]] to i8* // CHECK-64-NEXT: store i8* [[TMP13]], i8** [[TMP12]], align 8, !llvm.access.group [[ACC_GRP192]] // CHECK-64-NEXT: [[TMP14:%.*]] = bitcast [2 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-64-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i64, i64)* @__omp_outlined__30 to i8*), i8* null, i8** [[TMP14]], i64 2), !llvm.access.group [[ACC_GRP192]] // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-64: omp.inner.for.inc: // CHECK-64-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP192]] // CHECK-64-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP192]] // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] // CHECK-64-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP192]] // CHECK-64-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP192]] // CHECK-64-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP192]] // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] // CHECK-64-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP192]] // CHECK-64-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP192]] // CHECK-64-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP192]] // CHECK-64-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] // CHECK-64-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP192]] // CHECK-64-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP192]] // CHECK-64-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP21]], 9 // CHECK-64-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]] // CHECK-64: cond.true5: // CHECK-64-NEXT: br label [[COND_END7:%.*]] // CHECK-64: cond.false6: // CHECK-64-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP192]] // CHECK-64-NEXT: br label [[COND_END7]] // CHECK-64: cond.end7: // CHECK-64-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP22]], [[COND_FALSE6]] ] // CHECK-64-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP192]] // CHECK-64-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP192]] // CHECK-64-NEXT: store i32 [[TMP23]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP192]] // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP193:![0-9]+]] // CHECK-64: omp.inner.for.end: // CHECK-64-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-64: omp.loop.exit: // CHECK-64-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) // CHECK-64-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0 // CHECK-64-NEXT: br i1 [[TMP25]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-64: .omp.final.then: // CHECK-64-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-64-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-64: .omp.final.done: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@__omp_outlined__30 // CHECK-64-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 // CHECK-64-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 // CHECK-64-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 // CHECK-64-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 // CHECK-64-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 // CHECK-64-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 // CHECK-64-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP3]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-64: omp.inner.for.cond: // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP195:![0-9]+]] // CHECK-64-NEXT: [[CONV2:%.*]] = sext i32 [[TMP5]] to i64 // CHECK-64-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8, !llvm.access.group [[ACC_GRP195]] // CHECK-64-NEXT: [[CMP:%.*]] = icmp ule i64 [[CONV2]], [[TMP6]] // CHECK-64-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-64: omp.inner.for.body: // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP195]] // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-64-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP195]] // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-64: omp.body.continue: // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-64: omp.inner.for.inc: // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP195]] // CHECK-64-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP195]] // CHECK-64-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP8]], [[TMP9]] // CHECK-64-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP195]] // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP196:![0-9]+]] // CHECK-64: omp.inner.for.end: // CHECK-64-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-64: omp.loop.exit: // CHECK-64-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]]) // CHECK-64-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[TMP11:%.*]] = icmp ne i32 [[TMP10]], 0 // CHECK-64-NEXT: br i1 [[TMP11]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-64: .omp.final.then: // CHECK-64-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-64-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-64: .omp.final.done: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l66 // CHECK-64-SAME: () #[[ATTR0]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-64: user_code.entry: // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-64-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 // CHECK-64-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4 // CHECK-64-NEXT: call void @__omp_outlined__31(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR2]] // CHECK-64-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-64-NEXT: ret void // CHECK-64: worker.exit: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@__omp_outlined__31 // CHECK-64-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[B:%.*]] = alloca [3 x i32], align 4 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x i8*], align 8 // CHECK-64-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 // CHECK-64-NEXT: [[TMP0:%.*]] = bitcast [3 x i32]* [[B]] to i8* // CHECK-64-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([3 x i32]* @"__const..b" to i8*), i64 12, i1 false) // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block() // CHECK-64-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 // CHECK-64-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 // CHECK-64-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-64: cond.true: // CHECK-64-NEXT: br label [[COND_END:%.*]] // CHECK-64: cond.false: // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: br label [[COND_END]] // CHECK-64: cond.end: // CHECK-64-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] // CHECK-64-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-64: omp.inner.for.cond: // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP198:![0-9]+]] // CHECK-64-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP6]], 10 // CHECK-64-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-64: omp.inner.for.body: // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP198]] // CHECK-64-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 // CHECK-64-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP198]] // CHECK-64-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 // CHECK-64-NEXT: [[TMP11:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0 // CHECK-64-NEXT: [[TMP12:%.*]] = inttoptr i64 [[TMP8]] to i8* // CHECK-64-NEXT: store i8* [[TMP12]], i8** [[TMP11]], align 8, !llvm.access.group [[ACC_GRP198]] // CHECK-64-NEXT: [[TMP13:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1 // CHECK-64-NEXT: [[TMP14:%.*]] = inttoptr i64 [[TMP10]] to i8* // CHECK-64-NEXT: store i8* [[TMP14]], i8** [[TMP13]], align 8, !llvm.access.group [[ACC_GRP198]] // CHECK-64-NEXT: [[TMP15:%.*]] = bitcast [2 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-64-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i64, i64)* @__omp_outlined__32 to i8*), i8* null, i8** [[TMP15]], i64 2), !llvm.access.group [[ACC_GRP198]] // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-64: omp.inner.for.inc: // CHECK-64-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP198]] // CHECK-64-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP198]] // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP16]], [[TMP17]] // CHECK-64-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP198]] // CHECK-64-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP198]] // CHECK-64-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP198]] // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] // CHECK-64-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP198]] // CHECK-64-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP198]] // CHECK-64-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP198]] // CHECK-64-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] // CHECK-64-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP198]] // CHECK-64-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP198]] // CHECK-64-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP22]], 9 // CHECK-64-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]] // CHECK-64: cond.true5: // CHECK-64-NEXT: br label [[COND_END7:%.*]] // CHECK-64: cond.false6: // CHECK-64-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP198]] // CHECK-64-NEXT: br label [[COND_END7]] // CHECK-64: cond.end7: // CHECK-64-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP23]], [[COND_FALSE6]] ] // CHECK-64-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP198]] // CHECK-64-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP198]] // CHECK-64-NEXT: store i32 [[TMP24]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP198]] // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP199:![0-9]+]] // CHECK-64: omp.inner.for.end: // CHECK-64-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-64: omp.loop.exit: // CHECK-64-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]]) // CHECK-64-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0 // CHECK-64-NEXT: br i1 [[TMP26]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-64: .omp.final.then: // CHECK-64-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-64-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-64: .omp.final.done: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@__omp_outlined__32 // CHECK-64-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 // CHECK-64-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 // CHECK-64-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 // CHECK-64-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 // CHECK-64-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 // CHECK-64-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 // CHECK-64-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 9 // CHECK-64-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-64: cond.true: // CHECK-64-NEXT: br label [[COND_END:%.*]] // CHECK-64: cond.false: // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: br label [[COND_END]] // CHECK-64: cond.end: // CHECK-64-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] // CHECK-64-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-64: omp.inner.for.cond: // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP201:![0-9]+]] // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP201]] // CHECK-64-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] // CHECK-64-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-64: omp.inner.for.body: // CHECK-64-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP201]] // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-64-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP201]] // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-64: omp.body.continue: // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-64: omp.inner.for.inc: // CHECK-64-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP201]] // CHECK-64-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 // CHECK-64-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP201]] // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP202:![0-9]+]] // CHECK-64: omp.inner.for.end: // CHECK-64-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-64: omp.loop.exit: // CHECK-64-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]]) // CHECK-64-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0 // CHECK-64-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-64: .omp.final.then: // CHECK-64-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-64-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-64: .omp.final.done: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l73 // CHECK-64-SAME: () #[[ATTR0]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 1, i1 true) // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-64: user_code.entry: // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-64-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 // CHECK-64-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4 // CHECK-64-NEXT: call void @__omp_outlined__33(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR2]] // CHECK-64-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 1) // CHECK-64-NEXT: ret void // CHECK-64: worker.exit: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@__omp_outlined__33 // CHECK-64-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x i8*], align 8 // CHECK-64-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 // CHECK-64-NEXT: [[C:%.*]] = call align 8 i8* @__kmpc_alloc_shared(i64 8) // CHECK-64-NEXT: [[C_ON_STACK:%.*]] = bitcast i8* [[C]] to i32** // CHECK-64-NEXT: [[B:%.*]] = call align 8 i8* @__kmpc_alloc_shared(i64 4) // CHECK-64-NEXT: [[B_ON_STACK:%.*]] = bitcast i8* [[B]] to i32* // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-64-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-64-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-64: cond.true: // CHECK-64-NEXT: br label [[COND_END:%.*]] // CHECK-64: cond.false: // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: br label [[COND_END]] // CHECK-64: cond.end: // CHECK-64-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-64-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-64: omp.inner.for.cond: // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP204:![0-9]+]] // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP204]] // CHECK-64-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] // CHECK-64-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-64: omp.inner.for.body: // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP204]] // CHECK-64-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 // CHECK-64-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP204]] // CHECK-64-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 // CHECK-64-NEXT: [[TMP11:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0 // CHECK-64-NEXT: [[TMP12:%.*]] = inttoptr i64 [[TMP8]] to i8* // CHECK-64-NEXT: store i8* [[TMP12]], i8** [[TMP11]], align 8, !llvm.access.group [[ACC_GRP204]] // CHECK-64-NEXT: [[TMP13:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1 // CHECK-64-NEXT: [[TMP14:%.*]] = inttoptr i64 [[TMP10]] to i8* // CHECK-64-NEXT: store i8* [[TMP14]], i8** [[TMP13]], align 8, !llvm.access.group [[ACC_GRP204]] // CHECK-64-NEXT: [[TMP15:%.*]] = bitcast [2 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-64-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i64, i64)* @__omp_outlined__34 to i8*), i8* bitcast (void (i16, i32)* @__omp_outlined__34_wrapper to i8*), i8** [[TMP15]], i64 2), !llvm.access.group [[ACC_GRP204]] // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-64: omp.inner.for.inc: // CHECK-64-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP204]] // CHECK-64-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP204]] // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP16]], [[TMP17]] // CHECK-64-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP204]] // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP205:![0-9]+]] // CHECK-64: omp.inner.for.end: // CHECK-64-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-64: omp.loop.exit: // CHECK-64-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) // CHECK-64-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0 // CHECK-64-NEXT: br i1 [[TMP19]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-64: .omp.final.then: // CHECK-64-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-64-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-64: .omp.final.done: // CHECK-64-NEXT: store i32* [[B_ON_STACK]], i32** [[C_ON_STACK]], align 8 // CHECK-64-NEXT: call void @__kmpc_free_shared(i8* [[B]], i64 4) // CHECK-64-NEXT: call void @__kmpc_free_shared(i8* [[C]], i64 8) // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@__omp_outlined__34 // CHECK-64-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 // CHECK-64-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 // CHECK-64-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 // CHECK-64-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 // CHECK-64-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 // CHECK-64-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 // CHECK-64-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP3]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-64: omp.inner.for.cond: // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP207:![0-9]+]] // CHECK-64-NEXT: [[CONV2:%.*]] = sext i32 [[TMP5]] to i64 // CHECK-64-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8, !llvm.access.group [[ACC_GRP207]] // CHECK-64-NEXT: [[CMP:%.*]] = icmp ule i64 [[CONV2]], [[TMP6]] // CHECK-64-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-64: omp.inner.for.body: // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP207]] // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-64-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP207]] // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-64: omp.body.continue: // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-64: omp.inner.for.inc: // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP207]] // CHECK-64-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP207]] // CHECK-64-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP8]], [[TMP9]] // CHECK-64-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP207]] // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP208:![0-9]+]] // CHECK-64: omp.inner.for.end: // CHECK-64-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-64: omp.loop.exit: // CHECK-64-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]]) // CHECK-64-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[TMP11:%.*]] = icmp ne i32 [[TMP10]], 0 // CHECK-64-NEXT: br i1 [[TMP11]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-64: .omp.final.then: // CHECK-64-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-64-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-64: .omp.final.done: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@__omp_outlined__34_wrapper // CHECK-64-SAME: (i16 noundef zeroext [[TMP0:%.*]], i32 noundef [[TMP1:%.*]]) #[[ATTR7:[0-9]+]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTADDR:%.*]] = alloca i16, align 2 // CHECK-64-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[GLOBAL_ARGS:%.*]] = alloca i8**, align 8 // CHECK-64-NEXT: store i16 [[TMP0]], i16* [[DOTADDR]], align 2 // CHECK-64-NEXT: store i32 [[TMP1]], i32* [[DOTADDR1]], align 4 // CHECK-64-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 // CHECK-64-NEXT: call void @__kmpc_get_shared_variables(i8*** [[GLOBAL_ARGS]]) // CHECK-64-NEXT: [[TMP2:%.*]] = load i8**, i8*** [[GLOBAL_ARGS]], align 8 // CHECK-64-NEXT: [[TMP3:%.*]] = getelementptr inbounds i8*, i8** [[TMP2]], i64 0 // CHECK-64-NEXT: [[TMP4:%.*]] = bitcast i8** [[TMP3]] to i64* // CHECK-64-NEXT: [[TMP5:%.*]] = load i64, i64* [[TMP4]], align 8 // CHECK-64-NEXT: [[TMP6:%.*]] = getelementptr inbounds i8*, i8** [[TMP2]], i64 1 // CHECK-64-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64* // CHECK-64-NEXT: [[TMP8:%.*]] = load i64, i64* [[TMP7]], align 8 // CHECK-64-NEXT: call void @__omp_outlined__34(i32* [[DOTADDR1]], i32* [[DOTZERO_ADDR]], i64 [[TMP5]], i64 [[TMP8]]) #[[ATTR2]] // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l81 // CHECK-64-SAME: () #[[ATTR0]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-64: user_code.entry: // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-64-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 // CHECK-64-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4 // CHECK-64-NEXT: call void @__omp_outlined__35(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR2]] // CHECK-64-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-64-NEXT: ret void // CHECK-64: worker.exit: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@__omp_outlined__35 // CHECK-64-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x i8*], align 8 // CHECK-64-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block() // CHECK-64-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-64-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-64-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-64: cond.true: // CHECK-64-NEXT: br label [[COND_END:%.*]] // CHECK-64: cond.false: // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: br label [[COND_END]] // CHECK-64: cond.end: // CHECK-64-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-64-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-64: omp.inner.for.cond: // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP210:![0-9]+]] // CHECK-64-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10 // CHECK-64-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-64: omp.inner.for.body: // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP210]] // CHECK-64-NEXT: [[TMP7:%.*]] = zext i32 [[TMP6]] to i64 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP210]] // CHECK-64-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 // CHECK-64-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0 // CHECK-64-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP7]] to i8* // CHECK-64-NEXT: store i8* [[TMP11]], i8** [[TMP10]], align 8, !llvm.access.group [[ACC_GRP210]] // CHECK-64-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1 // CHECK-64-NEXT: [[TMP13:%.*]] = inttoptr i64 [[TMP9]] to i8* // CHECK-64-NEXT: store i8* [[TMP13]], i8** [[TMP12]], align 8, !llvm.access.group [[ACC_GRP210]] // CHECK-64-NEXT: [[TMP14:%.*]] = bitcast [2 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-64-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i64, i64)* @__omp_outlined__36 to i8*), i8* null, i8** [[TMP14]], i64 2), !llvm.access.group [[ACC_GRP210]] // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-64: omp.inner.for.inc: // CHECK-64-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP210]] // CHECK-64-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP210]] // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] // CHECK-64-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP210]] // CHECK-64-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP210]] // CHECK-64-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP210]] // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] // CHECK-64-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP210]] // CHECK-64-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP210]] // CHECK-64-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP210]] // CHECK-64-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] // CHECK-64-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP210]] // CHECK-64-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP210]] // CHECK-64-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP21]], 9 // CHECK-64-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]] // CHECK-64: cond.true5: // CHECK-64-NEXT: br label [[COND_END7:%.*]] // CHECK-64: cond.false6: // CHECK-64-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP210]] // CHECK-64-NEXT: br label [[COND_END7]] // CHECK-64: cond.end7: // CHECK-64-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP22]], [[COND_FALSE6]] ] // CHECK-64-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP210]] // CHECK-64-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP210]] // CHECK-64-NEXT: store i32 [[TMP23]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP210]] // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP211:![0-9]+]] // CHECK-64: omp.inner.for.end: // CHECK-64-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-64: omp.loop.exit: // CHECK-64-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) // CHECK-64-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0 // CHECK-64-NEXT: br i1 [[TMP25]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-64: .omp.final.then: // CHECK-64-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-64-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-64: .omp.final.done: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@__omp_outlined__36 // CHECK-64-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 // CHECK-64-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 // CHECK-64-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 // CHECK-64-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 // CHECK-64-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 // CHECK-64-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 // CHECK-64-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 1073741862, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1) // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-64: omp.dispatch.cond: // CHECK-64-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-64-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0 // CHECK-64-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-64: omp.dispatch.body: // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-64: omp.inner.for.cond: // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP213:![0-9]+]] // CHECK-64-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP213]] // CHECK-64-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] // CHECK-64-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-64: omp.inner.for.body: // CHECK-64-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP213]] // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-64-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP213]] // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-64: omp.body.continue: // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-64: omp.inner.for.inc: // CHECK-64-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP213]] // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP11]], 1 // CHECK-64-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP213]] // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP214:![0-9]+]] // CHECK-64: omp.inner.for.end: // CHECK-64-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-64: omp.dispatch.inc: // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-64: omp.dispatch.end: // CHECK-64-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0 // CHECK-64-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-64: .omp.final.then: // CHECK-64-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-64-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-64: .omp.final.done: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l85 // CHECK-64-SAME: () #[[ATTR0]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-64: user_code.entry: // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-64-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 // CHECK-64-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4 // CHECK-64-NEXT: call void @__omp_outlined__37(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR2]] // CHECK-64-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-64-NEXT: ret void // CHECK-64: worker.exit: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@__omp_outlined__37 // CHECK-64-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x i8*], align 8 // CHECK-64-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block() // CHECK-64-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-64-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-64-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-64: cond.true: // CHECK-64-NEXT: br label [[COND_END:%.*]] // CHECK-64: cond.false: // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: br label [[COND_END]] // CHECK-64: cond.end: // CHECK-64-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-64-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-64: omp.inner.for.cond: // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP216:![0-9]+]] // CHECK-64-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10 // CHECK-64-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-64: omp.inner.for.body: // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP216]] // CHECK-64-NEXT: [[TMP7:%.*]] = zext i32 [[TMP6]] to i64 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP216]] // CHECK-64-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 // CHECK-64-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0 // CHECK-64-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP7]] to i8* // CHECK-64-NEXT: store i8* [[TMP11]], i8** [[TMP10]], align 8, !llvm.access.group [[ACC_GRP216]] // CHECK-64-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1 // CHECK-64-NEXT: [[TMP13:%.*]] = inttoptr i64 [[TMP9]] to i8* // CHECK-64-NEXT: store i8* [[TMP13]], i8** [[TMP12]], align 8, !llvm.access.group [[ACC_GRP216]] // CHECK-64-NEXT: [[TMP14:%.*]] = bitcast [2 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-64-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i64, i64)* @__omp_outlined__38 to i8*), i8* null, i8** [[TMP14]], i64 2), !llvm.access.group [[ACC_GRP216]] // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-64: omp.inner.for.inc: // CHECK-64-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP216]] // CHECK-64-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP216]] // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] // CHECK-64-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP216]] // CHECK-64-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP216]] // CHECK-64-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP216]] // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] // CHECK-64-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP216]] // CHECK-64-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP216]] // CHECK-64-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP216]] // CHECK-64-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] // CHECK-64-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP216]] // CHECK-64-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP216]] // CHECK-64-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP21]], 9 // CHECK-64-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]] // CHECK-64: cond.true5: // CHECK-64-NEXT: br label [[COND_END7:%.*]] // CHECK-64: cond.false6: // CHECK-64-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP216]] // CHECK-64-NEXT: br label [[COND_END7]] // CHECK-64: cond.end7: // CHECK-64-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP22]], [[COND_FALSE6]] ] // CHECK-64-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP216]] // CHECK-64-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP216]] // CHECK-64-NEXT: store i32 [[TMP23]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP216]] // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP217:![0-9]+]] // CHECK-64: omp.inner.for.end: // CHECK-64-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-64: omp.loop.exit: // CHECK-64-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) // CHECK-64-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0 // CHECK-64-NEXT: br i1 [[TMP25]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-64: .omp.final.then: // CHECK-64-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-64-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-64: .omp.final.done: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@__omp_outlined__38 // CHECK-64-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 // CHECK-64-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 // CHECK-64-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 // CHECK-64-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 // CHECK-64-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 // CHECK-64-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 // CHECK-64-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 1073741861, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1) // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-64: omp.dispatch.cond: // CHECK-64-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-64-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0 // CHECK-64-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-64: omp.dispatch.body: // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-64: omp.inner.for.cond: // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP219:![0-9]+]] // CHECK-64-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP219]] // CHECK-64-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] // CHECK-64-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-64: omp.inner.for.body: // CHECK-64-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP219]] // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-64-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP219]] // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-64: omp.body.continue: // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-64: omp.inner.for.inc: // CHECK-64-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP219]] // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP11]], 1 // CHECK-64-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP219]] // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP220:![0-9]+]] // CHECK-64: omp.inner.for.end: // CHECK-64-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-64: omp.dispatch.inc: // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-64: omp.dispatch.end: // CHECK-64-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0 // CHECK-64-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-64: .omp.final.then: // CHECK-64-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-64-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-64: .omp.final.done: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l89 // CHECK-64-SAME: () #[[ATTR0]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-64: user_code.entry: // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-64-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 // CHECK-64-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4 // CHECK-64-NEXT: call void @__omp_outlined__39(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR2]] // CHECK-64-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-64-NEXT: ret void // CHECK-64: worker.exit: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@__omp_outlined__39 // CHECK-64-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x i8*], align 8 // CHECK-64-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block() // CHECK-64-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-64-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-64-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-64: cond.true: // CHECK-64-NEXT: br label [[COND_END:%.*]] // CHECK-64: cond.false: // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: br label [[COND_END]] // CHECK-64: cond.end: // CHECK-64-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-64-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-64: omp.inner.for.cond: // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP222:![0-9]+]] // CHECK-64-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10 // CHECK-64-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-64: omp.inner.for.body: // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP222]] // CHECK-64-NEXT: [[TMP7:%.*]] = zext i32 [[TMP6]] to i64 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP222]] // CHECK-64-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 // CHECK-64-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0 // CHECK-64-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP7]] to i8* // CHECK-64-NEXT: store i8* [[TMP11]], i8** [[TMP10]], align 8, !llvm.access.group [[ACC_GRP222]] // CHECK-64-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1 // CHECK-64-NEXT: [[TMP13:%.*]] = inttoptr i64 [[TMP9]] to i8* // CHECK-64-NEXT: store i8* [[TMP13]], i8** [[TMP12]], align 8, !llvm.access.group [[ACC_GRP222]] // CHECK-64-NEXT: [[TMP14:%.*]] = bitcast [2 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-64-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i64, i64)* @__omp_outlined__40 to i8*), i8* null, i8** [[TMP14]], i64 2), !llvm.access.group [[ACC_GRP222]] // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-64: omp.inner.for.inc: // CHECK-64-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP222]] // CHECK-64-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP222]] // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] // CHECK-64-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP222]] // CHECK-64-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP222]] // CHECK-64-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP222]] // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] // CHECK-64-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP222]] // CHECK-64-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP222]] // CHECK-64-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP222]] // CHECK-64-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] // CHECK-64-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP222]] // CHECK-64-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP222]] // CHECK-64-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP21]], 9 // CHECK-64-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]] // CHECK-64: cond.true5: // CHECK-64-NEXT: br label [[COND_END7:%.*]] // CHECK-64: cond.false6: // CHECK-64-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP222]] // CHECK-64-NEXT: br label [[COND_END7]] // CHECK-64: cond.end7: // CHECK-64-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP22]], [[COND_FALSE6]] ] // CHECK-64-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP222]] // CHECK-64-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP222]] // CHECK-64-NEXT: store i32 [[TMP23]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP222]] // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP223:![0-9]+]] // CHECK-64: omp.inner.for.end: // CHECK-64-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-64: omp.loop.exit: // CHECK-64-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) // CHECK-64-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0 // CHECK-64-NEXT: br i1 [[TMP25]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-64: .omp.final.then: // CHECK-64-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-64-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-64: .omp.final.done: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@__omp_outlined__40 // CHECK-64-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 // CHECK-64-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 // CHECK-64-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 // CHECK-64-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 // CHECK-64-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 // CHECK-64-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 // CHECK-64-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 1073741859, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1) // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-64: omp.dispatch.cond: // CHECK-64-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-64-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0 // CHECK-64-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-64: omp.dispatch.body: // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-64: omp.inner.for.cond: // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP225:![0-9]+]] // CHECK-64-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP225]] // CHECK-64-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] // CHECK-64-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-64: omp.inner.for.body: // CHECK-64-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP225]] // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-64-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP225]] // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-64: omp.body.continue: // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-64: omp.inner.for.inc: // CHECK-64-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP225]] // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP11]], 1 // CHECK-64-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP225]] // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP226:![0-9]+]] // CHECK-64: omp.inner.for.end: // CHECK-64-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-64: omp.dispatch.inc: // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-64: omp.dispatch.end: // CHECK-64-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0 // CHECK-64-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-64: .omp.final.then: // CHECK-64-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-64-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-64: .omp.final.done: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l93 // CHECK-64-SAME: () #[[ATTR0]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-64: user_code.entry: // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-64-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 // CHECK-64-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4 // CHECK-64-NEXT: call void @__omp_outlined__41(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR2]] // CHECK-64-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-64-NEXT: ret void // CHECK-64: worker.exit: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@__omp_outlined__41 // CHECK-64-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x i8*], align 8 // CHECK-64-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block() // CHECK-64-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-64-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-64-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-64: cond.true: // CHECK-64-NEXT: br label [[COND_END:%.*]] // CHECK-64: cond.false: // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: br label [[COND_END]] // CHECK-64: cond.end: // CHECK-64-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-64-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-64: omp.inner.for.cond: // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP228:![0-9]+]] // CHECK-64-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10 // CHECK-64-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-64: omp.inner.for.body: // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP228]] // CHECK-64-NEXT: [[TMP7:%.*]] = zext i32 [[TMP6]] to i64 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP228]] // CHECK-64-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 // CHECK-64-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0 // CHECK-64-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP7]] to i8* // CHECK-64-NEXT: store i8* [[TMP11]], i8** [[TMP10]], align 8, !llvm.access.group [[ACC_GRP228]] // CHECK-64-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1 // CHECK-64-NEXT: [[TMP13:%.*]] = inttoptr i64 [[TMP9]] to i8* // CHECK-64-NEXT: store i8* [[TMP13]], i8** [[TMP12]], align 8, !llvm.access.group [[ACC_GRP228]] // CHECK-64-NEXT: [[TMP14:%.*]] = bitcast [2 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-64-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i64, i64)* @__omp_outlined__42 to i8*), i8* null, i8** [[TMP14]], i64 2), !llvm.access.group [[ACC_GRP228]] // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-64: omp.inner.for.inc: // CHECK-64-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP228]] // CHECK-64-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP228]] // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] // CHECK-64-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP228]] // CHECK-64-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP228]] // CHECK-64-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP228]] // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] // CHECK-64-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP228]] // CHECK-64-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP228]] // CHECK-64-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP228]] // CHECK-64-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] // CHECK-64-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP228]] // CHECK-64-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP228]] // CHECK-64-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP21]], 9 // CHECK-64-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]] // CHECK-64: cond.true5: // CHECK-64-NEXT: br label [[COND_END7:%.*]] // CHECK-64: cond.false6: // CHECK-64-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP228]] // CHECK-64-NEXT: br label [[COND_END7]] // CHECK-64: cond.end7: // CHECK-64-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP22]], [[COND_FALSE6]] ] // CHECK-64-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP228]] // CHECK-64-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP228]] // CHECK-64-NEXT: store i32 [[TMP23]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP228]] // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP229:![0-9]+]] // CHECK-64: omp.inner.for.end: // CHECK-64-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-64: omp.loop.exit: // CHECK-64-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) // CHECK-64-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0 // CHECK-64-NEXT: br i1 [[TMP25]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-64: .omp.final.then: // CHECK-64-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-64-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-64: .omp.final.done: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@__omp_outlined__42 // CHECK-64-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 // CHECK-64-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 // CHECK-64-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 // CHECK-64-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 // CHECK-64-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 // CHECK-64-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 // CHECK-64-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 1073741860, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1) // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-64: omp.dispatch.cond: // CHECK-64-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-64-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0 // CHECK-64-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-64: omp.dispatch.body: // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-64: omp.inner.for.cond: // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP231:![0-9]+]] // CHECK-64-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP231]] // CHECK-64-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] // CHECK-64-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-64: omp.inner.for.body: // CHECK-64-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP231]] // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-64-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP231]] // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-64: omp.body.continue: // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-64: omp.inner.for.inc: // CHECK-64-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP231]] // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP11]], 1 // CHECK-64-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP231]] // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP232:![0-9]+]] // CHECK-64: omp.inner.for.end: // CHECK-64-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-64: omp.dispatch.inc: // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-64: omp.dispatch.end: // CHECK-64-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0 // CHECK-64-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-64: .omp.final.then: // CHECK-64-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-64-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-64: .omp.final.done: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l97 // CHECK-64-SAME: () #[[ATTR0]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-64: user_code.entry: // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-64-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 // CHECK-64-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4 // CHECK-64-NEXT: call void @__omp_outlined__43(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR2]] // CHECK-64-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-64-NEXT: ret void // CHECK-64: worker.exit: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@__omp_outlined__43 // CHECK-64-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x i8*], align 8 // CHECK-64-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block() // CHECK-64-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-64-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-64-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-64: cond.true: // CHECK-64-NEXT: br label [[COND_END:%.*]] // CHECK-64: cond.false: // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: br label [[COND_END]] // CHECK-64: cond.end: // CHECK-64-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-64-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-64: omp.inner.for.cond: // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10 // CHECK-64-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-64: omp.inner.for.body: // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: [[TMP7:%.*]] = zext i32 [[TMP6]] to i64 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 // CHECK-64-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0 // CHECK-64-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP7]] to i8* // CHECK-64-NEXT: store i8* [[TMP11]], i8** [[TMP10]], align 8 // CHECK-64-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1 // CHECK-64-NEXT: [[TMP13:%.*]] = inttoptr i64 [[TMP9]] to i8* // CHECK-64-NEXT: store i8* [[TMP13]], i8** [[TMP12]], align 8 // CHECK-64-NEXT: [[TMP14:%.*]] = bitcast [2 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-64-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i64, i64)* @__omp_outlined__44 to i8*), i8* null, i8** [[TMP14]], i64 2) // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-64: omp.inner.for.inc: // CHECK-64-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] // CHECK-64-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] // CHECK-64-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] // CHECK-64-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP21]], 9 // CHECK-64-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]] // CHECK-64: cond.true5: // CHECK-64-NEXT: br label [[COND_END7:%.*]] // CHECK-64: cond.false6: // CHECK-64-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: br label [[COND_END7]] // CHECK-64: cond.end7: // CHECK-64-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP22]], [[COND_FALSE6]] ] // CHECK-64-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP23]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK-64: omp.inner.for.end: // CHECK-64-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-64: omp.loop.exit: // CHECK-64-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@__omp_outlined__44 // CHECK-64-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 // CHECK-64-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 // CHECK-64-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 // CHECK-64-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 // CHECK-64-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 // CHECK-64-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 // CHECK-64-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP3]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-64: omp.inner.for.cond: // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[CONV2:%.*]] = sext i32 [[TMP5]] to i64 // CHECK-64-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 // CHECK-64-NEXT: [[CMP:%.*]] = icmp ule i64 [[CONV2]], [[TMP6]] // CHECK-64-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-64: omp.inner.for.body: // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-64-NEXT: store i32 [[ADD]], i32* [[I]], align 4 // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-64: omp.body.continue: // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-64: omp.inner.for.inc: // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP8]], [[TMP9]] // CHECK-64-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK-64: omp.inner.for.end: // CHECK-64-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-64: omp.loop.exit: // CHECK-64-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]]) // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l101 // CHECK-64-SAME: () #[[ATTR0]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-64: user_code.entry: // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-64-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 // CHECK-64-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4 // CHECK-64-NEXT: call void @__omp_outlined__45(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR2]] // CHECK-64-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-64-NEXT: ret void // CHECK-64: worker.exit: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@__omp_outlined__45 // CHECK-64-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x i8*], align 8 // CHECK-64-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block() // CHECK-64-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-64-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-64-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-64: cond.true: // CHECK-64-NEXT: br label [[COND_END:%.*]] // CHECK-64: cond.false: // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: br label [[COND_END]] // CHECK-64: cond.end: // CHECK-64-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-64-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-64: omp.inner.for.cond: // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10 // CHECK-64-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-64: omp.inner.for.body: // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: [[TMP7:%.*]] = zext i32 [[TMP6]] to i64 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 // CHECK-64-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0 // CHECK-64-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP7]] to i8* // CHECK-64-NEXT: store i8* [[TMP11]], i8** [[TMP10]], align 8 // CHECK-64-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1 // CHECK-64-NEXT: [[TMP13:%.*]] = inttoptr i64 [[TMP9]] to i8* // CHECK-64-NEXT: store i8* [[TMP13]], i8** [[TMP12]], align 8 // CHECK-64-NEXT: [[TMP14:%.*]] = bitcast [2 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-64-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i64, i64)* @__omp_outlined__46 to i8*), i8* null, i8** [[TMP14]], i64 2) // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-64: omp.inner.for.inc: // CHECK-64-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] // CHECK-64-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] // CHECK-64-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] // CHECK-64-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP21]], 9 // CHECK-64-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]] // CHECK-64: cond.true5: // CHECK-64-NEXT: br label [[COND_END7:%.*]] // CHECK-64: cond.false6: // CHECK-64-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: br label [[COND_END7]] // CHECK-64: cond.end7: // CHECK-64-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP22]], [[COND_FALSE6]] ] // CHECK-64-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP23]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK-64: omp.inner.for.end: // CHECK-64-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-64: omp.loop.exit: // CHECK-64-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@__omp_outlined__46 // CHECK-64-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 // CHECK-64-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 // CHECK-64-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 // CHECK-64-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 // CHECK-64-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 // CHECK-64-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 // CHECK-64-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 9 // CHECK-64-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-64: cond.true: // CHECK-64-NEXT: br label [[COND_END:%.*]] // CHECK-64: cond.false: // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: br label [[COND_END]] // CHECK-64: cond.end: // CHECK-64-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] // CHECK-64-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-64: omp.inner.for.cond: // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] // CHECK-64-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-64: omp.inner.for.body: // CHECK-64-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-64-NEXT: store i32 [[ADD]], i32* [[I]], align 4 // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-64: omp.body.continue: // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-64: omp.inner.for.inc: // CHECK-64-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 // CHECK-64-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK-64: omp.inner.for.end: // CHECK-64-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-64: omp.loop.exit: // CHECK-64-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]]) // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l105 // CHECK-64-SAME: () #[[ATTR0]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-64: user_code.entry: // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-64-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 // CHECK-64-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4 // CHECK-64-NEXT: call void @__omp_outlined__47(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR2]] // CHECK-64-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-64-NEXT: ret void // CHECK-64: worker.exit: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@__omp_outlined__47 // CHECK-64-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x i8*], align 8 // CHECK-64-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block() // CHECK-64-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-64-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-64-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-64: cond.true: // CHECK-64-NEXT: br label [[COND_END:%.*]] // CHECK-64: cond.false: // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: br label [[COND_END]] // CHECK-64: cond.end: // CHECK-64-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-64-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-64: omp.inner.for.cond: // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10 // CHECK-64-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-64: omp.inner.for.body: // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: [[TMP7:%.*]] = zext i32 [[TMP6]] to i64 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 // CHECK-64-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0 // CHECK-64-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP7]] to i8* // CHECK-64-NEXT: store i8* [[TMP11]], i8** [[TMP10]], align 8 // CHECK-64-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1 // CHECK-64-NEXT: [[TMP13:%.*]] = inttoptr i64 [[TMP9]] to i8* // CHECK-64-NEXT: store i8* [[TMP13]], i8** [[TMP12]], align 8 // CHECK-64-NEXT: [[TMP14:%.*]] = bitcast [2 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-64-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i64, i64)* @__omp_outlined__48 to i8*), i8* null, i8** [[TMP14]], i64 2) // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-64: omp.inner.for.inc: // CHECK-64-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] // CHECK-64-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] // CHECK-64-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] // CHECK-64-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP21]], 9 // CHECK-64-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]] // CHECK-64: cond.true5: // CHECK-64-NEXT: br label [[COND_END7:%.*]] // CHECK-64: cond.false6: // CHECK-64-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: br label [[COND_END7]] // CHECK-64: cond.end7: // CHECK-64-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP22]], [[COND_FALSE6]] ] // CHECK-64-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP23]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK-64: omp.inner.for.end: // CHECK-64-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-64: omp.loop.exit: // CHECK-64-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@__omp_outlined__48 // CHECK-64-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 // CHECK-64-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 // CHECK-64-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 // CHECK-64-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 // CHECK-64-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 // CHECK-64-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 // CHECK-64-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP3]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-64: omp.inner.for.cond: // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[CONV2:%.*]] = sext i32 [[TMP5]] to i64 // CHECK-64-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 // CHECK-64-NEXT: [[CMP:%.*]] = icmp ule i64 [[CONV2]], [[TMP6]] // CHECK-64-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-64: omp.inner.for.body: // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-64-NEXT: store i32 [[ADD]], i32* [[I]], align 4 // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-64: omp.body.continue: // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-64: omp.inner.for.inc: // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP8]], [[TMP9]] // CHECK-64-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK-64: omp.inner.for.end: // CHECK-64-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-64: omp.loop.exit: // CHECK-64-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]]) // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l109 // CHECK-64-SAME: () #[[ATTR0]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-64: user_code.entry: // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-64-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 // CHECK-64-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4 // CHECK-64-NEXT: call void @__omp_outlined__49(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR2]] // CHECK-64-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-64-NEXT: ret void // CHECK-64: worker.exit: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@__omp_outlined__49 // CHECK-64-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x i8*], align 8 // CHECK-64-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block() // CHECK-64-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-64-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-64-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-64: cond.true: // CHECK-64-NEXT: br label [[COND_END:%.*]] // CHECK-64: cond.false: // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: br label [[COND_END]] // CHECK-64: cond.end: // CHECK-64-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-64-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-64: omp.inner.for.cond: // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10 // CHECK-64-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-64: omp.inner.for.body: // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: [[TMP7:%.*]] = zext i32 [[TMP6]] to i64 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 // CHECK-64-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0 // CHECK-64-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP7]] to i8* // CHECK-64-NEXT: store i8* [[TMP11]], i8** [[TMP10]], align 8 // CHECK-64-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1 // CHECK-64-NEXT: [[TMP13:%.*]] = inttoptr i64 [[TMP9]] to i8* // CHECK-64-NEXT: store i8* [[TMP13]], i8** [[TMP12]], align 8 // CHECK-64-NEXT: [[TMP14:%.*]] = bitcast [2 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-64-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i64, i64)* @__omp_outlined__50 to i8*), i8* null, i8** [[TMP14]], i64 2) // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-64: omp.inner.for.inc: // CHECK-64-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] // CHECK-64-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] // CHECK-64-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] // CHECK-64-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP21]], 9 // CHECK-64-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]] // CHECK-64: cond.true5: // CHECK-64-NEXT: br label [[COND_END7:%.*]] // CHECK-64: cond.false6: // CHECK-64-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: br label [[COND_END7]] // CHECK-64: cond.end7: // CHECK-64-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP22]], [[COND_FALSE6]] ] // CHECK-64-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP23]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK-64: omp.inner.for.end: // CHECK-64-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-64: omp.loop.exit: // CHECK-64-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@__omp_outlined__50 // CHECK-64-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 // CHECK-64-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 // CHECK-64-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 // CHECK-64-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 // CHECK-64-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 // CHECK-64-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 // CHECK-64-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 1073741862, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1) // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-64: omp.dispatch.cond: // CHECK-64-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-64-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0 // CHECK-64-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-64: omp.dispatch.body: // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-64: omp.inner.for.cond: // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP234:![0-9]+]] // CHECK-64-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP234]] // CHECK-64-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] // CHECK-64-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-64: omp.inner.for.body: // CHECK-64-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP234]] // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-64-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP234]] // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-64: omp.body.continue: // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-64: omp.inner.for.inc: // CHECK-64-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP234]] // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP11]], 1 // CHECK-64-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP234]] // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP235:![0-9]+]] // CHECK-64: omp.inner.for.end: // CHECK-64-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-64: omp.dispatch.inc: // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-64: omp.dispatch.end: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l113 // CHECK-64-SAME: () #[[ATTR0]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-64: user_code.entry: // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-64-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 // CHECK-64-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4 // CHECK-64-NEXT: call void @__omp_outlined__51(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR2]] // CHECK-64-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-64-NEXT: ret void // CHECK-64: worker.exit: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@__omp_outlined__51 // CHECK-64-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x i8*], align 8 // CHECK-64-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block() // CHECK-64-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-64-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-64-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-64: cond.true: // CHECK-64-NEXT: br label [[COND_END:%.*]] // CHECK-64: cond.false: // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: br label [[COND_END]] // CHECK-64: cond.end: // CHECK-64-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-64-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-64: omp.inner.for.cond: // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10 // CHECK-64-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-64: omp.inner.for.body: // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: [[TMP7:%.*]] = zext i32 [[TMP6]] to i64 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 // CHECK-64-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0 // CHECK-64-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP7]] to i8* // CHECK-64-NEXT: store i8* [[TMP11]], i8** [[TMP10]], align 8 // CHECK-64-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1 // CHECK-64-NEXT: [[TMP13:%.*]] = inttoptr i64 [[TMP9]] to i8* // CHECK-64-NEXT: store i8* [[TMP13]], i8** [[TMP12]], align 8 // CHECK-64-NEXT: [[TMP14:%.*]] = bitcast [2 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-64-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i64, i64)* @__omp_outlined__52 to i8*), i8* null, i8** [[TMP14]], i64 2) // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-64: omp.inner.for.inc: // CHECK-64-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] // CHECK-64-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] // CHECK-64-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] // CHECK-64-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP21]], 9 // CHECK-64-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]] // CHECK-64: cond.true5: // CHECK-64-NEXT: br label [[COND_END7:%.*]] // CHECK-64: cond.false6: // CHECK-64-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: br label [[COND_END7]] // CHECK-64: cond.end7: // CHECK-64-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP22]], [[COND_FALSE6]] ] // CHECK-64-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP23]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK-64: omp.inner.for.end: // CHECK-64-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-64: omp.loop.exit: // CHECK-64-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@__omp_outlined__52 // CHECK-64-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 // CHECK-64-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 // CHECK-64-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 // CHECK-64-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 // CHECK-64-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 // CHECK-64-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 // CHECK-64-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 1073741861, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1) // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-64: omp.dispatch.cond: // CHECK-64-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-64-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0 // CHECK-64-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-64: omp.dispatch.body: // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-64: omp.inner.for.cond: // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP237:![0-9]+]] // CHECK-64-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP237]] // CHECK-64-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] // CHECK-64-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-64: omp.inner.for.body: // CHECK-64-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP237]] // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-64-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP237]] // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-64: omp.body.continue: // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-64: omp.inner.for.inc: // CHECK-64-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP237]] // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP11]], 1 // CHECK-64-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP237]] // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP238:![0-9]+]] // CHECK-64: omp.inner.for.end: // CHECK-64-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-64: omp.dispatch.inc: // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-64: omp.dispatch.end: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l117 // CHECK-64-SAME: () #[[ATTR0]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-64: user_code.entry: // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-64-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 // CHECK-64-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4 // CHECK-64-NEXT: call void @__omp_outlined__53(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR2]] // CHECK-64-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-64-NEXT: ret void // CHECK-64: worker.exit: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@__omp_outlined__53 // CHECK-64-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x i8*], align 8 // CHECK-64-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block() // CHECK-64-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-64-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-64-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-64: cond.true: // CHECK-64-NEXT: br label [[COND_END:%.*]] // CHECK-64: cond.false: // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: br label [[COND_END]] // CHECK-64: cond.end: // CHECK-64-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-64-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-64: omp.inner.for.cond: // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10 // CHECK-64-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-64: omp.inner.for.body: // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: [[TMP7:%.*]] = zext i32 [[TMP6]] to i64 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 // CHECK-64-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0 // CHECK-64-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP7]] to i8* // CHECK-64-NEXT: store i8* [[TMP11]], i8** [[TMP10]], align 8 // CHECK-64-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1 // CHECK-64-NEXT: [[TMP13:%.*]] = inttoptr i64 [[TMP9]] to i8* // CHECK-64-NEXT: store i8* [[TMP13]], i8** [[TMP12]], align 8 // CHECK-64-NEXT: [[TMP14:%.*]] = bitcast [2 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-64-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i64, i64)* @__omp_outlined__54 to i8*), i8* null, i8** [[TMP14]], i64 2) // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-64: omp.inner.for.inc: // CHECK-64-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] // CHECK-64-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] // CHECK-64-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] // CHECK-64-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP21]], 9 // CHECK-64-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]] // CHECK-64: cond.true5: // CHECK-64-NEXT: br label [[COND_END7:%.*]] // CHECK-64: cond.false6: // CHECK-64-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: br label [[COND_END7]] // CHECK-64: cond.end7: // CHECK-64-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP22]], [[COND_FALSE6]] ] // CHECK-64-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP23]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK-64: omp.inner.for.end: // CHECK-64-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-64: omp.loop.exit: // CHECK-64-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@__omp_outlined__54 // CHECK-64-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 // CHECK-64-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 // CHECK-64-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 // CHECK-64-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 // CHECK-64-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 // CHECK-64-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 // CHECK-64-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 1073741859, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1) // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-64: omp.dispatch.cond: // CHECK-64-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-64-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0 // CHECK-64-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-64: omp.dispatch.body: // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-64: omp.inner.for.cond: // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP240:![0-9]+]] // CHECK-64-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP240]] // CHECK-64-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] // CHECK-64-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-64: omp.inner.for.body: // CHECK-64-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP240]] // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-64-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP240]] // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-64: omp.body.continue: // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-64: omp.inner.for.inc: // CHECK-64-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP240]] // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP11]], 1 // CHECK-64-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP240]] // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP241:![0-9]+]] // CHECK-64: omp.inner.for.end: // CHECK-64-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-64: omp.dispatch.inc: // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-64: omp.dispatch.end: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l121 // CHECK-64-SAME: () #[[ATTR0]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-64: user_code.entry: // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-64-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 // CHECK-64-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4 // CHECK-64-NEXT: call void @__omp_outlined__55(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR2]] // CHECK-64-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-64-NEXT: ret void // CHECK-64: worker.exit: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@__omp_outlined__55 // CHECK-64-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x i8*], align 8 // CHECK-64-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block() // CHECK-64-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-64-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-64-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-64: cond.true: // CHECK-64-NEXT: br label [[COND_END:%.*]] // CHECK-64: cond.false: // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: br label [[COND_END]] // CHECK-64: cond.end: // CHECK-64-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-64-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-64: omp.inner.for.cond: // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10 // CHECK-64-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-64: omp.inner.for.body: // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: [[TMP7:%.*]] = zext i32 [[TMP6]] to i64 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 // CHECK-64-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0 // CHECK-64-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP7]] to i8* // CHECK-64-NEXT: store i8* [[TMP11]], i8** [[TMP10]], align 8 // CHECK-64-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1 // CHECK-64-NEXT: [[TMP13:%.*]] = inttoptr i64 [[TMP9]] to i8* // CHECK-64-NEXT: store i8* [[TMP13]], i8** [[TMP12]], align 8 // CHECK-64-NEXT: [[TMP14:%.*]] = bitcast [2 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-64-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i64, i64)* @__omp_outlined__56 to i8*), i8* null, i8** [[TMP14]], i64 2) // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-64: omp.inner.for.inc: // CHECK-64-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] // CHECK-64-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] // CHECK-64-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] // CHECK-64-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP21]], 9 // CHECK-64-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]] // CHECK-64: cond.true5: // CHECK-64-NEXT: br label [[COND_END7:%.*]] // CHECK-64: cond.false6: // CHECK-64-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: br label [[COND_END7]] // CHECK-64: cond.end7: // CHECK-64-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP22]], [[COND_FALSE6]] ] // CHECK-64-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP23]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK-64: omp.inner.for.end: // CHECK-64-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-64: omp.loop.exit: // CHECK-64-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@__omp_outlined__56 // CHECK-64-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 // CHECK-64-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 // CHECK-64-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 // CHECK-64-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 // CHECK-64-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 // CHECK-64-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 // CHECK-64-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 1073741860, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1) // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-64: omp.dispatch.cond: // CHECK-64-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-64-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0 // CHECK-64-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-64: omp.dispatch.body: // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-64: omp.inner.for.cond: // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP243:![0-9]+]] // CHECK-64-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP243]] // CHECK-64-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] // CHECK-64-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-64: omp.inner.for.body: // CHECK-64-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP243]] // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-64-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP243]] // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-64: omp.body.continue: // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-64: omp.inner.for.inc: // CHECK-64-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP243]] // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP11]], 1 // CHECK-64-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP243]] // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP244:![0-9]+]] // CHECK-64: omp.inner.for.end: // CHECK-64-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-64: omp.dispatch.inc: // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-64: omp.dispatch.end: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l125 // CHECK-64-SAME: () #[[ATTR0]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-64: user_code.entry: // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-64-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 // CHECK-64-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4 // CHECK-64-NEXT: call void @__omp_outlined__57(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR2]] // CHECK-64-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-64-NEXT: ret void // CHECK-64: worker.exit: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@__omp_outlined__57 // CHECK-64-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x i8*], align 8 // CHECK-64-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block() // CHECK-64-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-64-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-64-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-64: cond.true: // CHECK-64-NEXT: br label [[COND_END:%.*]] // CHECK-64: cond.false: // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: br label [[COND_END]] // CHECK-64: cond.end: // CHECK-64-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-64-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-64: omp.inner.for.cond: // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10 // CHECK-64-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-64: omp.inner.for.body: // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: [[TMP7:%.*]] = zext i32 [[TMP6]] to i64 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 // CHECK-64-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0 // CHECK-64-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP7]] to i8* // CHECK-64-NEXT: store i8* [[TMP11]], i8** [[TMP10]], align 8 // CHECK-64-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1 // CHECK-64-NEXT: [[TMP13:%.*]] = inttoptr i64 [[TMP9]] to i8* // CHECK-64-NEXT: store i8* [[TMP13]], i8** [[TMP12]], align 8 // CHECK-64-NEXT: [[TMP14:%.*]] = bitcast [2 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-64-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i64, i64)* @__omp_outlined__58 to i8*), i8* null, i8** [[TMP14]], i64 2) // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-64: omp.inner.for.inc: // CHECK-64-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] // CHECK-64-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] // CHECK-64-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] // CHECK-64-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP21]], 9 // CHECK-64-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]] // CHECK-64: cond.true5: // CHECK-64-NEXT: br label [[COND_END7:%.*]] // CHECK-64: cond.false6: // CHECK-64-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: br label [[COND_END7]] // CHECK-64: cond.end7: // CHECK-64-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP22]], [[COND_FALSE6]] ] // CHECK-64-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP23]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK-64: omp.inner.for.end: // CHECK-64-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-64: omp.loop.exit: // CHECK-64-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@__omp_outlined__58 // CHECK-64-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 // CHECK-64-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 // CHECK-64-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 // CHECK-64-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 // CHECK-64-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 // CHECK-64-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 // CHECK-64-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP3]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-64: omp.inner.for.cond: // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[CONV2:%.*]] = sext i32 [[TMP5]] to i64 // CHECK-64-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 // CHECK-64-NEXT: [[CMP:%.*]] = icmp ule i64 [[CONV2]], [[TMP6]] // CHECK-64-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-64: omp.inner.for.body: // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-64-NEXT: store i32 [[ADD]], i32* [[I]], align 4 // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-64: omp.body.continue: // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-64: omp.inner.for.inc: // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP8]], [[TMP9]] // CHECK-64-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK-64: omp.inner.for.end: // CHECK-64-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-64: omp.loop.exit: // CHECK-64-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]]) // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l130 // CHECK-64-SAME: () #[[ATTR0]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-64: user_code.entry: // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-64-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 // CHECK-64-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4 // CHECK-64-NEXT: call void @__omp_outlined__59(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR2]] // CHECK-64-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-64-NEXT: ret void // CHECK-64: worker.exit: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@__omp_outlined__59 // CHECK-64-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x i8*], align 8 // CHECK-64-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block() // CHECK-64-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-64-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-64-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-64: cond.true: // CHECK-64-NEXT: br label [[COND_END:%.*]] // CHECK-64: cond.false: // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: br label [[COND_END]] // CHECK-64: cond.end: // CHECK-64-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-64-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-64: omp.inner.for.cond: // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10 // CHECK-64-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-64: omp.inner.for.body: // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: [[TMP7:%.*]] = zext i32 [[TMP6]] to i64 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 // CHECK-64-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0 // CHECK-64-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP7]] to i8* // CHECK-64-NEXT: store i8* [[TMP11]], i8** [[TMP10]], align 8 // CHECK-64-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1 // CHECK-64-NEXT: [[TMP13:%.*]] = inttoptr i64 [[TMP9]] to i8* // CHECK-64-NEXT: store i8* [[TMP13]], i8** [[TMP12]], align 8 // CHECK-64-NEXT: [[TMP14:%.*]] = bitcast [2 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-64-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i64, i64)* @__omp_outlined__60 to i8*), i8* null, i8** [[TMP14]], i64 2) // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-64: omp.inner.for.inc: // CHECK-64-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] // CHECK-64-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] // CHECK-64-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] // CHECK-64-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP21]], 9 // CHECK-64-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]] // CHECK-64: cond.true5: // CHECK-64-NEXT: br label [[COND_END7:%.*]] // CHECK-64: cond.false6: // CHECK-64-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: br label [[COND_END7]] // CHECK-64: cond.end7: // CHECK-64-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP22]], [[COND_FALSE6]] ] // CHECK-64-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP23]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK-64: omp.inner.for.end: // CHECK-64-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-64: omp.loop.exit: // CHECK-64-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@__omp_outlined__60 // CHECK-64-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 // CHECK-64-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 // CHECK-64-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 // CHECK-64-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 // CHECK-64-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 // CHECK-64-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 // CHECK-64-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 9 // CHECK-64-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-64: cond.true: // CHECK-64-NEXT: br label [[COND_END:%.*]] // CHECK-64: cond.false: // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: br label [[COND_END]] // CHECK-64: cond.end: // CHECK-64-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] // CHECK-64-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-64: omp.inner.for.cond: // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] // CHECK-64-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-64: omp.inner.for.body: // CHECK-64-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-64-NEXT: store i32 [[ADD]], i32* [[I]], align 4 // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-64: omp.body.continue: // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-64: omp.inner.for.inc: // CHECK-64-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 // CHECK-64-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK-64: omp.inner.for.end: // CHECK-64-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-64: omp.loop.exit: // CHECK-64-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]]) // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l135 // CHECK-64-SAME: () #[[ATTR0]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-64: user_code.entry: // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-64-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 // CHECK-64-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4 // CHECK-64-NEXT: call void @__omp_outlined__61(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR2]] // CHECK-64-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-64-NEXT: ret void // CHECK-64: worker.exit: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@__omp_outlined__61 // CHECK-64-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x i8*], align 8 // CHECK-64-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block() // CHECK-64-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-64-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-64-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-64: cond.true: // CHECK-64-NEXT: br label [[COND_END:%.*]] // CHECK-64: cond.false: // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: br label [[COND_END]] // CHECK-64: cond.end: // CHECK-64-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-64-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-64: omp.inner.for.cond: // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10 // CHECK-64-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-64: omp.inner.for.body: // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: [[TMP7:%.*]] = zext i32 [[TMP6]] to i64 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 // CHECK-64-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0 // CHECK-64-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP7]] to i8* // CHECK-64-NEXT: store i8* [[TMP11]], i8** [[TMP10]], align 8 // CHECK-64-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1 // CHECK-64-NEXT: [[TMP13:%.*]] = inttoptr i64 [[TMP9]] to i8* // CHECK-64-NEXT: store i8* [[TMP13]], i8** [[TMP12]], align 8 // CHECK-64-NEXT: [[TMP14:%.*]] = bitcast [2 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-64-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i64, i64)* @__omp_outlined__62 to i8*), i8* null, i8** [[TMP14]], i64 2) // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-64: omp.inner.for.inc: // CHECK-64-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] // CHECK-64-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] // CHECK-64-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] // CHECK-64-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP21]], 9 // CHECK-64-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]] // CHECK-64: cond.true5: // CHECK-64-NEXT: br label [[COND_END7:%.*]] // CHECK-64: cond.false6: // CHECK-64-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: br label [[COND_END7]] // CHECK-64: cond.end7: // CHECK-64-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP22]], [[COND_FALSE6]] ] // CHECK-64-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP23]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK-64: omp.inner.for.end: // CHECK-64-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-64: omp.loop.exit: // CHECK-64-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@__omp_outlined__62 // CHECK-64-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 // CHECK-64-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 // CHECK-64-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 // CHECK-64-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 // CHECK-64-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 // CHECK-64-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 // CHECK-64-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP3]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-64: omp.inner.for.cond: // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[CONV2:%.*]] = sext i32 [[TMP5]] to i64 // CHECK-64-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 // CHECK-64-NEXT: [[CMP:%.*]] = icmp ule i64 [[CONV2]], [[TMP6]] // CHECK-64-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-64: omp.inner.for.body: // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-64-NEXT: store i32 [[ADD]], i32* [[I]], align 4 // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-64: omp.body.continue: // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-64: omp.inner.for.inc: // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP8]], [[TMP9]] // CHECK-64-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK-64: omp.inner.for.end: // CHECK-64-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-64: omp.loop.exit: // CHECK-64-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]]) // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l140 // CHECK-64-SAME: () #[[ATTR0]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-64: user_code.entry: // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-64-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 // CHECK-64-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4 // CHECK-64-NEXT: call void @__omp_outlined__63(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR2]] // CHECK-64-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-64-NEXT: ret void // CHECK-64: worker.exit: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@__omp_outlined__63 // CHECK-64-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x i8*], align 8 // CHECK-64-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block() // CHECK-64-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-64-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-64-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-64: cond.true: // CHECK-64-NEXT: br label [[COND_END:%.*]] // CHECK-64: cond.false: // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: br label [[COND_END]] // CHECK-64: cond.end: // CHECK-64-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-64-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-64: omp.inner.for.cond: // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10 // CHECK-64-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-64: omp.inner.for.body: // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: [[TMP7:%.*]] = zext i32 [[TMP6]] to i64 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 // CHECK-64-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0 // CHECK-64-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP7]] to i8* // CHECK-64-NEXT: store i8* [[TMP11]], i8** [[TMP10]], align 8 // CHECK-64-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1 // CHECK-64-NEXT: [[TMP13:%.*]] = inttoptr i64 [[TMP9]] to i8* // CHECK-64-NEXT: store i8* [[TMP13]], i8** [[TMP12]], align 8 // CHECK-64-NEXT: [[TMP14:%.*]] = bitcast [2 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-64-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i64, i64)* @__omp_outlined__64 to i8*), i8* null, i8** [[TMP14]], i64 2) // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-64: omp.inner.for.inc: // CHECK-64-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] // CHECK-64-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] // CHECK-64-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] // CHECK-64-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP21]], 9 // CHECK-64-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]] // CHECK-64: cond.true5: // CHECK-64-NEXT: br label [[COND_END7:%.*]] // CHECK-64: cond.false6: // CHECK-64-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: br label [[COND_END7]] // CHECK-64: cond.end7: // CHECK-64-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP22]], [[COND_FALSE6]] ] // CHECK-64-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP23]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK-64: omp.inner.for.end: // CHECK-64-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-64: omp.loop.exit: // CHECK-64-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@__omp_outlined__64 // CHECK-64-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 // CHECK-64-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 // CHECK-64-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 // CHECK-64-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 // CHECK-64-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 // CHECK-64-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 // CHECK-64-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 1073741862, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1) // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-64: omp.dispatch.cond: // CHECK-64-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-64-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0 // CHECK-64-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-64: omp.dispatch.body: // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-64: omp.inner.for.cond: // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP246:![0-9]+]] // CHECK-64-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP246]] // CHECK-64-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] // CHECK-64-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-64: omp.inner.for.body: // CHECK-64-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP246]] // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-64-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP246]] // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-64: omp.body.continue: // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-64: omp.inner.for.inc: // CHECK-64-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP246]] // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP11]], 1 // CHECK-64-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP246]] // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP247:![0-9]+]] // CHECK-64: omp.inner.for.end: // CHECK-64-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-64: omp.dispatch.inc: // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-64: omp.dispatch.end: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l145 // CHECK-64-SAME: () #[[ATTR0]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-64: user_code.entry: // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-64-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 // CHECK-64-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4 // CHECK-64-NEXT: call void @__omp_outlined__65(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR2]] // CHECK-64-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-64-NEXT: ret void // CHECK-64: worker.exit: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@__omp_outlined__65 // CHECK-64-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x i8*], align 8 // CHECK-64-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block() // CHECK-64-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-64-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-64-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-64: cond.true: // CHECK-64-NEXT: br label [[COND_END:%.*]] // CHECK-64: cond.false: // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: br label [[COND_END]] // CHECK-64: cond.end: // CHECK-64-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-64-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-64: omp.inner.for.cond: // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10 // CHECK-64-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-64: omp.inner.for.body: // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: [[TMP7:%.*]] = zext i32 [[TMP6]] to i64 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 // CHECK-64-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0 // CHECK-64-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP7]] to i8* // CHECK-64-NEXT: store i8* [[TMP11]], i8** [[TMP10]], align 8 // CHECK-64-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1 // CHECK-64-NEXT: [[TMP13:%.*]] = inttoptr i64 [[TMP9]] to i8* // CHECK-64-NEXT: store i8* [[TMP13]], i8** [[TMP12]], align 8 // CHECK-64-NEXT: [[TMP14:%.*]] = bitcast [2 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-64-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i64, i64)* @__omp_outlined__66 to i8*), i8* null, i8** [[TMP14]], i64 2) // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-64: omp.inner.for.inc: // CHECK-64-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] // CHECK-64-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] // CHECK-64-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] // CHECK-64-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP21]], 9 // CHECK-64-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]] // CHECK-64: cond.true5: // CHECK-64-NEXT: br label [[COND_END7:%.*]] // CHECK-64: cond.false6: // CHECK-64-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: br label [[COND_END7]] // CHECK-64: cond.end7: // CHECK-64-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP22]], [[COND_FALSE6]] ] // CHECK-64-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP23]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK-64: omp.inner.for.end: // CHECK-64-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-64: omp.loop.exit: // CHECK-64-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@__omp_outlined__66 // CHECK-64-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 // CHECK-64-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 // CHECK-64-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 // CHECK-64-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 // CHECK-64-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 // CHECK-64-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 // CHECK-64-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 1073741861, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1) // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-64: omp.dispatch.cond: // CHECK-64-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-64-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0 // CHECK-64-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-64: omp.dispatch.body: // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-64: omp.inner.for.cond: // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP249:![0-9]+]] // CHECK-64-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP249]] // CHECK-64-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] // CHECK-64-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-64: omp.inner.for.body: // CHECK-64-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP249]] // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-64-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP249]] // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-64: omp.body.continue: // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-64: omp.inner.for.inc: // CHECK-64-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP249]] // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP11]], 1 // CHECK-64-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP249]] // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP250:![0-9]+]] // CHECK-64: omp.inner.for.end: // CHECK-64-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-64: omp.dispatch.inc: // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-64: omp.dispatch.end: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l150 // CHECK-64-SAME: () #[[ATTR0]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-64: user_code.entry: // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-64-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 // CHECK-64-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4 // CHECK-64-NEXT: call void @__omp_outlined__67(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR2]] // CHECK-64-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-64-NEXT: ret void // CHECK-64: worker.exit: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@__omp_outlined__67 // CHECK-64-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x i8*], align 8 // CHECK-64-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block() // CHECK-64-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-64-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-64-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-64: cond.true: // CHECK-64-NEXT: br label [[COND_END:%.*]] // CHECK-64: cond.false: // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: br label [[COND_END]] // CHECK-64: cond.end: // CHECK-64-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-64-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-64: omp.inner.for.cond: // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10 // CHECK-64-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-64: omp.inner.for.body: // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: [[TMP7:%.*]] = zext i32 [[TMP6]] to i64 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 // CHECK-64-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0 // CHECK-64-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP7]] to i8* // CHECK-64-NEXT: store i8* [[TMP11]], i8** [[TMP10]], align 8 // CHECK-64-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1 // CHECK-64-NEXT: [[TMP13:%.*]] = inttoptr i64 [[TMP9]] to i8* // CHECK-64-NEXT: store i8* [[TMP13]], i8** [[TMP12]], align 8 // CHECK-64-NEXT: [[TMP14:%.*]] = bitcast [2 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-64-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i64, i64)* @__omp_outlined__68 to i8*), i8* null, i8** [[TMP14]], i64 2) // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-64: omp.inner.for.inc: // CHECK-64-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] // CHECK-64-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] // CHECK-64-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] // CHECK-64-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP21]], 9 // CHECK-64-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]] // CHECK-64: cond.true5: // CHECK-64-NEXT: br label [[COND_END7:%.*]] // CHECK-64: cond.false6: // CHECK-64-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: br label [[COND_END7]] // CHECK-64: cond.end7: // CHECK-64-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP22]], [[COND_FALSE6]] ] // CHECK-64-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP23]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK-64: omp.inner.for.end: // CHECK-64-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-64: omp.loop.exit: // CHECK-64-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@__omp_outlined__68 // CHECK-64-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 // CHECK-64-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 // CHECK-64-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 // CHECK-64-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 // CHECK-64-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 // CHECK-64-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 // CHECK-64-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 1073741859, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1) // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-64: omp.dispatch.cond: // CHECK-64-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-64-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0 // CHECK-64-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-64: omp.dispatch.body: // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-64: omp.inner.for.cond: // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP252:![0-9]+]] // CHECK-64-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP252]] // CHECK-64-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] // CHECK-64-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-64: omp.inner.for.body: // CHECK-64-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP252]] // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-64-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP252]] // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-64: omp.body.continue: // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-64: omp.inner.for.inc: // CHECK-64-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP252]] // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP11]], 1 // CHECK-64-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP252]] // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP253:![0-9]+]] // CHECK-64: omp.inner.for.end: // CHECK-64-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-64: omp.dispatch.inc: // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-64: omp.dispatch.end: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l155 // CHECK-64-SAME: () #[[ATTR0]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-64: user_code.entry: // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-64-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 // CHECK-64-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4 // CHECK-64-NEXT: call void @__omp_outlined__69(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR2]] // CHECK-64-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-64-NEXT: ret void // CHECK-64: worker.exit: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@__omp_outlined__69 // CHECK-64-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x i8*], align 8 // CHECK-64-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block() // CHECK-64-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-64-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-64-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-64: cond.true: // CHECK-64-NEXT: br label [[COND_END:%.*]] // CHECK-64: cond.false: // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: br label [[COND_END]] // CHECK-64: cond.end: // CHECK-64-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-64-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-64: omp.inner.for.cond: // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10 // CHECK-64-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-64: omp.inner.for.body: // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: [[TMP7:%.*]] = zext i32 [[TMP6]] to i64 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 // CHECK-64-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0 // CHECK-64-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP7]] to i8* // CHECK-64-NEXT: store i8* [[TMP11]], i8** [[TMP10]], align 8 // CHECK-64-NEXT: [[TMP12:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1 // CHECK-64-NEXT: [[TMP13:%.*]] = inttoptr i64 [[TMP9]] to i8* // CHECK-64-NEXT: store i8* [[TMP13]], i8** [[TMP12]], align 8 // CHECK-64-NEXT: [[TMP14:%.*]] = bitcast [2 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-64-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i64, i64)* @__omp_outlined__70 to i8*), i8* null, i8** [[TMP14]], i64 2) // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-64: omp.inner.for.inc: // CHECK-64-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] // CHECK-64-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] // CHECK-64-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] // CHECK-64-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP21]], 9 // CHECK-64-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]] // CHECK-64: cond.true5: // CHECK-64-NEXT: br label [[COND_END7:%.*]] // CHECK-64: cond.false6: // CHECK-64-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: br label [[COND_END7]] // CHECK-64: cond.end7: // CHECK-64-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP22]], [[COND_FALSE6]] ] // CHECK-64-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-64-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP23]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK-64: omp.inner.for.end: // CHECK-64-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-64: omp.loop.exit: // CHECK-64-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@__omp_outlined__70 // CHECK-64-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 // CHECK-64-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 // CHECK-64-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 // CHECK-64-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32 // CHECK-64-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 // CHECK-64-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 // CHECK-64-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 // CHECK-64-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 1073741860, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1) // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-64: omp.dispatch.cond: // CHECK-64-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-64-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0 // CHECK-64-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-64: omp.dispatch.body: // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-64: omp.inner.for.cond: // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP255:![0-9]+]] // CHECK-64-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP255]] // CHECK-64-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] // CHECK-64-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-64: omp.inner.for.body: // CHECK-64-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP255]] // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-64-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP255]] // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-64: omp.body.continue: // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-64: omp.inner.for.inc: // CHECK-64-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP255]] // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP11]], 1 // CHECK-64-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP255]] // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP256:![0-9]+]] // CHECK-64: omp.inner.for.end: // CHECK-64-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-64: omp.dispatch.inc: // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-64: omp.dispatch.end: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l160 // CHECK-64-SAME: (i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR8:[0-9]+]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 8 // CHECK-64-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 // CHECK-64-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8* // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-64: user_code.entry: // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-64-NEXT: [[TMP2:%.*]] = load i8, i8* [[CONV]], align 1 // CHECK-64-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP2]] to i1 // CHECK-64-NEXT: [[TMP3:%.*]] = zext i1 [[TOBOOL]] to i32 // CHECK-64-NEXT: [[TMP4:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-64-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 [[TMP3]], i32 -1, i32 -1, i8* bitcast (void (i32*, i32*)* @__omp_outlined__71 to i8*), i8* null, i8** [[TMP4]], i64 0) // CHECK-64-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-64-NEXT: ret void // CHECK-64: worker.exit: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@__omp_outlined__71 // CHECK-64-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-64-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-64: omp.dispatch.cond: // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-64-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-64: cond.true: // CHECK-64-NEXT: br label [[COND_END:%.*]] // CHECK-64: cond.false: // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: br label [[COND_END]] // CHECK-64: cond.end: // CHECK-64-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-64-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] // CHECK-64-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-64: omp.dispatch.body: // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-64: omp.inner.for.cond: // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] // CHECK-64-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-64: omp.inner.for.body: // CHECK-64-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-64-NEXT: store i32 [[ADD]], i32* [[I]], align 4 // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-64: omp.body.continue: // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-64: omp.inner.for.inc: // CHECK-64-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 // CHECK-64-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK-64: omp.inner.for.end: // CHECK-64-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-64: omp.dispatch.inc: // CHECK-64-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] // CHECK-64-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] // CHECK-64-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-64: omp.dispatch.end: // CHECK-64-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l163 // CHECK-64-SAME: () #[[ATTR8]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 8 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-64: user_code.entry: // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-64-NEXT: [[TMP2:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-64-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*)* @__omp_outlined__72 to i8*), i8* null, i8** [[TMP2]], i64 0) // CHECK-64-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-64-NEXT: ret void // CHECK-64: worker.exit: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@__omp_outlined__72 // CHECK-64-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-64-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-64-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-64: cond.true: // CHECK-64-NEXT: br label [[COND_END:%.*]] // CHECK-64: cond.false: // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: br label [[COND_END]] // CHECK-64: cond.end: // CHECK-64-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-64-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-64: omp.inner.for.cond: // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] // CHECK-64-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-64: omp.inner.for.body: // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-64-NEXT: store i32 [[ADD]], i32* [[I]], align 4 // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-64: omp.body.continue: // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-64: omp.inner.for.inc: // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 1 // CHECK-64-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK-64: omp.inner.for.end: // CHECK-64-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-64: omp.loop.exit: // CHECK-64-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l166 // CHECK-64-SAME: () #[[ATTR8]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 8 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-64: user_code.entry: // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-64-NEXT: [[TMP2:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-64-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*)* @__omp_outlined__73 to i8*), i8* null, i8** [[TMP2]], i64 0) // CHECK-64-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-64-NEXT: ret void // CHECK-64: worker.exit: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@__omp_outlined__73 // CHECK-64-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-64-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-64: omp.dispatch.cond: // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-64-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-64: cond.true: // CHECK-64-NEXT: br label [[COND_END:%.*]] // CHECK-64: cond.false: // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: br label [[COND_END]] // CHECK-64: cond.end: // CHECK-64-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-64-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] // CHECK-64-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-64: omp.dispatch.body: // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-64: omp.inner.for.cond: // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] // CHECK-64-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-64: omp.inner.for.body: // CHECK-64-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-64-NEXT: store i32 [[ADD]], i32* [[I]], align 4 // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-64: omp.body.continue: // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-64: omp.inner.for.inc: // CHECK-64-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 // CHECK-64-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK-64: omp.inner.for.end: // CHECK-64-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-64: omp.dispatch.inc: // CHECK-64-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] // CHECK-64-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] // CHECK-64-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-64: omp.dispatch.end: // CHECK-64-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l169 // CHECK-64-SAME: () #[[ATTR8]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 8 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-64: user_code.entry: // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-64-NEXT: [[TMP2:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-64-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*)* @__omp_outlined__74 to i8*), i8* null, i8** [[TMP2]], i64 0) // CHECK-64-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-64-NEXT: ret void // CHECK-64: worker.exit: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@__omp_outlined__74 // CHECK-64-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-64-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1073741862, i32 0, i32 9, i32 1, i32 1) // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-64: omp.dispatch.cond: // CHECK-64-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-64-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0 // CHECK-64-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-64: omp.dispatch.body: // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP3]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-64: omp.inner.for.cond: // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP258:![0-9]+]] // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP258]] // CHECK-64-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]] // CHECK-64-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-64: omp.inner.for.body: // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP258]] // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-64-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP258]] // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-64: omp.body.continue: // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-64: omp.inner.for.inc: // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP258]] // CHECK-64-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP7]], 1 // CHECK-64-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP258]] // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP259:![0-9]+]] // CHECK-64: omp.inner.for.end: // CHECK-64-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-64: omp.dispatch.inc: // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-64: omp.dispatch.end: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l172 // CHECK-64-SAME: () #[[ATTR8]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 8 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-64: user_code.entry: // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-64-NEXT: [[TMP2:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-64-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*)* @__omp_outlined__75 to i8*), i8* null, i8** [[TMP2]], i64 0) // CHECK-64-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-64-NEXT: ret void // CHECK-64: worker.exit: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@__omp_outlined__75 // CHECK-64-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-64-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1073741861, i32 0, i32 9, i32 1, i32 1) // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-64: omp.dispatch.cond: // CHECK-64-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-64-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0 // CHECK-64-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-64: omp.dispatch.body: // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP3]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-64: omp.inner.for.cond: // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP261:![0-9]+]] // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP261]] // CHECK-64-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]] // CHECK-64-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-64: omp.inner.for.body: // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP261]] // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-64-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP261]] // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-64: omp.body.continue: // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-64: omp.inner.for.inc: // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP261]] // CHECK-64-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP7]], 1 // CHECK-64-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP261]] // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP262:![0-9]+]] // CHECK-64: omp.inner.for.end: // CHECK-64-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-64: omp.dispatch.inc: // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-64: omp.dispatch.end: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l175 // CHECK-64-SAME: () #[[ATTR8]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 8 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-64: user_code.entry: // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-64-NEXT: [[TMP2:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-64-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*)* @__omp_outlined__76 to i8*), i8* null, i8** [[TMP2]], i64 0) // CHECK-64-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-64-NEXT: ret void // CHECK-64: worker.exit: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@__omp_outlined__76 // CHECK-64-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-64-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1073741859, i32 0, i32 9, i32 1, i32 1) // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-64: omp.dispatch.cond: // CHECK-64-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-64-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0 // CHECK-64-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-64: omp.dispatch.body: // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP3]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-64: omp.inner.for.cond: // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP264:![0-9]+]] // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP264]] // CHECK-64-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]] // CHECK-64-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-64: omp.inner.for.body: // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP264]] // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-64-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP264]] // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-64: omp.body.continue: // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-64: omp.inner.for.inc: // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP264]] // CHECK-64-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP7]], 1 // CHECK-64-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP264]] // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP265:![0-9]+]] // CHECK-64: omp.inner.for.end: // CHECK-64-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-64: omp.dispatch.inc: // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-64: omp.dispatch.end: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l178 // CHECK-64-SAME: () #[[ATTR8]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 8 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-64: user_code.entry: // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-64-NEXT: [[TMP2:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-64-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*)* @__omp_outlined__77 to i8*), i8* null, i8** [[TMP2]], i64 0) // CHECK-64-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-64-NEXT: ret void // CHECK-64: worker.exit: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@__omp_outlined__77 // CHECK-64-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-64-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1073741860, i32 0, i32 9, i32 1, i32 1) // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-64: omp.dispatch.cond: // CHECK-64-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-64-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0 // CHECK-64-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-64: omp.dispatch.body: // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP3]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-64: omp.inner.for.cond: // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP267:![0-9]+]] // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP267]] // CHECK-64-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]] // CHECK-64-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-64: omp.inner.for.body: // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP267]] // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-64-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP267]] // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-64: omp.body.continue: // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-64: omp.inner.for.inc: // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP267]] // CHECK-64-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP7]], 1 // CHECK-64-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP267]] // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP268:![0-9]+]] // CHECK-64: omp.inner.for.end: // CHECK-64-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-64: omp.dispatch.inc: // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-64: omp.dispatch.end: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l181 // CHECK-64-SAME: (i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR8]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 8 // CHECK-64-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 // CHECK-64-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8* // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-64: user_code.entry: // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-64-NEXT: [[TMP2:%.*]] = load i8, i8* [[CONV]], align 1 // CHECK-64-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP2]] to i1 // CHECK-64-NEXT: [[TMP3:%.*]] = zext i1 [[TOBOOL]] to i32 // CHECK-64-NEXT: [[TMP4:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-64-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 [[TMP3]], i32 -1, i32 -1, i8* bitcast (void (i32*, i32*)* @__omp_outlined__78 to i8*), i8* null, i8** [[TMP4]], i64 0) // CHECK-64-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-64-NEXT: ret void // CHECK-64: worker.exit: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@__omp_outlined__78 // CHECK-64-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-64-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-64: omp.dispatch.cond: // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-64-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-64: cond.true: // CHECK-64-NEXT: br label [[COND_END:%.*]] // CHECK-64: cond.false: // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: br label [[COND_END]] // CHECK-64: cond.end: // CHECK-64-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-64-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] // CHECK-64-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-64: omp.dispatch.body: // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-64: omp.inner.for.cond: // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP270:![0-9]+]] // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP270]] // CHECK-64-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] // CHECK-64-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-64: omp.inner.for.body: // CHECK-64-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP270]] // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-64-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP270]] // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-64: omp.body.continue: // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-64: omp.inner.for.inc: // CHECK-64-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP270]] // CHECK-64-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 // CHECK-64-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP270]] // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP271:![0-9]+]] // CHECK-64: omp.inner.for.end: // CHECK-64-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-64: omp.dispatch.inc: // CHECK-64-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] // CHECK-64-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] // CHECK-64-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-64: omp.dispatch.end: // CHECK-64-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) // CHECK-64-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0 // CHECK-64-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-64: .omp.final.then: // CHECK-64-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-64-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-64: .omp.final.done: // CHECK-64-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4:[0-9]+]], i32 [[TMP1]]) // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l185 // CHECK-64-SAME: () #[[ATTR8]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 8 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-64: user_code.entry: // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-64-NEXT: [[TMP2:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-64-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*)* @__omp_outlined__79 to i8*), i8* null, i8** [[TMP2]], i64 0) // CHECK-64-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-64-NEXT: ret void // CHECK-64: worker.exit: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@__omp_outlined__79 // CHECK-64-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-64-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-64-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-64: cond.true: // CHECK-64-NEXT: br label [[COND_END:%.*]] // CHECK-64: cond.false: // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: br label [[COND_END]] // CHECK-64: cond.end: // CHECK-64-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-64-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-64: omp.inner.for.cond: // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP273:![0-9]+]] // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP273]] // CHECK-64-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] // CHECK-64-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-64: omp.inner.for.body: // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP273]] // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-64-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP273]] // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-64: omp.body.continue: // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-64: omp.inner.for.inc: // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP273]] // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 1 // CHECK-64-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP273]] // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP274:![0-9]+]] // CHECK-64: omp.inner.for.end: // CHECK-64-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-64: omp.loop.exit: // CHECK-64-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) // CHECK-64-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0 // CHECK-64-NEXT: br i1 [[TMP10]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-64: .omp.final.then: // CHECK-64-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-64-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-64: .omp.final.done: // CHECK-64-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4]], i32 [[TMP1]]) // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l189 // CHECK-64-SAME: () #[[ATTR8]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 8 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-64: user_code.entry: // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-64-NEXT: [[TMP2:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-64-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*)* @__omp_outlined__80 to i8*), i8* null, i8** [[TMP2]], i64 0) // CHECK-64-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-64-NEXT: ret void // CHECK-64: worker.exit: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@__omp_outlined__80 // CHECK-64-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-64-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-64: omp.dispatch.cond: // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-64-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-64: cond.true: // CHECK-64-NEXT: br label [[COND_END:%.*]] // CHECK-64: cond.false: // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: br label [[COND_END]] // CHECK-64: cond.end: // CHECK-64-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-64-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] // CHECK-64-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-64: omp.dispatch.body: // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-64: omp.inner.for.cond: // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP276:![0-9]+]] // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP276]] // CHECK-64-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] // CHECK-64-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-64: omp.inner.for.body: // CHECK-64-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP276]] // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-64-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP276]] // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-64: omp.body.continue: // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-64: omp.inner.for.inc: // CHECK-64-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP276]] // CHECK-64-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 // CHECK-64-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP276]] // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP277:![0-9]+]] // CHECK-64: omp.inner.for.end: // CHECK-64-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-64: omp.dispatch.inc: // CHECK-64-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] // CHECK-64-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] // CHECK-64-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-64: omp.dispatch.end: // CHECK-64-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) // CHECK-64-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0 // CHECK-64-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-64: .omp.final.then: // CHECK-64-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-64-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-64: .omp.final.done: // CHECK-64-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4]], i32 [[TMP1]]) // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l193 // CHECK-64-SAME: () #[[ATTR8]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 8 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-64: user_code.entry: // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-64-NEXT: [[TMP2:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-64-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*)* @__omp_outlined__81 to i8*), i8* null, i8** [[TMP2]], i64 0) // CHECK-64-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-64-NEXT: ret void // CHECK-64: worker.exit: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@__omp_outlined__81 // CHECK-64-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-64-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1073741862, i32 0, i32 9, i32 1, i32 1) // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-64: omp.dispatch.cond: // CHECK-64-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-64-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0 // CHECK-64-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-64: omp.dispatch.body: // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP3]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-64: omp.inner.for.cond: // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP279:![0-9]+]] // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP279]] // CHECK-64-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]] // CHECK-64-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-64: omp.inner.for.body: // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP279]] // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-64-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP279]] // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-64: omp.body.continue: // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-64: omp.inner.for.inc: // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP279]] // CHECK-64-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP7]], 1 // CHECK-64-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP279]] // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP280:![0-9]+]] // CHECK-64: omp.inner.for.end: // CHECK-64-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-64: omp.dispatch.inc: // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-64: omp.dispatch.end: // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[TMP9:%.*]] = icmp ne i32 [[TMP8]], 0 // CHECK-64-NEXT: br i1 [[TMP9]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-64: .omp.final.then: // CHECK-64-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-64-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-64: .omp.final.done: // CHECK-64-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4]], i32 [[TMP1]]) // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l197 // CHECK-64-SAME: () #[[ATTR8]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 8 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-64: user_code.entry: // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-64-NEXT: [[TMP2:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-64-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*)* @__omp_outlined__82 to i8*), i8* null, i8** [[TMP2]], i64 0) // CHECK-64-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-64-NEXT: ret void // CHECK-64: worker.exit: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@__omp_outlined__82 // CHECK-64-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-64-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1073741861, i32 0, i32 9, i32 1, i32 1) // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-64: omp.dispatch.cond: // CHECK-64-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-64-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0 // CHECK-64-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-64: omp.dispatch.body: // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP3]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-64: omp.inner.for.cond: // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP282:![0-9]+]] // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP282]] // CHECK-64-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]] // CHECK-64-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-64: omp.inner.for.body: // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP282]] // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-64-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP282]] // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-64: omp.body.continue: // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-64: omp.inner.for.inc: // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP282]] // CHECK-64-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP7]], 1 // CHECK-64-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP282]] // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP283:![0-9]+]] // CHECK-64: omp.inner.for.end: // CHECK-64-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-64: omp.dispatch.inc: // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-64: omp.dispatch.end: // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[TMP9:%.*]] = icmp ne i32 [[TMP8]], 0 // CHECK-64-NEXT: br i1 [[TMP9]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-64: .omp.final.then: // CHECK-64-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-64-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-64: .omp.final.done: // CHECK-64-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4]], i32 [[TMP1]]) // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l201 // CHECK-64-SAME: () #[[ATTR8]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 8 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-64: user_code.entry: // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-64-NEXT: [[TMP2:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-64-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*)* @__omp_outlined__83 to i8*), i8* null, i8** [[TMP2]], i64 0) // CHECK-64-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-64-NEXT: ret void // CHECK-64: worker.exit: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@__omp_outlined__83 // CHECK-64-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-64-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1073741859, i32 0, i32 9, i32 1, i32 1) // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-64: omp.dispatch.cond: // CHECK-64-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-64-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0 // CHECK-64-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-64: omp.dispatch.body: // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP3]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-64: omp.inner.for.cond: // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP285:![0-9]+]] // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP285]] // CHECK-64-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]] // CHECK-64-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-64: omp.inner.for.body: // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP285]] // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-64-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP285]] // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-64: omp.body.continue: // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-64: omp.inner.for.inc: // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP285]] // CHECK-64-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP7]], 1 // CHECK-64-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP285]] // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP286:![0-9]+]] // CHECK-64: omp.inner.for.end: // CHECK-64-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-64: omp.dispatch.inc: // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-64: omp.dispatch.end: // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[TMP9:%.*]] = icmp ne i32 [[TMP8]], 0 // CHECK-64-NEXT: br i1 [[TMP9]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-64: .omp.final.then: // CHECK-64-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-64-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-64: .omp.final.done: // CHECK-64-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4]], i32 [[TMP1]]) // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l205 // CHECK-64-SAME: () #[[ATTR8]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 8 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-64: user_code.entry: // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-64-NEXT: [[TMP2:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-64-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*)* @__omp_outlined__84 to i8*), i8* null, i8** [[TMP2]], i64 0) // CHECK-64-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-64-NEXT: ret void // CHECK-64: worker.exit: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@__omp_outlined__84 // CHECK-64-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-64-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1073741860, i32 0, i32 9, i32 1, i32 1) // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-64: omp.dispatch.cond: // CHECK-64-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-64-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0 // CHECK-64-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-64: omp.dispatch.body: // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP3]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-64: omp.inner.for.cond: // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP288:![0-9]+]] // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP288]] // CHECK-64-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]] // CHECK-64-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-64: omp.inner.for.body: // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP288]] // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-64-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP288]] // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-64: omp.body.continue: // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-64: omp.inner.for.inc: // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP288]] // CHECK-64-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP7]], 1 // CHECK-64-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP288]] // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP289:![0-9]+]] // CHECK-64: omp.inner.for.end: // CHECK-64-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-64: omp.dispatch.inc: // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-64: omp.dispatch.end: // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[TMP9:%.*]] = icmp ne i32 [[TMP8]], 0 // CHECK-64-NEXT: br i1 [[TMP9]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-64: .omp.final.then: // CHECK-64-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-64-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-64: .omp.final.done: // CHECK-64-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4]], i32 [[TMP1]]) // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l209 // CHECK-64-SAME: () #[[ATTR8]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 8 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-64: user_code.entry: // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-64-NEXT: [[TMP2:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-64-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*)* @__omp_outlined__85 to i8*), i8* null, i8** [[TMP2]], i64 0) // CHECK-64-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-64-NEXT: ret void // CHECK-64: worker.exit: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@__omp_outlined__85 // CHECK-64-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-64-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 65, i32 0, i32 9, i32 1, i32 1) // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-64: omp.dispatch.cond: // CHECK-64-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-64-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0 // CHECK-64-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-64: omp.dispatch.body: // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP3]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-64: omp.inner.for.cond: // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP291:![0-9]+]] // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP291]] // CHECK-64-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]] // CHECK-64-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-64: omp.inner.for.body: // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP291]] // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-64-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP291]] // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-64: omp.body.continue: // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-64: omp.inner.for.inc: // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP291]] // CHECK-64-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP7]], 1 // CHECK-64-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP291]] // CHECK-64-NEXT: call void @__kmpc_dispatch_fini_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP291]] // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP292:![0-9]+]] // CHECK-64: omp.inner.for.end: // CHECK-64-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-64: omp.dispatch.inc: // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-64: omp.dispatch.end: // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[TMP9:%.*]] = icmp ne i32 [[TMP8]], 0 // CHECK-64-NEXT: br i1 [[TMP9]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-64: .omp.final.then: // CHECK-64-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-64-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-64: .omp.final.done: // CHECK-64-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4]], i32 [[TMP1]]) // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l214 // CHECK-64-SAME: () #[[ATTR8]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 8 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-64: user_code.entry: // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-64-NEXT: [[TMP2:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-64-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*)* @__omp_outlined__86 to i8*), i8* null, i8** [[TMP2]], i64 0) // CHECK-64-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-64-NEXT: ret void // CHECK-64: worker.exit: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@__omp_outlined__86 // CHECK-64-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-64-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-64-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-64: cond.true: // CHECK-64-NEXT: br label [[COND_END:%.*]] // CHECK-64: cond.false: // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: br label [[COND_END]] // CHECK-64: cond.end: // CHECK-64-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-64-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-64: omp.inner.for.cond: // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP294:![0-9]+]] // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP294]] // CHECK-64-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] // CHECK-64-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-64: omp.inner.for.body: // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP294]] // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-64-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP294]] // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-64: omp.body.continue: // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-64: omp.inner.for.inc: // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP294]] // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 1 // CHECK-64-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP294]] // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP295:![0-9]+]] // CHECK-64: omp.inner.for.end: // CHECK-64-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-64: omp.loop.exit: // CHECK-64-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) // CHECK-64-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0 // CHECK-64-NEXT: br i1 [[TMP10]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-64: .omp.final.then: // CHECK-64-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-64-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-64: .omp.final.done: // CHECK-64-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4]], i32 [[TMP1]]) // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l219 // CHECK-64-SAME: () #[[ATTR8]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 8 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-64: user_code.entry: // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-64-NEXT: [[TMP2:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-64-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*)* @__omp_outlined__87 to i8*), i8* null, i8** [[TMP2]], i64 0) // CHECK-64-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-64-NEXT: ret void // CHECK-64: worker.exit: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@__omp_outlined__87 // CHECK-64-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-64-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-64: omp.dispatch.cond: // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-64-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-64: cond.true: // CHECK-64-NEXT: br label [[COND_END:%.*]] // CHECK-64: cond.false: // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: br label [[COND_END]] // CHECK-64: cond.end: // CHECK-64-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-64-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] // CHECK-64-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-64: omp.dispatch.body: // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-64: omp.inner.for.cond: // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP297:![0-9]+]] // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP297]] // CHECK-64-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] // CHECK-64-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-64: omp.inner.for.body: // CHECK-64-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP297]] // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-64-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP297]] // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-64: omp.body.continue: // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-64: omp.inner.for.inc: // CHECK-64-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP297]] // CHECK-64-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 // CHECK-64-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP297]] // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP298:![0-9]+]] // CHECK-64: omp.inner.for.end: // CHECK-64-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-64: omp.dispatch.inc: // CHECK-64-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] // CHECK-64-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] // CHECK-64-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-64: omp.dispatch.end: // CHECK-64-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) // CHECK-64-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0 // CHECK-64-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-64: .omp.final.then: // CHECK-64-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-64-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-64: .omp.final.done: // CHECK-64-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4]], i32 [[TMP1]]) // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l224 // CHECK-64-SAME: () #[[ATTR8]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 8 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-64: user_code.entry: // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-64-NEXT: [[TMP2:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-64-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*)* @__omp_outlined__88 to i8*), i8* null, i8** [[TMP2]], i64 0) // CHECK-64-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-64-NEXT: ret void // CHECK-64: worker.exit: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@__omp_outlined__88 // CHECK-64-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-64-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1073741862, i32 0, i32 9, i32 1, i32 1) // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-64: omp.dispatch.cond: // CHECK-64-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-64-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0 // CHECK-64-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-64: omp.dispatch.body: // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP3]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-64: omp.inner.for.cond: // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP300:![0-9]+]] // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP300]] // CHECK-64-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]] // CHECK-64-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-64: omp.inner.for.body: // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP300]] // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-64-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP300]] // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-64: omp.body.continue: // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-64: omp.inner.for.inc: // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP300]] // CHECK-64-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP7]], 1 // CHECK-64-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP300]] // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP301:![0-9]+]] // CHECK-64: omp.inner.for.end: // CHECK-64-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-64: omp.dispatch.inc: // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-64: omp.dispatch.end: // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[TMP9:%.*]] = icmp ne i32 [[TMP8]], 0 // CHECK-64-NEXT: br i1 [[TMP9]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-64: .omp.final.then: // CHECK-64-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-64-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-64: .omp.final.done: // CHECK-64-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4]], i32 [[TMP1]]) // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l229 // CHECK-64-SAME: () #[[ATTR8]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 8 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-64: user_code.entry: // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-64-NEXT: [[TMP2:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-64-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*)* @__omp_outlined__89 to i8*), i8* null, i8** [[TMP2]], i64 0) // CHECK-64-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-64-NEXT: ret void // CHECK-64: worker.exit: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@__omp_outlined__89 // CHECK-64-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-64-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1073741861, i32 0, i32 9, i32 1, i32 1) // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-64: omp.dispatch.cond: // CHECK-64-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-64-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0 // CHECK-64-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-64: omp.dispatch.body: // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP3]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-64: omp.inner.for.cond: // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP303:![0-9]+]] // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP303]] // CHECK-64-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]] // CHECK-64-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-64: omp.inner.for.body: // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP303]] // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-64-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP303]] // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-64: omp.body.continue: // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-64: omp.inner.for.inc: // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP303]] // CHECK-64-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP7]], 1 // CHECK-64-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP303]] // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP304:![0-9]+]] // CHECK-64: omp.inner.for.end: // CHECK-64-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-64: omp.dispatch.inc: // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-64: omp.dispatch.end: // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[TMP9:%.*]] = icmp ne i32 [[TMP8]], 0 // CHECK-64-NEXT: br i1 [[TMP9]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-64: .omp.final.then: // CHECK-64-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-64-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-64: .omp.final.done: // CHECK-64-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4]], i32 [[TMP1]]) // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l234 // CHECK-64-SAME: () #[[ATTR8]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 8 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-64: user_code.entry: // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-64-NEXT: [[TMP2:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-64-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*)* @__omp_outlined__90 to i8*), i8* null, i8** [[TMP2]], i64 0) // CHECK-64-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-64-NEXT: ret void // CHECK-64: worker.exit: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@__omp_outlined__90 // CHECK-64-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-64-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1073741859, i32 0, i32 9, i32 1, i32 1) // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-64: omp.dispatch.cond: // CHECK-64-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-64-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0 // CHECK-64-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-64: omp.dispatch.body: // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP3]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-64: omp.inner.for.cond: // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP306:![0-9]+]] // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP306]] // CHECK-64-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]] // CHECK-64-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-64: omp.inner.for.body: // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP306]] // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-64-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP306]] // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-64: omp.body.continue: // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-64: omp.inner.for.inc: // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP306]] // CHECK-64-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP7]], 1 // CHECK-64-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP306]] // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP307:![0-9]+]] // CHECK-64: omp.inner.for.end: // CHECK-64-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-64: omp.dispatch.inc: // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-64: omp.dispatch.end: // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[TMP9:%.*]] = icmp ne i32 [[TMP8]], 0 // CHECK-64-NEXT: br i1 [[TMP9]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-64: .omp.final.then: // CHECK-64-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-64-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-64: .omp.final.done: // CHECK-64-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4]], i32 [[TMP1]]) // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l239 // CHECK-64-SAME: () #[[ATTR8]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 8 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-64: user_code.entry: // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-64-NEXT: [[TMP2:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-64-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*)* @__omp_outlined__91 to i8*), i8* null, i8** [[TMP2]], i64 0) // CHECK-64-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-64-NEXT: ret void // CHECK-64: worker.exit: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@__omp_outlined__91 // CHECK-64-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-64-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1073741860, i32 0, i32 9, i32 1, i32 1) // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-64: omp.dispatch.cond: // CHECK-64-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-64-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0 // CHECK-64-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-64: omp.dispatch.body: // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP3]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-64: omp.inner.for.cond: // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP309:![0-9]+]] // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP309]] // CHECK-64-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]] // CHECK-64-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-64: omp.inner.for.body: // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP309]] // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-64-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP309]] // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-64: omp.body.continue: // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-64: omp.inner.for.inc: // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP309]] // CHECK-64-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP7]], 1 // CHECK-64-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP309]] // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP310:![0-9]+]] // CHECK-64: omp.inner.for.end: // CHECK-64-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-64: omp.dispatch.inc: // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-64: omp.dispatch.end: // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[TMP9:%.*]] = icmp ne i32 [[TMP8]], 0 // CHECK-64-NEXT: br i1 [[TMP9]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-64: .omp.final.then: // CHECK-64-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-64-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-64: .omp.final.done: // CHECK-64-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4]], i32 [[TMP1]]) // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l244 // CHECK-64-SAME: () #[[ATTR8]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 8 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-64: user_code.entry: // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-64-NEXT: [[TMP2:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-64-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*)* @__omp_outlined__92 to i8*), i8* null, i8** [[TMP2]], i64 0) // CHECK-64-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-64-NEXT: ret void // CHECK-64: worker.exit: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@__omp_outlined__92 // CHECK-64-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-64-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-64: omp.dispatch.cond: // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-64-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-64: cond.true: // CHECK-64-NEXT: br label [[COND_END:%.*]] // CHECK-64: cond.false: // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: br label [[COND_END]] // CHECK-64: cond.end: // CHECK-64-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-64-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] // CHECK-64-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-64: omp.dispatch.body: // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-64: omp.inner.for.cond: // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] // CHECK-64-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-64: omp.inner.for.body: // CHECK-64-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-64-NEXT: store i32 [[ADD]], i32* [[I]], align 4 // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-64: omp.body.continue: // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-64: omp.inner.for.inc: // CHECK-64-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 // CHECK-64-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK-64: omp.inner.for.end: // CHECK-64-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-64: omp.dispatch.inc: // CHECK-64-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] // CHECK-64-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] // CHECK-64-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-64: omp.dispatch.end: // CHECK-64-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l248 // CHECK-64-SAME: () #[[ATTR8]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 8 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-64: user_code.entry: // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-64-NEXT: [[TMP2:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-64-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*)* @__omp_outlined__93 to i8*), i8* null, i8** [[TMP2]], i64 0) // CHECK-64-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-64-NEXT: ret void // CHECK-64: worker.exit: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@__omp_outlined__93 // CHECK-64-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-64-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-64-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-64: cond.true: // CHECK-64-NEXT: br label [[COND_END:%.*]] // CHECK-64: cond.false: // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: br label [[COND_END]] // CHECK-64: cond.end: // CHECK-64-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-64-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-64: omp.inner.for.cond: // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] // CHECK-64-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-64: omp.inner.for.body: // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-64-NEXT: store i32 [[ADD]], i32* [[I]], align 4 // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-64: omp.body.continue: // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-64: omp.inner.for.inc: // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 1 // CHECK-64-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK-64: omp.inner.for.end: // CHECK-64-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-64: omp.loop.exit: // CHECK-64-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l252 // CHECK-64-SAME: () #[[ATTR8]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 8 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-64: user_code.entry: // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-64-NEXT: [[TMP2:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-64-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*)* @__omp_outlined__94 to i8*), i8* null, i8** [[TMP2]], i64 0) // CHECK-64-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-64-NEXT: ret void // CHECK-64: worker.exit: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@__omp_outlined__94 // CHECK-64-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-64-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-64: omp.dispatch.cond: // CHECK-64-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-64-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-64: cond.true: // CHECK-64-NEXT: br label [[COND_END:%.*]] // CHECK-64: cond.false: // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: br label [[COND_END]] // CHECK-64: cond.end: // CHECK-64-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-64-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] // CHECK-64-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-64: omp.dispatch.body: // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-64: omp.inner.for.cond: // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] // CHECK-64-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-64: omp.inner.for.body: // CHECK-64-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-64-NEXT: store i32 [[ADD]], i32* [[I]], align 4 // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-64: omp.body.continue: // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-64: omp.inner.for.inc: // CHECK-64-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 // CHECK-64-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK-64: omp.inner.for.end: // CHECK-64-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-64: omp.dispatch.inc: // CHECK-64-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] // CHECK-64-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] // CHECK-64-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-64: omp.dispatch.end: // CHECK-64-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l256 // CHECK-64-SAME: () #[[ATTR8]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 8 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-64: user_code.entry: // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-64-NEXT: [[TMP2:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-64-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*)* @__omp_outlined__95 to i8*), i8* null, i8** [[TMP2]], i64 0) // CHECK-64-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-64-NEXT: ret void // CHECK-64: worker.exit: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@__omp_outlined__95 // CHECK-64-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-64-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1073741862, i32 0, i32 9, i32 1, i32 1) // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-64: omp.dispatch.cond: // CHECK-64-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-64-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0 // CHECK-64-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-64: omp.dispatch.body: // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP3]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-64: omp.inner.for.cond: // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP312:![0-9]+]] // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP312]] // CHECK-64-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]] // CHECK-64-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-64: omp.inner.for.body: // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP312]] // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-64-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP312]] // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-64: omp.body.continue: // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-64: omp.inner.for.inc: // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP312]] // CHECK-64-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP7]], 1 // CHECK-64-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP312]] // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP313:![0-9]+]] // CHECK-64: omp.inner.for.end: // CHECK-64-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-64: omp.dispatch.inc: // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-64: omp.dispatch.end: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l260 // CHECK-64-SAME: () #[[ATTR8]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 8 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-64: user_code.entry: // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-64-NEXT: [[TMP2:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-64-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*)* @__omp_outlined__96 to i8*), i8* null, i8** [[TMP2]], i64 0) // CHECK-64-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-64-NEXT: ret void // CHECK-64: worker.exit: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@__omp_outlined__96 // CHECK-64-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-64-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1073741861, i32 0, i32 9, i32 1, i32 1) // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-64: omp.dispatch.cond: // CHECK-64-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-64-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0 // CHECK-64-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-64: omp.dispatch.body: // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP3]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-64: omp.inner.for.cond: // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP315:![0-9]+]] // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP315]] // CHECK-64-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]] // CHECK-64-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-64: omp.inner.for.body: // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP315]] // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-64-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP315]] // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-64: omp.body.continue: // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-64: omp.inner.for.inc: // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP315]] // CHECK-64-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP7]], 1 // CHECK-64-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP315]] // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP316:![0-9]+]] // CHECK-64: omp.inner.for.end: // CHECK-64-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-64: omp.dispatch.inc: // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-64: omp.dispatch.end: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l264 // CHECK-64-SAME: () #[[ATTR8]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 8 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-64: user_code.entry: // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-64-NEXT: [[TMP2:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-64-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*)* @__omp_outlined__97 to i8*), i8* null, i8** [[TMP2]], i64 0) // CHECK-64-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-64-NEXT: ret void // CHECK-64: worker.exit: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@__omp_outlined__97 // CHECK-64-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-64-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1073741859, i32 0, i32 9, i32 1, i32 1) // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-64: omp.dispatch.cond: // CHECK-64-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-64-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0 // CHECK-64-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-64: omp.dispatch.body: // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP3]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-64: omp.inner.for.cond: // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP318:![0-9]+]] // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP318]] // CHECK-64-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]] // CHECK-64-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-64: omp.inner.for.body: // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP318]] // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-64-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP318]] // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-64: omp.body.continue: // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-64: omp.inner.for.inc: // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP318]] // CHECK-64-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP7]], 1 // CHECK-64-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP318]] // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP319:![0-9]+]] // CHECK-64: omp.inner.for.end: // CHECK-64-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-64: omp.dispatch.inc: // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-64: omp.dispatch.end: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l268 // CHECK-64-SAME: () #[[ATTR8]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 8 // CHECK-64-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-64-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-64-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-64: user_code.entry: // CHECK-64-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-64-NEXT: [[TMP2:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-64-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*)* @__omp_outlined__98 to i8*), i8* null, i8** [[TMP2]], i64 0) // CHECK-64-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-64-NEXT: ret void // CHECK-64: worker.exit: // CHECK-64-NEXT: ret void // // // CHECK-64-LABEL: define {{[^@]+}}@__omp_outlined__98 // CHECK-64-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-64-NEXT: entry: // CHECK-64-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 // CHECK-64-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-64-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-64-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-64-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-64-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK-64-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-64-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1073741860, i32 0, i32 9, i32 1, i32 1) // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-64: omp.dispatch.cond: // CHECK-64-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-64-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0 // CHECK-64-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-64: omp.dispatch.body: // CHECK-64-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-64-NEXT: store i32 [[TMP3]], i32* [[DOTOMP_IV]], align 4 // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-64: omp.inner.for.cond: // CHECK-64-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP321:![0-9]+]] // CHECK-64-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP321]] // CHECK-64-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]] // CHECK-64-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-64: omp.inner.for.body: // CHECK-64-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP321]] // CHECK-64-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1 // CHECK-64-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-64-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP321]] // CHECK-64-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-64: omp.body.continue: // CHECK-64-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-64: omp.inner.for.inc: // CHECK-64-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP321]] // CHECK-64-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP7]], 1 // CHECK-64-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP321]] // CHECK-64-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP322:![0-9]+]] // CHECK-64: omp.inner.for.end: // CHECK-64-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-64: omp.dispatch.inc: // CHECK-64-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-64: omp.dispatch.end: // CHECK-64-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l15 // CHECK-32-SAME: (i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0:[0-9]+]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 // CHECK-32-NEXT: [[CONV:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR__ADDR]] to i8* // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1:[0-9]+]], i8 2, i1 false) // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32: user_code.entry: // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-NEXT: [[TMP2:%.*]] = load i8, i8* [[CONV]], align 1 // CHECK-32-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP2]] to i1 // CHECK-32-NEXT: [[CONV1:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR__CASTED]] to i8* // CHECK-32-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8 // CHECK-32-NEXT: store i8 [[FROMBOOL]], i8* [[CONV1]], align 1 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 // CHECK-32-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4 // CHECK-32-NEXT: call void @__omp_outlined__(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i32 [[TMP3]]) #[[ATTR2:[0-9]+]] // CHECK-32-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-NEXT: ret void // CHECK-32: worker.exit: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@__omp_outlined__ // CHECK-32-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1:[0-9]+]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [3 x i8*], align 4 // CHECK-32-NEXT: [[DOTCAPTURE_EXPR__CASTED16:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS19:%.*]] = alloca [3 x i8*], align 4 // CHECK-32-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 // CHECK-32-NEXT: [[CONV:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR__ADDR]] to i8* // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block() // CHECK-32-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP1]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-32-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-32: cond.true: // CHECK-32-NEXT: br label [[COND_END:%.*]] // CHECK-32: cond.false: // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: br label [[COND_END]] // CHECK-32: cond.end: // CHECK-32-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-32-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[TMP5:%.*]] = load i8, i8* [[CONV]], align 1 // CHECK-32-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP5]] to i1 // CHECK-32-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] // CHECK-32: omp_if.then: // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32: omp.inner.for.cond: // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP130:![0-9]+]] // CHECK-32-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP6]], 10 // CHECK-32-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32: omp.inner.for.body: // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP130]] // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP130]] // CHECK-32-NEXT: [[TMP9:%.*]] = load i8, i8* [[CONV]], align 1, !llvm.access.group [[ACC_GRP130]] // CHECK-32-NEXT: [[TOBOOL2:%.*]] = trunc i8 [[TMP9]] to i1 // CHECK-32-NEXT: [[CONV3:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR__CASTED]] to i8* // CHECK-32-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL2]] to i8 // CHECK-32-NEXT: store i8 [[FROMBOOL]], i8* [[CONV3]], align 1, !llvm.access.group [[ACC_GRP130]] // CHECK-32-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4, !llvm.access.group [[ACC_GRP130]] // CHECK-32-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0 // CHECK-32-NEXT: [[TMP12:%.*]] = inttoptr i32 [[TMP7]] to i8* // CHECK-32-NEXT: store i8* [[TMP12]], i8** [[TMP11]], align 4, !llvm.access.group [[ACC_GRP130]] // CHECK-32-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1 // CHECK-32-NEXT: [[TMP14:%.*]] = inttoptr i32 [[TMP8]] to i8* // CHECK-32-NEXT: store i8* [[TMP14]], i8** [[TMP13]], align 4, !llvm.access.group [[ACC_GRP130]] // CHECK-32-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2 // CHECK-32-NEXT: [[TMP16:%.*]] = inttoptr i32 [[TMP10]] to i8* // CHECK-32-NEXT: store i8* [[TMP16]], i8** [[TMP15]], align 4, !llvm.access.group [[ACC_GRP130]] // CHECK-32-NEXT: [[TMP17:%.*]] = load i8, i8* [[CONV]], align 1, !llvm.access.group [[ACC_GRP130]] // CHECK-32-NEXT: [[TOBOOL4:%.*]] = trunc i8 [[TMP17]] to i1 // CHECK-32-NEXT: [[TMP18:%.*]] = zext i1 [[TOBOOL4]] to i32 // CHECK-32-NEXT: [[TMP19:%.*]] = bitcast [3 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 [[TMP18]], i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, i32)* @__omp_outlined__1 to i8*), i8* null, i8** [[TMP19]], i32 3), !llvm.access.group [[ACC_GRP130]] // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32: omp.inner.for.inc: // CHECK-32-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP130]] // CHECK-32-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP130]] // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] // CHECK-32-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP130]] // CHECK-32-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP130]] // CHECK-32-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP130]] // CHECK-32-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP22]], [[TMP23]] // CHECK-32-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP130]] // CHECK-32-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP130]] // CHECK-32-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP130]] // CHECK-32-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP24]], [[TMP25]] // CHECK-32-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP130]] // CHECK-32-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP130]] // CHECK-32-NEXT: [[CMP7:%.*]] = icmp sgt i32 [[TMP26]], 9 // CHECK-32-NEXT: br i1 [[CMP7]], label [[COND_TRUE8:%.*]], label [[COND_FALSE9:%.*]] // CHECK-32: cond.true8: // CHECK-32-NEXT: br label [[COND_END10:%.*]] // CHECK-32: cond.false9: // CHECK-32-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP130]] // CHECK-32-NEXT: br label [[COND_END10]] // CHECK-32: cond.end10: // CHECK-32-NEXT: [[COND11:%.*]] = phi i32 [ 9, [[COND_TRUE8]] ], [ [[TMP27]], [[COND_FALSE9]] ] // CHECK-32-NEXT: store i32 [[COND11]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP130]] // CHECK-32-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP130]] // CHECK-32-NEXT: store i32 [[TMP28]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP130]] // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP131:![0-9]+]] // CHECK-32: omp.inner.for.end: // CHECK-32-NEXT: br label [[OMP_IF_END:%.*]] // CHECK-32: omp_if.else: // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND12:%.*]] // CHECK-32: omp.inner.for.cond12: // CHECK-32-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[CMP13:%.*]] = icmp slt i32 [[TMP29]], 10 // CHECK-32-NEXT: br i1 [[CMP13]], label [[OMP_INNER_FOR_BODY14:%.*]], label [[OMP_INNER_FOR_END30:%.*]] // CHECK-32: omp.inner.for.body14: // CHECK-32-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP32:%.*]] = load i8, i8* [[CONV]], align 1 // CHECK-32-NEXT: [[TOBOOL15:%.*]] = trunc i8 [[TMP32]] to i1 // CHECK-32-NEXT: [[CONV17:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR__CASTED16]] to i8* // CHECK-32-NEXT: [[FROMBOOL18:%.*]] = zext i1 [[TOBOOL15]] to i8 // CHECK-32-NEXT: store i8 [[FROMBOOL18]], i8* [[CONV17]], align 1 // CHECK-32-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED16]], align 4 // CHECK-32-NEXT: [[TMP34:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS19]], i32 0, i32 0 // CHECK-32-NEXT: [[TMP35:%.*]] = inttoptr i32 [[TMP30]] to i8* // CHECK-32-NEXT: store i8* [[TMP35]], i8** [[TMP34]], align 4 // CHECK-32-NEXT: [[TMP36:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS19]], i32 0, i32 1 // CHECK-32-NEXT: [[TMP37:%.*]] = inttoptr i32 [[TMP31]] to i8* // CHECK-32-NEXT: store i8* [[TMP37]], i8** [[TMP36]], align 4 // CHECK-32-NEXT: [[TMP38:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS19]], i32 0, i32 2 // CHECK-32-NEXT: [[TMP39:%.*]] = inttoptr i32 [[TMP33]] to i8* // CHECK-32-NEXT: store i8* [[TMP39]], i8** [[TMP38]], align 4 // CHECK-32-NEXT: [[TMP40:%.*]] = load i8, i8* [[CONV]], align 1 // CHECK-32-NEXT: [[TOBOOL20:%.*]] = trunc i8 [[TMP40]] to i1 // CHECK-32-NEXT: [[TMP41:%.*]] = zext i1 [[TOBOOL20]] to i32 // CHECK-32-NEXT: [[TMP42:%.*]] = bitcast [3 x i8*]* [[CAPTURED_VARS_ADDRS19]] to i8** // CHECK-32-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 [[TMP41]], i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, i32)* @__omp_outlined__2 to i8*), i8* null, i8** [[TMP42]], i32 3) // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC21:%.*]] // CHECK-32: omp.inner.for.inc21: // CHECK-32-NEXT: [[TMP43:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[TMP44:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: [[ADD22:%.*]] = add nsw i32 [[TMP43]], [[TMP44]] // CHECK-32-NEXT: store i32 [[ADD22]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[TMP45:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: [[TMP46:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: [[ADD23:%.*]] = add nsw i32 [[TMP45]], [[TMP46]] // CHECK-32-NEXT: store i32 [[ADD23]], i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: [[TMP47:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP48:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: [[ADD24:%.*]] = add nsw i32 [[TMP47]], [[TMP48]] // CHECK-32-NEXT: store i32 [[ADD24]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP49:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[CMP25:%.*]] = icmp sgt i32 [[TMP49]], 9 // CHECK-32-NEXT: br i1 [[CMP25]], label [[COND_TRUE26:%.*]], label [[COND_FALSE27:%.*]] // CHECK-32: cond.true26: // CHECK-32-NEXT: br label [[COND_END28:%.*]] // CHECK-32: cond.false27: // CHECK-32-NEXT: [[TMP50:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: br label [[COND_END28]] // CHECK-32: cond.end28: // CHECK-32-NEXT: [[COND29:%.*]] = phi i32 [ 9, [[COND_TRUE26]] ], [ [[TMP50]], [[COND_FALSE27]] ] // CHECK-32-NEXT: store i32 [[COND29]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP51:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP51]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND12]], !llvm.loop [[LOOP134:![0-9]+]] // CHECK-32: omp.inner.for.end30: // CHECK-32-NEXT: br label [[OMP_IF_END]] // CHECK-32: omp_if.end: // CHECK-32-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-32: omp.loop.exit: // CHECK-32-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) // CHECK-32-NEXT: [[TMP52:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[TMP53:%.*]] = icmp ne i32 [[TMP52]], 0 // CHECK-32-NEXT: br i1 [[TMP53]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-32: .omp.final.then: // CHECK-32-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-32-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-32: .omp.final.done: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@__omp_outlined__1 // CHECK-32-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 // CHECK-32-NEXT: [[CONV:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR__ADDR]] to i8* // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[TMP2:%.*]] = load i8, i8* [[CONV]], align 1 // CHECK-32-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP2]] to i1 // CHECK-32-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] // CHECK-32: omp_if.then: // CHECK-32-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 // CHECK-32-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32: omp.inner.for.cond: // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP136:![0-9]+]] // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4, !llvm.access.group [[ACC_GRP136]] // CHECK-32-NEXT: [[CMP:%.*]] = icmp ule i32 [[TMP6]], [[TMP7]] // CHECK-32-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32: omp.inner.for.body: // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP136]] // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP136]] // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32: omp.body.continue: // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32: omp.inner.for.inc: // CHECK-32-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP136]] // CHECK-32-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP136]] // CHECK-32-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP9]], [[TMP10]] // CHECK-32-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP136]] // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP137:![0-9]+]] // CHECK-32: omp.inner.for.end: // CHECK-32-NEXT: br label [[OMP_IF_END:%.*]] // CHECK-32: omp_if.else: // CHECK-32-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 // CHECK-32-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP12]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) // CHECK-32-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND2:%.*]] // CHECK-32: omp.inner.for.cond2: // CHECK-32-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-NEXT: [[CMP3:%.*]] = icmp ule i32 [[TMP14]], [[TMP15]] // CHECK-32-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY4:%.*]], label [[OMP_INNER_FOR_END10:%.*]] // CHECK-32: omp.inner.for.body4: // CHECK-32-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[MUL5:%.*]] = mul nsw i32 [[TMP16]], 1 // CHECK-32-NEXT: [[ADD6:%.*]] = add nsw i32 0, [[MUL5]] // CHECK-32-NEXT: store i32 [[ADD6]], i32* [[I]], align 4 // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE7:%.*]] // CHECK-32: omp.body.continue7: // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC8:%.*]] // CHECK-32: omp.inner.for.inc8: // CHECK-32-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] // CHECK-32-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND2]], !llvm.loop [[LOOP139:![0-9]+]] // CHECK-32: omp.inner.for.end10: // CHECK-32-NEXT: br label [[OMP_IF_END]] // CHECK-32: omp_if.end: // CHECK-32-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-32: omp.loop.exit: // CHECK-32-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4 // CHECK-32-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP20]]) // CHECK-32-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0 // CHECK-32-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-32: .omp.final.then: // CHECK-32-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-32-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-32: .omp.final.done: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@__omp_outlined__2 // CHECK-32-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 // CHECK-32-NEXT: [[CONV:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR__ADDR]] to i8* // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[TMP2:%.*]] = load i8, i8* [[CONV]], align 1 // CHECK-32-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP2]] to i1 // CHECK-32-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] // CHECK-32: omp_if.then: // CHECK-32-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 // CHECK-32-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32: omp.inner.for.cond: // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP140:![0-9]+]] // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4, !llvm.access.group [[ACC_GRP140]] // CHECK-32-NEXT: [[CMP:%.*]] = icmp ule i32 [[TMP6]], [[TMP7]] // CHECK-32-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32: omp.inner.for.body: // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP140]] // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP140]] // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32: omp.body.continue: // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32: omp.inner.for.inc: // CHECK-32-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP140]] // CHECK-32-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP140]] // CHECK-32-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP9]], [[TMP10]] // CHECK-32-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP140]] // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP141:![0-9]+]] // CHECK-32: omp.inner.for.end: // CHECK-32-NEXT: br label [[OMP_IF_END:%.*]] // CHECK-32: omp_if.else: // CHECK-32-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 // CHECK-32-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP12]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) // CHECK-32-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND2:%.*]] // CHECK-32: omp.inner.for.cond2: // CHECK-32-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-NEXT: [[CMP3:%.*]] = icmp ule i32 [[TMP14]], [[TMP15]] // CHECK-32-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY4:%.*]], label [[OMP_INNER_FOR_END10:%.*]] // CHECK-32: omp.inner.for.body4: // CHECK-32-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[MUL5:%.*]] = mul nsw i32 [[TMP16]], 1 // CHECK-32-NEXT: [[ADD6:%.*]] = add nsw i32 0, [[MUL5]] // CHECK-32-NEXT: store i32 [[ADD6]], i32* [[I]], align 4 // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE7:%.*]] // CHECK-32: omp.body.continue7: // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC8:%.*]] // CHECK-32: omp.inner.for.inc8: // CHECK-32-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] // CHECK-32-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND2]], !llvm.loop [[LOOP143:![0-9]+]] // CHECK-32: omp.inner.for.end10: // CHECK-32-NEXT: br label [[OMP_IF_END]] // CHECK-32: omp_if.end: // CHECK-32-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-32: omp.loop.exit: // CHECK-32-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4 // CHECK-32-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP20]]) // CHECK-32-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0 // CHECK-32-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-32: .omp.final.then: // CHECK-32-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-32-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-32: .omp.final.done: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l18 // CHECK-32-SAME: () #[[ATTR0]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32: user_code.entry: // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 // CHECK-32-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4 // CHECK-32-NEXT: call void @__omp_outlined__3(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR2]] // CHECK-32-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-NEXT: ret void // CHECK-32: worker.exit: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@__omp_outlined__3 // CHECK-32-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x i8*], align 4 // CHECK-32-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block() // CHECK-32-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-32-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-32: cond.true: // CHECK-32-NEXT: br label [[COND_END:%.*]] // CHECK-32: cond.false: // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: br label [[COND_END]] // CHECK-32: cond.end: // CHECK-32-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-32-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32: omp.inner.for.cond: // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP144:![0-9]+]] // CHECK-32-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10 // CHECK-32-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32: omp.inner.for.body: // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP144]] // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP144]] // CHECK-32-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0 // CHECK-32-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to i8* // CHECK-32-NEXT: store i8* [[TMP9]], i8** [[TMP8]], align 4, !llvm.access.group [[ACC_GRP144]] // CHECK-32-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1 // CHECK-32-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to i8* // CHECK-32-NEXT: store i8* [[TMP11]], i8** [[TMP10]], align 4, !llvm.access.group [[ACC_GRP144]] // CHECK-32-NEXT: [[TMP12:%.*]] = bitcast [2 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32)* @__omp_outlined__4 to i8*), i8* null, i8** [[TMP12]], i32 2), !llvm.access.group [[ACC_GRP144]] // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32: omp.inner.for.inc: // CHECK-32-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP144]] // CHECK-32-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP144]] // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] // CHECK-32-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP144]] // CHECK-32-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP144]] // CHECK-32-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP144]] // CHECK-32-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] // CHECK-32-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP144]] // CHECK-32-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP144]] // CHECK-32-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP144]] // CHECK-32-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] // CHECK-32-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP144]] // CHECK-32-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP144]] // CHECK-32-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP19]], 9 // CHECK-32-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]] // CHECK-32: cond.true5: // CHECK-32-NEXT: br label [[COND_END7:%.*]] // CHECK-32: cond.false6: // CHECK-32-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP144]] // CHECK-32-NEXT: br label [[COND_END7]] // CHECK-32: cond.end7: // CHECK-32-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP20]], [[COND_FALSE6]] ] // CHECK-32-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP144]] // CHECK-32-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP144]] // CHECK-32-NEXT: store i32 [[TMP21]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP144]] // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP145:![0-9]+]] // CHECK-32: omp.inner.for.end: // CHECK-32-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-32: omp.loop.exit: // CHECK-32-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) // CHECK-32-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 // CHECK-32-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-32: .omp.final.then: // CHECK-32-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-32-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-32: .omp.final.done: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@__omp_outlined__4 // CHECK-32-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 // CHECK-32-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 9 // CHECK-32-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-32: cond.true: // CHECK-32-NEXT: br label [[COND_END:%.*]] // CHECK-32: cond.false: // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: br label [[COND_END]] // CHECK-32: cond.end: // CHECK-32-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] // CHECK-32-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32: omp.inner.for.cond: // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP147:![0-9]+]] // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP147]] // CHECK-32-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] // CHECK-32-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32: omp.inner.for.body: // CHECK-32-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP147]] // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP147]] // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32: omp.body.continue: // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32: omp.inner.for.inc: // CHECK-32-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP147]] // CHECK-32-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 // CHECK-32-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP147]] // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP148:![0-9]+]] // CHECK-32: omp.inner.for.end: // CHECK-32-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-32: omp.loop.exit: // CHECK-32-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]]) // CHECK-32-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0 // CHECK-32-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-32: .omp.final.then: // CHECK-32-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-32-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-32: .omp.final.done: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l21 // CHECK-32-SAME: () #[[ATTR0]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32: user_code.entry: // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 // CHECK-32-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4 // CHECK-32-NEXT: call void @__omp_outlined__5(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR2]] // CHECK-32-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-NEXT: ret void // CHECK-32: worker.exit: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@__omp_outlined__5 // CHECK-32-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x i8*], align 4 // CHECK-32-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block() // CHECK-32-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-32-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-32: cond.true: // CHECK-32-NEXT: br label [[COND_END:%.*]] // CHECK-32: cond.false: // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: br label [[COND_END]] // CHECK-32: cond.end: // CHECK-32-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-32-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32: omp.inner.for.cond: // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP150:![0-9]+]] // CHECK-32-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10 // CHECK-32-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32: omp.inner.for.body: // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP150]] // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP150]] // CHECK-32-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0 // CHECK-32-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to i8* // CHECK-32-NEXT: store i8* [[TMP9]], i8** [[TMP8]], align 4, !llvm.access.group [[ACC_GRP150]] // CHECK-32-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1 // CHECK-32-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to i8* // CHECK-32-NEXT: store i8* [[TMP11]], i8** [[TMP10]], align 4, !llvm.access.group [[ACC_GRP150]] // CHECK-32-NEXT: [[TMP12:%.*]] = bitcast [2 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32)* @__omp_outlined__6 to i8*), i8* null, i8** [[TMP12]], i32 2), !llvm.access.group [[ACC_GRP150]] // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32: omp.inner.for.inc: // CHECK-32-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP150]] // CHECK-32-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP150]] // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] // CHECK-32-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP150]] // CHECK-32-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP150]] // CHECK-32-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP150]] // CHECK-32-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] // CHECK-32-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP150]] // CHECK-32-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP150]] // CHECK-32-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP150]] // CHECK-32-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] // CHECK-32-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP150]] // CHECK-32-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP150]] // CHECK-32-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP19]], 9 // CHECK-32-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]] // CHECK-32: cond.true5: // CHECK-32-NEXT: br label [[COND_END7:%.*]] // CHECK-32: cond.false6: // CHECK-32-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP150]] // CHECK-32-NEXT: br label [[COND_END7]] // CHECK-32: cond.end7: // CHECK-32-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP20]], [[COND_FALSE6]] ] // CHECK-32-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP150]] // CHECK-32-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP150]] // CHECK-32-NEXT: store i32 [[TMP21]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP150]] // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP151:![0-9]+]] // CHECK-32: omp.inner.for.end: // CHECK-32-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-32: omp.loop.exit: // CHECK-32-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) // CHECK-32-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 // CHECK-32-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-32: .omp.final.then: // CHECK-32-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-32-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-32: .omp.final.done: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@__omp_outlined__6 // CHECK-32-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 // CHECK-32-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP3]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32: omp.inner.for.cond: // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP153:![0-9]+]] // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4, !llvm.access.group [[ACC_GRP153]] // CHECK-32-NEXT: [[CMP:%.*]] = icmp ule i32 [[TMP5]], [[TMP6]] // CHECK-32-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32: omp.inner.for.body: // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP153]] // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP153]] // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32: omp.body.continue: // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32: omp.inner.for.inc: // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP153]] // CHECK-32-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP153]] // CHECK-32-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP8]], [[TMP9]] // CHECK-32-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP153]] // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP154:![0-9]+]] // CHECK-32: omp.inner.for.end: // CHECK-32-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-32: omp.loop.exit: // CHECK-32-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]]) // CHECK-32-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[TMP11:%.*]] = icmp ne i32 [[TMP10]], 0 // CHECK-32-NEXT: br i1 [[TMP11]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-32: .omp.final.then: // CHECK-32-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-32-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-32: .omp.final.done: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l24 // CHECK-32-SAME: () #[[ATTR0]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32: user_code.entry: // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 // CHECK-32-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4 // CHECK-32-NEXT: call void @__omp_outlined__7(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR2]] // CHECK-32-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-NEXT: ret void // CHECK-32: worker.exit: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@__omp_outlined__7 // CHECK-32-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x i8*], align 4 // CHECK-32-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block() // CHECK-32-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-32-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-32: cond.true: // CHECK-32-NEXT: br label [[COND_END:%.*]] // CHECK-32: cond.false: // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: br label [[COND_END]] // CHECK-32: cond.end: // CHECK-32-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-32-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32: omp.inner.for.cond: // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP156:![0-9]+]] // CHECK-32-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10 // CHECK-32-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32: omp.inner.for.body: // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP156]] // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP156]] // CHECK-32-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0 // CHECK-32-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to i8* // CHECK-32-NEXT: store i8* [[TMP9]], i8** [[TMP8]], align 4, !llvm.access.group [[ACC_GRP156]] // CHECK-32-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1 // CHECK-32-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to i8* // CHECK-32-NEXT: store i8* [[TMP11]], i8** [[TMP10]], align 4, !llvm.access.group [[ACC_GRP156]] // CHECK-32-NEXT: [[TMP12:%.*]] = bitcast [2 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32)* @__omp_outlined__8 to i8*), i8* null, i8** [[TMP12]], i32 2), !llvm.access.group [[ACC_GRP156]] // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32: omp.inner.for.inc: // CHECK-32-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP156]] // CHECK-32-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP156]] // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] // CHECK-32-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP156]] // CHECK-32-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP156]] // CHECK-32-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP156]] // CHECK-32-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] // CHECK-32-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP156]] // CHECK-32-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP156]] // CHECK-32-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP156]] // CHECK-32-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] // CHECK-32-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP156]] // CHECK-32-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP156]] // CHECK-32-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP19]], 9 // CHECK-32-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]] // CHECK-32: cond.true5: // CHECK-32-NEXT: br label [[COND_END7:%.*]] // CHECK-32: cond.false6: // CHECK-32-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP156]] // CHECK-32-NEXT: br label [[COND_END7]] // CHECK-32: cond.end7: // CHECK-32-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP20]], [[COND_FALSE6]] ] // CHECK-32-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP156]] // CHECK-32-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP156]] // CHECK-32-NEXT: store i32 [[TMP21]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP156]] // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP157:![0-9]+]] // CHECK-32: omp.inner.for.end: // CHECK-32-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-32: omp.loop.exit: // CHECK-32-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) // CHECK-32-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 // CHECK-32-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-32: .omp.final.then: // CHECK-32-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-32-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-32: .omp.final.done: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@__omp_outlined__8 // CHECK-32-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 // CHECK-32-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 1073741862, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1) // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-32: omp.dispatch.cond: // CHECK-32-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-32-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0 // CHECK-32-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-32: omp.dispatch.body: // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32: omp.inner.for.cond: // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP159:![0-9]+]] // CHECK-32-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP159]] // CHECK-32-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] // CHECK-32-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32: omp.inner.for.body: // CHECK-32-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP159]] // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP159]] // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32: omp.body.continue: // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32: omp.inner.for.inc: // CHECK-32-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP159]] // CHECK-32-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP11]], 1 // CHECK-32-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP159]] // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP160:![0-9]+]] // CHECK-32: omp.inner.for.end: // CHECK-32-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-32: omp.dispatch.inc: // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-32: omp.dispatch.end: // CHECK-32-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0 // CHECK-32-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-32: .omp.final.then: // CHECK-32-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-32-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-32: .omp.final.done: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l27 // CHECK-32-SAME: () #[[ATTR0]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32: user_code.entry: // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 // CHECK-32-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4 // CHECK-32-NEXT: call void @__omp_outlined__9(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR2]] // CHECK-32-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-NEXT: ret void // CHECK-32: worker.exit: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@__omp_outlined__9 // CHECK-32-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x i8*], align 4 // CHECK-32-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block() // CHECK-32-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-32-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-32: cond.true: // CHECK-32-NEXT: br label [[COND_END:%.*]] // CHECK-32: cond.false: // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: br label [[COND_END]] // CHECK-32: cond.end: // CHECK-32-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-32-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32: omp.inner.for.cond: // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP162:![0-9]+]] // CHECK-32-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10 // CHECK-32-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32: omp.inner.for.body: // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP162]] // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP162]] // CHECK-32-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0 // CHECK-32-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to i8* // CHECK-32-NEXT: store i8* [[TMP9]], i8** [[TMP8]], align 4, !llvm.access.group [[ACC_GRP162]] // CHECK-32-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1 // CHECK-32-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to i8* // CHECK-32-NEXT: store i8* [[TMP11]], i8** [[TMP10]], align 4, !llvm.access.group [[ACC_GRP162]] // CHECK-32-NEXT: [[TMP12:%.*]] = bitcast [2 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32)* @__omp_outlined__10 to i8*), i8* null, i8** [[TMP12]], i32 2), !llvm.access.group [[ACC_GRP162]] // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32: omp.inner.for.inc: // CHECK-32-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP162]] // CHECK-32-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP162]] // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] // CHECK-32-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP162]] // CHECK-32-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP162]] // CHECK-32-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP162]] // CHECK-32-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] // CHECK-32-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP162]] // CHECK-32-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP162]] // CHECK-32-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP162]] // CHECK-32-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] // CHECK-32-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP162]] // CHECK-32-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP162]] // CHECK-32-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP19]], 9 // CHECK-32-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]] // CHECK-32: cond.true5: // CHECK-32-NEXT: br label [[COND_END7:%.*]] // CHECK-32: cond.false6: // CHECK-32-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP162]] // CHECK-32-NEXT: br label [[COND_END7]] // CHECK-32: cond.end7: // CHECK-32-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP20]], [[COND_FALSE6]] ] // CHECK-32-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP162]] // CHECK-32-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP162]] // CHECK-32-NEXT: store i32 [[TMP21]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP162]] // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP163:![0-9]+]] // CHECK-32: omp.inner.for.end: // CHECK-32-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-32: omp.loop.exit: // CHECK-32-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) // CHECK-32-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 // CHECK-32-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-32: .omp.final.then: // CHECK-32-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-32-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-32: .omp.final.done: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@__omp_outlined__10 // CHECK-32-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 // CHECK-32-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 1073741861, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1) // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-32: omp.dispatch.cond: // CHECK-32-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-32-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0 // CHECK-32-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-32: omp.dispatch.body: // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32: omp.inner.for.cond: // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP165:![0-9]+]] // CHECK-32-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP165]] // CHECK-32-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] // CHECK-32-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32: omp.inner.for.body: // CHECK-32-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP165]] // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP165]] // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32: omp.body.continue: // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32: omp.inner.for.inc: // CHECK-32-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP165]] // CHECK-32-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP11]], 1 // CHECK-32-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP165]] // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP166:![0-9]+]] // CHECK-32: omp.inner.for.end: // CHECK-32-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-32: omp.dispatch.inc: // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-32: omp.dispatch.end: // CHECK-32-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0 // CHECK-32-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-32: .omp.final.then: // CHECK-32-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-32-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-32: .omp.final.done: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l30 // CHECK-32-SAME: () #[[ATTR0]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32: user_code.entry: // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 // CHECK-32-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4 // CHECK-32-NEXT: call void @__omp_outlined__11(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR2]] // CHECK-32-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-NEXT: ret void // CHECK-32: worker.exit: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@__omp_outlined__11 // CHECK-32-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x i8*], align 4 // CHECK-32-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block() // CHECK-32-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-32-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-32: cond.true: // CHECK-32-NEXT: br label [[COND_END:%.*]] // CHECK-32: cond.false: // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: br label [[COND_END]] // CHECK-32: cond.end: // CHECK-32-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-32-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32: omp.inner.for.cond: // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP168:![0-9]+]] // CHECK-32-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10 // CHECK-32-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32: omp.inner.for.body: // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP168]] // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP168]] // CHECK-32-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0 // CHECK-32-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to i8* // CHECK-32-NEXT: store i8* [[TMP9]], i8** [[TMP8]], align 4, !llvm.access.group [[ACC_GRP168]] // CHECK-32-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1 // CHECK-32-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to i8* // CHECK-32-NEXT: store i8* [[TMP11]], i8** [[TMP10]], align 4, !llvm.access.group [[ACC_GRP168]] // CHECK-32-NEXT: [[TMP12:%.*]] = bitcast [2 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32)* @__omp_outlined__12 to i8*), i8* null, i8** [[TMP12]], i32 2), !llvm.access.group [[ACC_GRP168]] // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32: omp.inner.for.inc: // CHECK-32-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP168]] // CHECK-32-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP168]] // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] // CHECK-32-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP168]] // CHECK-32-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP168]] // CHECK-32-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP168]] // CHECK-32-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] // CHECK-32-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP168]] // CHECK-32-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP168]] // CHECK-32-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP168]] // CHECK-32-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] // CHECK-32-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP168]] // CHECK-32-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP168]] // CHECK-32-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP19]], 9 // CHECK-32-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]] // CHECK-32: cond.true5: // CHECK-32-NEXT: br label [[COND_END7:%.*]] // CHECK-32: cond.false6: // CHECK-32-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP168]] // CHECK-32-NEXT: br label [[COND_END7]] // CHECK-32: cond.end7: // CHECK-32-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP20]], [[COND_FALSE6]] ] // CHECK-32-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP168]] // CHECK-32-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP168]] // CHECK-32-NEXT: store i32 [[TMP21]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP168]] // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP169:![0-9]+]] // CHECK-32: omp.inner.for.end: // CHECK-32-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-32: omp.loop.exit: // CHECK-32-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) // CHECK-32-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 // CHECK-32-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-32: .omp.final.then: // CHECK-32-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-32-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-32: .omp.final.done: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@__omp_outlined__12 // CHECK-32-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 // CHECK-32-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 1073741859, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1) // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-32: omp.dispatch.cond: // CHECK-32-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-32-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0 // CHECK-32-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-32: omp.dispatch.body: // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32: omp.inner.for.cond: // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP171:![0-9]+]] // CHECK-32-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP171]] // CHECK-32-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] // CHECK-32-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32: omp.inner.for.body: // CHECK-32-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP171]] // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP171]] // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32: omp.body.continue: // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32: omp.inner.for.inc: // CHECK-32-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP171]] // CHECK-32-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP11]], 1 // CHECK-32-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP171]] // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP172:![0-9]+]] // CHECK-32: omp.inner.for.end: // CHECK-32-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-32: omp.dispatch.inc: // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-32: omp.dispatch.end: // CHECK-32-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0 // CHECK-32-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-32: .omp.final.then: // CHECK-32-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-32-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-32: .omp.final.done: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l33 // CHECK-32-SAME: () #[[ATTR0]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32: user_code.entry: // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 // CHECK-32-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4 // CHECK-32-NEXT: call void @__omp_outlined__13(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR2]] // CHECK-32-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-NEXT: ret void // CHECK-32: worker.exit: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@__omp_outlined__13 // CHECK-32-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x i8*], align 4 // CHECK-32-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block() // CHECK-32-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-32-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-32: cond.true: // CHECK-32-NEXT: br label [[COND_END:%.*]] // CHECK-32: cond.false: // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: br label [[COND_END]] // CHECK-32: cond.end: // CHECK-32-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-32-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32: omp.inner.for.cond: // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP174:![0-9]+]] // CHECK-32-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10 // CHECK-32-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32: omp.inner.for.body: // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP174]] // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP174]] // CHECK-32-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0 // CHECK-32-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to i8* // CHECK-32-NEXT: store i8* [[TMP9]], i8** [[TMP8]], align 4, !llvm.access.group [[ACC_GRP174]] // CHECK-32-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1 // CHECK-32-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to i8* // CHECK-32-NEXT: store i8* [[TMP11]], i8** [[TMP10]], align 4, !llvm.access.group [[ACC_GRP174]] // CHECK-32-NEXT: [[TMP12:%.*]] = bitcast [2 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32)* @__omp_outlined__14 to i8*), i8* null, i8** [[TMP12]], i32 2), !llvm.access.group [[ACC_GRP174]] // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32: omp.inner.for.inc: // CHECK-32-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP174]] // CHECK-32-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP174]] // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] // CHECK-32-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP174]] // CHECK-32-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP174]] // CHECK-32-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP174]] // CHECK-32-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] // CHECK-32-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP174]] // CHECK-32-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP174]] // CHECK-32-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP174]] // CHECK-32-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] // CHECK-32-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP174]] // CHECK-32-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP174]] // CHECK-32-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP19]], 9 // CHECK-32-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]] // CHECK-32: cond.true5: // CHECK-32-NEXT: br label [[COND_END7:%.*]] // CHECK-32: cond.false6: // CHECK-32-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP174]] // CHECK-32-NEXT: br label [[COND_END7]] // CHECK-32: cond.end7: // CHECK-32-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP20]], [[COND_FALSE6]] ] // CHECK-32-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP174]] // CHECK-32-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP174]] // CHECK-32-NEXT: store i32 [[TMP21]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP174]] // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP175:![0-9]+]] // CHECK-32: omp.inner.for.end: // CHECK-32-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-32: omp.loop.exit: // CHECK-32-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) // CHECK-32-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 // CHECK-32-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-32: .omp.final.then: // CHECK-32-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-32-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-32: .omp.final.done: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@__omp_outlined__14 // CHECK-32-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 // CHECK-32-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 1073741860, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1) // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-32: omp.dispatch.cond: // CHECK-32-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-32-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0 // CHECK-32-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-32: omp.dispatch.body: // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32: omp.inner.for.cond: // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP177:![0-9]+]] // CHECK-32-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP177]] // CHECK-32-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] // CHECK-32-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32: omp.inner.for.body: // CHECK-32-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP177]] // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP177]] // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32: omp.body.continue: // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32: omp.inner.for.inc: // CHECK-32-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP177]] // CHECK-32-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP11]], 1 // CHECK-32-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP177]] // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP178:![0-9]+]] // CHECK-32: omp.inner.for.end: // CHECK-32-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-32: omp.dispatch.inc: // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-32: omp.dispatch.end: // CHECK-32-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0 // CHECK-32-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-32: .omp.final.then: // CHECK-32-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-32-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-32: .omp.final.done: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l37 // CHECK-32-SAME: (i32 noundef [[A:%.*]]) #[[ATTR0]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32: user_code.entry: // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, i32* [[A_ADDR]], align 4 // CHECK-32-NEXT: store i32 [[TMP2]], i32* [[A_CASTED]], align 4 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, i32* [[A_CASTED]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 // CHECK-32-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4 // CHECK-32-NEXT: call void @__omp_outlined__15(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i32 [[TMP3]]) #[[ATTR2]] // CHECK-32-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-NEXT: ret void // CHECK-32: worker.exit: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@__omp_outlined__15 // CHECK-32-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[A:%.*]]) #[[ATTR1]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [3 x i8*], align 4 // CHECK-32-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 // CHECK-32-NEXT: [[A1:%.*]] = call align 8 i8* @__kmpc_alloc_shared(i32 4) // CHECK-32-NEXT: [[A_ON_STACK:%.*]] = bitcast i8* [[A1]] to i32* // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block() // CHECK-32-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-32-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-32: cond.true: // CHECK-32-NEXT: br label [[COND_END:%.*]] // CHECK-32: cond.false: // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: br label [[COND_END]] // CHECK-32: cond.end: // CHECK-32-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-32-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32: omp.inner.for.cond: // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[CMP2:%.*]] = icmp slt i32 [[TMP5]], 10 // CHECK-32-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32: omp.inner.for.body: // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, i32* [[A_ON_STACK]], align 4 // CHECK-32-NEXT: store i32 [[TMP8]], i32* [[A_CASTED]], align 4 // CHECK-32-NEXT: [[TMP9:%.*]] = load i32, i32* [[A_CASTED]], align 4 // CHECK-32-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0 // CHECK-32-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP6]] to i8* // CHECK-32-NEXT: store i8* [[TMP11]], i8** [[TMP10]], align 4 // CHECK-32-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1 // CHECK-32-NEXT: [[TMP13:%.*]] = inttoptr i32 [[TMP7]] to i8* // CHECK-32-NEXT: store i8* [[TMP13]], i8** [[TMP12]], align 4 // CHECK-32-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2 // CHECK-32-NEXT: [[TMP15:%.*]] = inttoptr i32 [[TMP9]] to i8* // CHECK-32-NEXT: store i8* [[TMP15]], i8** [[TMP14]], align 4 // CHECK-32-NEXT: [[TMP16:%.*]] = bitcast [3 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, i32)* @__omp_outlined__16 to i8*), i8* null, i8** [[TMP16]], i32 3) // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32: omp.inner.for.inc: // CHECK-32-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] // CHECK-32-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] // CHECK-32-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] // CHECK-32-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP23]], 9 // CHECK-32-NEXT: br i1 [[CMP5]], label [[COND_TRUE6:%.*]], label [[COND_FALSE7:%.*]] // CHECK-32: cond.true6: // CHECK-32-NEXT: br label [[COND_END8:%.*]] // CHECK-32: cond.false7: // CHECK-32-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: br label [[COND_END8]] // CHECK-32: cond.end8: // CHECK-32-NEXT: [[COND9:%.*]] = phi i32 [ 9, [[COND_TRUE6]] ], [ [[TMP24]], [[COND_FALSE7]] ] // CHECK-32-NEXT: store i32 [[COND9]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP25]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK-32: omp.inner.for.end: // CHECK-32-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-32: omp.loop.exit: // CHECK-32-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) // CHECK-32-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[TMP27:%.*]] = icmp ne i32 [[TMP26]], 0 // CHECK-32-NEXT: br i1 [[TMP27]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] // CHECK-32: .omp.lastprivate.then: // CHECK-32-NEXT: [[TMP28:%.*]] = load i32, i32* [[A_ON_STACK]], align 4 // CHECK-32-NEXT: store i32 [[TMP28]], i32* [[A_ADDR]], align 4 // CHECK-32-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] // CHECK-32: .omp.lastprivate.done: // CHECK-32-NEXT: call void @__kmpc_free_shared(i8* [[A1]], i32 4) // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@__omp_outlined__16 // CHECK-32-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32 noundef [[A:%.*]]) #[[ATTR1]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[A1:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 // CHECK-32-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP3]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32: omp.inner.for.cond: // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-NEXT: [[CMP:%.*]] = icmp ule i32 [[TMP5]], [[TMP6]] // CHECK-32-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32: omp.inner.for.body: // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-NEXT: store i32 [[ADD]], i32* [[I]], align 4 // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, i32* [[I]], align 4 // CHECK-32-NEXT: store i32 [[TMP8]], i32* [[A1]], align 4 // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32: omp.body.continue: // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32: omp.inner.for.inc: // CHECK-32-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP9]], [[TMP10]] // CHECK-32-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK-32: omp.inner.for.end: // CHECK-32-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-32: omp.loop.exit: // CHECK-32-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]]) // CHECK-32-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0 // CHECK-32-NEXT: br i1 [[TMP12]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] // CHECK-32: .omp.lastprivate.then: // CHECK-32-NEXT: [[TMP13:%.*]] = load i32, i32* [[A1]], align 4 // CHECK-32-NEXT: store i32 [[TMP13]], i32* [[A_ADDR]], align 4 // CHECK-32-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] // CHECK-32: .omp.lastprivate.done: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l40 // CHECK-32-SAME: () #[[ATTR0]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32: user_code.entry: // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 // CHECK-32-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4 // CHECK-32-NEXT: call void @__omp_outlined__17(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR2]] // CHECK-32-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-NEXT: ret void // CHECK-32: worker.exit: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@__omp_outlined__17 // CHECK-32-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x i8*], align 4 // CHECK-32-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block() // CHECK-32-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-32-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-32: cond.true: // CHECK-32-NEXT: br label [[COND_END:%.*]] // CHECK-32: cond.false: // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: br label [[COND_END]] // CHECK-32: cond.end: // CHECK-32-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-32-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32: omp.inner.for.cond: // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10 // CHECK-32-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32: omp.inner.for.body: // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0 // CHECK-32-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to i8* // CHECK-32-NEXT: store i8* [[TMP9]], i8** [[TMP8]], align 4 // CHECK-32-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1 // CHECK-32-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to i8* // CHECK-32-NEXT: store i8* [[TMP11]], i8** [[TMP10]], align 4 // CHECK-32-NEXT: [[TMP12:%.*]] = bitcast [2 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32)* @__omp_outlined__18 to i8*), i8* null, i8** [[TMP12]], i32 2) // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32: omp.inner.for.inc: // CHECK-32-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] // CHECK-32-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] // CHECK-32-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] // CHECK-32-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP19]], 9 // CHECK-32-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]] // CHECK-32: cond.true5: // CHECK-32-NEXT: br label [[COND_END7:%.*]] // CHECK-32: cond.false6: // CHECK-32-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: br label [[COND_END7]] // CHECK-32: cond.end7: // CHECK-32-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP20]], [[COND_FALSE6]] ] // CHECK-32-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP21]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK-32: omp.inner.for.end: // CHECK-32-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-32: omp.loop.exit: // CHECK-32-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@__omp_outlined__18 // CHECK-32-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 // CHECK-32-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 9 // CHECK-32-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-32: cond.true: // CHECK-32-NEXT: br label [[COND_END:%.*]] // CHECK-32: cond.false: // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: br label [[COND_END]] // CHECK-32: cond.end: // CHECK-32-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] // CHECK-32-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32: omp.inner.for.cond: // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] // CHECK-32-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32: omp.inner.for.body: // CHECK-32-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-NEXT: store i32 [[ADD]], i32* [[I]], align 4 // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32: omp.body.continue: // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32: omp.inner.for.inc: // CHECK-32-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 // CHECK-32-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK-32: omp.inner.for.end: // CHECK-32-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-32: omp.loop.exit: // CHECK-32-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]]) // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l43 // CHECK-32-SAME: () #[[ATTR0]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32: user_code.entry: // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 // CHECK-32-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4 // CHECK-32-NEXT: call void @__omp_outlined__19(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR2]] // CHECK-32-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-NEXT: ret void // CHECK-32: worker.exit: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@__omp_outlined__19 // CHECK-32-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x i8*], align 4 // CHECK-32-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block() // CHECK-32-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-32-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-32: cond.true: // CHECK-32-NEXT: br label [[COND_END:%.*]] // CHECK-32: cond.false: // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: br label [[COND_END]] // CHECK-32: cond.end: // CHECK-32-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-32-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32: omp.inner.for.cond: // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10 // CHECK-32-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32: omp.inner.for.body: // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0 // CHECK-32-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to i8* // CHECK-32-NEXT: store i8* [[TMP9]], i8** [[TMP8]], align 4 // CHECK-32-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1 // CHECK-32-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to i8* // CHECK-32-NEXT: store i8* [[TMP11]], i8** [[TMP10]], align 4 // CHECK-32-NEXT: [[TMP12:%.*]] = bitcast [2 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32)* @__omp_outlined__20 to i8*), i8* null, i8** [[TMP12]], i32 2) // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32: omp.inner.for.inc: // CHECK-32-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] // CHECK-32-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] // CHECK-32-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] // CHECK-32-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP19]], 9 // CHECK-32-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]] // CHECK-32: cond.true5: // CHECK-32-NEXT: br label [[COND_END7:%.*]] // CHECK-32: cond.false6: // CHECK-32-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: br label [[COND_END7]] // CHECK-32: cond.end7: // CHECK-32-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP20]], [[COND_FALSE6]] ] // CHECK-32-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP21]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK-32: omp.inner.for.end: // CHECK-32-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-32: omp.loop.exit: // CHECK-32-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@__omp_outlined__20 // CHECK-32-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 // CHECK-32-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP3]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32: omp.inner.for.cond: // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-NEXT: [[CMP:%.*]] = icmp ule i32 [[TMP5]], [[TMP6]] // CHECK-32-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32: omp.inner.for.body: // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-NEXT: store i32 [[ADD]], i32* [[I]], align 4 // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32: omp.body.continue: // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32: omp.inner.for.inc: // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP8]], [[TMP9]] // CHECK-32-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK-32: omp.inner.for.end: // CHECK-32-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-32: omp.loop.exit: // CHECK-32-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]]) // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l46 // CHECK-32-SAME: () #[[ATTR0]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32: user_code.entry: // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 // CHECK-32-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4 // CHECK-32-NEXT: call void @__omp_outlined__21(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR2]] // CHECK-32-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-NEXT: ret void // CHECK-32: worker.exit: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@__omp_outlined__21 // CHECK-32-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x i8*], align 4 // CHECK-32-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block() // CHECK-32-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-32-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-32: cond.true: // CHECK-32-NEXT: br label [[COND_END:%.*]] // CHECK-32: cond.false: // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: br label [[COND_END]] // CHECK-32: cond.end: // CHECK-32-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-32-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32: omp.inner.for.cond: // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10 // CHECK-32-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32: omp.inner.for.body: // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0 // CHECK-32-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to i8* // CHECK-32-NEXT: store i8* [[TMP9]], i8** [[TMP8]], align 4 // CHECK-32-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1 // CHECK-32-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to i8* // CHECK-32-NEXT: store i8* [[TMP11]], i8** [[TMP10]], align 4 // CHECK-32-NEXT: [[TMP12:%.*]] = bitcast [2 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32)* @__omp_outlined__22 to i8*), i8* null, i8** [[TMP12]], i32 2) // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32: omp.inner.for.inc: // CHECK-32-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] // CHECK-32-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] // CHECK-32-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] // CHECK-32-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP19]], 9 // CHECK-32-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]] // CHECK-32: cond.true5: // CHECK-32-NEXT: br label [[COND_END7:%.*]] // CHECK-32: cond.false6: // CHECK-32-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: br label [[COND_END7]] // CHECK-32: cond.end7: // CHECK-32-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP20]], [[COND_FALSE6]] ] // CHECK-32-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP21]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK-32: omp.inner.for.end: // CHECK-32-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-32: omp.loop.exit: // CHECK-32-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@__omp_outlined__22 // CHECK-32-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 // CHECK-32-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 1073741862, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1) // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-32: omp.dispatch.cond: // CHECK-32-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-32-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0 // CHECK-32-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-32: omp.dispatch.body: // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32: omp.inner.for.cond: // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP180:![0-9]+]] // CHECK-32-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP180]] // CHECK-32-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] // CHECK-32-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32: omp.inner.for.body: // CHECK-32-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP180]] // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP180]] // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32: omp.body.continue: // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32: omp.inner.for.inc: // CHECK-32-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP180]] // CHECK-32-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP11]], 1 // CHECK-32-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP180]] // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP181:![0-9]+]] // CHECK-32: omp.inner.for.end: // CHECK-32-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-32: omp.dispatch.inc: // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-32: omp.dispatch.end: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l49 // CHECK-32-SAME: () #[[ATTR0]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32: user_code.entry: // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 // CHECK-32-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4 // CHECK-32-NEXT: call void @__omp_outlined__23(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR2]] // CHECK-32-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-NEXT: ret void // CHECK-32: worker.exit: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@__omp_outlined__23 // CHECK-32-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x i8*], align 4 // CHECK-32-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block() // CHECK-32-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-32-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-32: cond.true: // CHECK-32-NEXT: br label [[COND_END:%.*]] // CHECK-32: cond.false: // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: br label [[COND_END]] // CHECK-32: cond.end: // CHECK-32-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-32-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32: omp.inner.for.cond: // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10 // CHECK-32-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32: omp.inner.for.body: // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0 // CHECK-32-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to i8* // CHECK-32-NEXT: store i8* [[TMP9]], i8** [[TMP8]], align 4 // CHECK-32-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1 // CHECK-32-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to i8* // CHECK-32-NEXT: store i8* [[TMP11]], i8** [[TMP10]], align 4 // CHECK-32-NEXT: [[TMP12:%.*]] = bitcast [2 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32)* @__omp_outlined__24 to i8*), i8* null, i8** [[TMP12]], i32 2) // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32: omp.inner.for.inc: // CHECK-32-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] // CHECK-32-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] // CHECK-32-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] // CHECK-32-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP19]], 9 // CHECK-32-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]] // CHECK-32: cond.true5: // CHECK-32-NEXT: br label [[COND_END7:%.*]] // CHECK-32: cond.false6: // CHECK-32-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: br label [[COND_END7]] // CHECK-32: cond.end7: // CHECK-32-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP20]], [[COND_FALSE6]] ] // CHECK-32-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP21]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK-32: omp.inner.for.end: // CHECK-32-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-32: omp.loop.exit: // CHECK-32-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@__omp_outlined__24 // CHECK-32-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 // CHECK-32-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 1073741861, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1) // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-32: omp.dispatch.cond: // CHECK-32-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-32-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0 // CHECK-32-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-32: omp.dispatch.body: // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32: omp.inner.for.cond: // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP183:![0-9]+]] // CHECK-32-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP183]] // CHECK-32-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] // CHECK-32-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32: omp.inner.for.body: // CHECK-32-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP183]] // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP183]] // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32: omp.body.continue: // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32: omp.inner.for.inc: // CHECK-32-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP183]] // CHECK-32-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP11]], 1 // CHECK-32-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP183]] // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP184:![0-9]+]] // CHECK-32: omp.inner.for.end: // CHECK-32-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-32: omp.dispatch.inc: // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-32: omp.dispatch.end: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l52 // CHECK-32-SAME: () #[[ATTR0]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32: user_code.entry: // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 // CHECK-32-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4 // CHECK-32-NEXT: call void @__omp_outlined__25(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR2]] // CHECK-32-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-NEXT: ret void // CHECK-32: worker.exit: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@__omp_outlined__25 // CHECK-32-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x i8*], align 4 // CHECK-32-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block() // CHECK-32-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-32-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-32: cond.true: // CHECK-32-NEXT: br label [[COND_END:%.*]] // CHECK-32: cond.false: // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: br label [[COND_END]] // CHECK-32: cond.end: // CHECK-32-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-32-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32: omp.inner.for.cond: // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10 // CHECK-32-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32: omp.inner.for.body: // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0 // CHECK-32-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to i8* // CHECK-32-NEXT: store i8* [[TMP9]], i8** [[TMP8]], align 4 // CHECK-32-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1 // CHECK-32-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to i8* // CHECK-32-NEXT: store i8* [[TMP11]], i8** [[TMP10]], align 4 // CHECK-32-NEXT: [[TMP12:%.*]] = bitcast [2 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32)* @__omp_outlined__26 to i8*), i8* null, i8** [[TMP12]], i32 2) // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32: omp.inner.for.inc: // CHECK-32-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] // CHECK-32-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] // CHECK-32-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] // CHECK-32-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP19]], 9 // CHECK-32-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]] // CHECK-32: cond.true5: // CHECK-32-NEXT: br label [[COND_END7:%.*]] // CHECK-32: cond.false6: // CHECK-32-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: br label [[COND_END7]] // CHECK-32: cond.end7: // CHECK-32-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP20]], [[COND_FALSE6]] ] // CHECK-32-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP21]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK-32: omp.inner.for.end: // CHECK-32-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-32: omp.loop.exit: // CHECK-32-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@__omp_outlined__26 // CHECK-32-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 // CHECK-32-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 1073741859, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1) // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-32: omp.dispatch.cond: // CHECK-32-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-32-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0 // CHECK-32-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-32: omp.dispatch.body: // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32: omp.inner.for.cond: // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP186:![0-9]+]] // CHECK-32-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP186]] // CHECK-32-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] // CHECK-32-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32: omp.inner.for.body: // CHECK-32-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP186]] // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP186]] // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32: omp.body.continue: // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32: omp.inner.for.inc: // CHECK-32-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP186]] // CHECK-32-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP11]], 1 // CHECK-32-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP186]] // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP187:![0-9]+]] // CHECK-32: omp.inner.for.end: // CHECK-32-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-32: omp.dispatch.inc: // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-32: omp.dispatch.end: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l55 // CHECK-32-SAME: () #[[ATTR0]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32: user_code.entry: // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 // CHECK-32-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4 // CHECK-32-NEXT: call void @__omp_outlined__27(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR2]] // CHECK-32-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-NEXT: ret void // CHECK-32: worker.exit: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@__omp_outlined__27 // CHECK-32-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x i8*], align 4 // CHECK-32-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block() // CHECK-32-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-32-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-32: cond.true: // CHECK-32-NEXT: br label [[COND_END:%.*]] // CHECK-32: cond.false: // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: br label [[COND_END]] // CHECK-32: cond.end: // CHECK-32-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-32-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32: omp.inner.for.cond: // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10 // CHECK-32-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32: omp.inner.for.body: // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0 // CHECK-32-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to i8* // CHECK-32-NEXT: store i8* [[TMP9]], i8** [[TMP8]], align 4 // CHECK-32-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1 // CHECK-32-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to i8* // CHECK-32-NEXT: store i8* [[TMP11]], i8** [[TMP10]], align 4 // CHECK-32-NEXT: [[TMP12:%.*]] = bitcast [2 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32)* @__omp_outlined__28 to i8*), i8* null, i8** [[TMP12]], i32 2) // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32: omp.inner.for.inc: // CHECK-32-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] // CHECK-32-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] // CHECK-32-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] // CHECK-32-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP19]], 9 // CHECK-32-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]] // CHECK-32: cond.true5: // CHECK-32-NEXT: br label [[COND_END7:%.*]] // CHECK-32: cond.false6: // CHECK-32-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: br label [[COND_END7]] // CHECK-32: cond.end7: // CHECK-32-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP20]], [[COND_FALSE6]] ] // CHECK-32-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP21]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK-32: omp.inner.for.end: // CHECK-32-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-32: omp.loop.exit: // CHECK-32-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@__omp_outlined__28 // CHECK-32-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 // CHECK-32-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 1073741860, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1) // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-32: omp.dispatch.cond: // CHECK-32-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-32-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0 // CHECK-32-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-32: omp.dispatch.body: // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32: omp.inner.for.cond: // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP189:![0-9]+]] // CHECK-32-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP189]] // CHECK-32-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] // CHECK-32-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32: omp.inner.for.body: // CHECK-32-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP189]] // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP189]] // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32: omp.body.continue: // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32: omp.inner.for.inc: // CHECK-32-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP189]] // CHECK-32-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP11]], 1 // CHECK-32-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP189]] // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP190:![0-9]+]] // CHECK-32: omp.inner.for.end: // CHECK-32-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-32: omp.dispatch.inc: // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-32: omp.dispatch.end: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l58 // CHECK-32-SAME: () #[[ATTR0]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32: user_code.entry: // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 // CHECK-32-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4 // CHECK-32-NEXT: call void @__omp_outlined__29(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR2]] // CHECK-32-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-NEXT: ret void // CHECK-32: worker.exit: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@__omp_outlined__29 // CHECK-32-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[B:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x i8*], align 4 // CHECK-32-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block() // CHECK-32-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-32-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-32: cond.true: // CHECK-32-NEXT: br label [[COND_END:%.*]] // CHECK-32: cond.false: // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: br label [[COND_END]] // CHECK-32: cond.end: // CHECK-32-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-32-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32: omp.inner.for.cond: // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP192:![0-9]+]] // CHECK-32-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10 // CHECK-32-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32: omp.inner.for.body: // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP192]] // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP192]] // CHECK-32-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0 // CHECK-32-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to i8* // CHECK-32-NEXT: store i8* [[TMP9]], i8** [[TMP8]], align 4, !llvm.access.group [[ACC_GRP192]] // CHECK-32-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1 // CHECK-32-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to i8* // CHECK-32-NEXT: store i8* [[TMP11]], i8** [[TMP10]], align 4, !llvm.access.group [[ACC_GRP192]] // CHECK-32-NEXT: [[TMP12:%.*]] = bitcast [2 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32)* @__omp_outlined__30 to i8*), i8* null, i8** [[TMP12]], i32 2), !llvm.access.group [[ACC_GRP192]] // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32: omp.inner.for.inc: // CHECK-32-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP192]] // CHECK-32-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP192]] // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] // CHECK-32-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP192]] // CHECK-32-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP192]] // CHECK-32-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP192]] // CHECK-32-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] // CHECK-32-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP192]] // CHECK-32-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP192]] // CHECK-32-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP192]] // CHECK-32-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] // CHECK-32-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP192]] // CHECK-32-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP192]] // CHECK-32-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP19]], 9 // CHECK-32-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]] // CHECK-32: cond.true5: // CHECK-32-NEXT: br label [[COND_END7:%.*]] // CHECK-32: cond.false6: // CHECK-32-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP192]] // CHECK-32-NEXT: br label [[COND_END7]] // CHECK-32: cond.end7: // CHECK-32-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP20]], [[COND_FALSE6]] ] // CHECK-32-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP192]] // CHECK-32-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP192]] // CHECK-32-NEXT: store i32 [[TMP21]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP192]] // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP193:![0-9]+]] // CHECK-32: omp.inner.for.end: // CHECK-32-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-32: omp.loop.exit: // CHECK-32-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) // CHECK-32-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 // CHECK-32-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-32: .omp.final.then: // CHECK-32-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-32-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-32: .omp.final.done: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@__omp_outlined__30 // CHECK-32-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 // CHECK-32-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP3]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32: omp.inner.for.cond: // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP195:![0-9]+]] // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4, !llvm.access.group [[ACC_GRP195]] // CHECK-32-NEXT: [[CMP:%.*]] = icmp ule i32 [[TMP5]], [[TMP6]] // CHECK-32-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32: omp.inner.for.body: // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP195]] // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP195]] // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32: omp.body.continue: // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32: omp.inner.for.inc: // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP195]] // CHECK-32-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP195]] // CHECK-32-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP8]], [[TMP9]] // CHECK-32-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP195]] // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP196:![0-9]+]] // CHECK-32: omp.inner.for.end: // CHECK-32-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-32: omp.loop.exit: // CHECK-32-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]]) // CHECK-32-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[TMP11:%.*]] = icmp ne i32 [[TMP10]], 0 // CHECK-32-NEXT: br i1 [[TMP11]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-32: .omp.final.then: // CHECK-32-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-32-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-32: .omp.final.done: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l66 // CHECK-32-SAME: () #[[ATTR0]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32: user_code.entry: // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 // CHECK-32-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4 // CHECK-32-NEXT: call void @__omp_outlined__31(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR2]] // CHECK-32-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-NEXT: ret void // CHECK-32: worker.exit: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@__omp_outlined__31 // CHECK-32-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[B:%.*]] = alloca [3 x i32], align 4 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x i8*], align 4 // CHECK-32-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = bitcast [3 x i32]* [[B]] to i8* // CHECK-32-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([3 x i32]* @"__const..b" to i8*), i32 12, i1 false) // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block() // CHECK-32-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 // CHECK-32-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 // CHECK-32-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-32: cond.true: // CHECK-32-NEXT: br label [[COND_END:%.*]] // CHECK-32: cond.false: // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: br label [[COND_END]] // CHECK-32: cond.end: // CHECK-32-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] // CHECK-32-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32: omp.inner.for.cond: // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP198:![0-9]+]] // CHECK-32-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP6]], 10 // CHECK-32-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32: omp.inner.for.body: // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP198]] // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP198]] // CHECK-32-NEXT: [[TMP9:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0 // CHECK-32-NEXT: [[TMP10:%.*]] = inttoptr i32 [[TMP7]] to i8* // CHECK-32-NEXT: store i8* [[TMP10]], i8** [[TMP9]], align 4, !llvm.access.group [[ACC_GRP198]] // CHECK-32-NEXT: [[TMP11:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1 // CHECK-32-NEXT: [[TMP12:%.*]] = inttoptr i32 [[TMP8]] to i8* // CHECK-32-NEXT: store i8* [[TMP12]], i8** [[TMP11]], align 4, !llvm.access.group [[ACC_GRP198]] // CHECK-32-NEXT: [[TMP13:%.*]] = bitcast [2 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32)* @__omp_outlined__32 to i8*), i8* null, i8** [[TMP13]], i32 2), !llvm.access.group [[ACC_GRP198]] // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32: omp.inner.for.inc: // CHECK-32-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP198]] // CHECK-32-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP198]] // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]] // CHECK-32-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP198]] // CHECK-32-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP198]] // CHECK-32-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP198]] // CHECK-32-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP16]], [[TMP17]] // CHECK-32-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP198]] // CHECK-32-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP198]] // CHECK-32-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP198]] // CHECK-32-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] // CHECK-32-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP198]] // CHECK-32-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP198]] // CHECK-32-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP20]], 9 // CHECK-32-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]] // CHECK-32: cond.true5: // CHECK-32-NEXT: br label [[COND_END7:%.*]] // CHECK-32: cond.false6: // CHECK-32-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP198]] // CHECK-32-NEXT: br label [[COND_END7]] // CHECK-32: cond.end7: // CHECK-32-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP21]], [[COND_FALSE6]] ] // CHECK-32-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP198]] // CHECK-32-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP198]] // CHECK-32-NEXT: store i32 [[TMP22]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP198]] // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP199:![0-9]+]] // CHECK-32: omp.inner.for.end: // CHECK-32-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-32: omp.loop.exit: // CHECK-32-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]]) // CHECK-32-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0 // CHECK-32-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-32: .omp.final.then: // CHECK-32-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-32-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-32: .omp.final.done: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@__omp_outlined__32 // CHECK-32-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 // CHECK-32-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 9 // CHECK-32-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-32: cond.true: // CHECK-32-NEXT: br label [[COND_END:%.*]] // CHECK-32: cond.false: // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: br label [[COND_END]] // CHECK-32: cond.end: // CHECK-32-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] // CHECK-32-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32: omp.inner.for.cond: // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP201:![0-9]+]] // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP201]] // CHECK-32-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] // CHECK-32-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32: omp.inner.for.body: // CHECK-32-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP201]] // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP201]] // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32: omp.body.continue: // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32: omp.inner.for.inc: // CHECK-32-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP201]] // CHECK-32-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 // CHECK-32-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP201]] // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP202:![0-9]+]] // CHECK-32: omp.inner.for.end: // CHECK-32-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-32: omp.loop.exit: // CHECK-32-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]]) // CHECK-32-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0 // CHECK-32-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-32: .omp.final.then: // CHECK-32-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-32-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-32: .omp.final.done: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l73 // CHECK-32-SAME: () #[[ATTR0]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 1, i1 true) // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32: user_code.entry: // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 // CHECK-32-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4 // CHECK-32-NEXT: call void @__omp_outlined__33(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR2]] // CHECK-32-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 1) // CHECK-32-NEXT: ret void // CHECK-32: worker.exit: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@__omp_outlined__33 // CHECK-32-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x i8*], align 4 // CHECK-32-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-NEXT: [[C:%.*]] = call align 8 i8* @__kmpc_alloc_shared(i32 4) // CHECK-32-NEXT: [[C_ON_STACK:%.*]] = bitcast i8* [[C]] to i32** // CHECK-32-NEXT: [[B:%.*]] = call align 8 i8* @__kmpc_alloc_shared(i32 4) // CHECK-32-NEXT: [[B_ON_STACK:%.*]] = bitcast i8* [[B]] to i32* // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-32-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-32: cond.true: // CHECK-32-NEXT: br label [[COND_END:%.*]] // CHECK-32: cond.false: // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: br label [[COND_END]] // CHECK-32: cond.end: // CHECK-32-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-32-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32: omp.inner.for.cond: // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP204:![0-9]+]] // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP204]] // CHECK-32-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] // CHECK-32-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32: omp.inner.for.body: // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP204]] // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP204]] // CHECK-32-NEXT: [[TMP9:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0 // CHECK-32-NEXT: [[TMP10:%.*]] = inttoptr i32 [[TMP7]] to i8* // CHECK-32-NEXT: store i8* [[TMP10]], i8** [[TMP9]], align 4, !llvm.access.group [[ACC_GRP204]] // CHECK-32-NEXT: [[TMP11:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1 // CHECK-32-NEXT: [[TMP12:%.*]] = inttoptr i32 [[TMP8]] to i8* // CHECK-32-NEXT: store i8* [[TMP12]], i8** [[TMP11]], align 4, !llvm.access.group [[ACC_GRP204]] // CHECK-32-NEXT: [[TMP13:%.*]] = bitcast [2 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32)* @__omp_outlined__34 to i8*), i8* bitcast (void (i16, i32)* @__omp_outlined__34_wrapper to i8*), i8** [[TMP13]], i32 2), !llvm.access.group [[ACC_GRP204]] // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32: omp.inner.for.inc: // CHECK-32-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP204]] // CHECK-32-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP204]] // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]] // CHECK-32-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP204]] // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP205:![0-9]+]] // CHECK-32: omp.inner.for.end: // CHECK-32-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-32: omp.loop.exit: // CHECK-32-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) // CHECK-32-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 // CHECK-32-NEXT: br i1 [[TMP17]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-32: .omp.final.then: // CHECK-32-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-32-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-32: .omp.final.done: // CHECK-32-NEXT: store i32* [[B_ON_STACK]], i32** [[C_ON_STACK]], align 4 // CHECK-32-NEXT: call void @__kmpc_free_shared(i8* [[B]], i32 4) // CHECK-32-NEXT: call void @__kmpc_free_shared(i8* [[C]], i32 4) // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@__omp_outlined__34 // CHECK-32-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 // CHECK-32-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP3]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32: omp.inner.for.cond: // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP207:![0-9]+]] // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4, !llvm.access.group [[ACC_GRP207]] // CHECK-32-NEXT: [[CMP:%.*]] = icmp ule i32 [[TMP5]], [[TMP6]] // CHECK-32-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32: omp.inner.for.body: // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP207]] // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP207]] // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32: omp.body.continue: // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32: omp.inner.for.inc: // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP207]] // CHECK-32-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP207]] // CHECK-32-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP8]], [[TMP9]] // CHECK-32-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP207]] // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP208:![0-9]+]] // CHECK-32: omp.inner.for.end: // CHECK-32-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-32: omp.loop.exit: // CHECK-32-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]]) // CHECK-32-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[TMP11:%.*]] = icmp ne i32 [[TMP10]], 0 // CHECK-32-NEXT: br i1 [[TMP11]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-32: .omp.final.then: // CHECK-32-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-32-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-32: .omp.final.done: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@__omp_outlined__34_wrapper // CHECK-32-SAME: (i16 noundef zeroext [[TMP0:%.*]], i32 noundef [[TMP1:%.*]]) #[[ATTR7:[0-9]+]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTADDR:%.*]] = alloca i16, align 2 // CHECK-32-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[GLOBAL_ARGS:%.*]] = alloca i8**, align 4 // CHECK-32-NEXT: store i16 [[TMP0]], i16* [[DOTADDR]], align 2 // CHECK-32-NEXT: store i32 [[TMP1]], i32* [[DOTADDR1]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 // CHECK-32-NEXT: call void @__kmpc_get_shared_variables(i8*** [[GLOBAL_ARGS]]) // CHECK-32-NEXT: [[TMP2:%.*]] = load i8**, i8*** [[GLOBAL_ARGS]], align 4 // CHECK-32-NEXT: [[TMP3:%.*]] = getelementptr inbounds i8*, i8** [[TMP2]], i32 0 // CHECK-32-NEXT: [[TMP4:%.*]] = bitcast i8** [[TMP3]] to i32* // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 // CHECK-32-NEXT: [[TMP6:%.*]] = getelementptr inbounds i8*, i8** [[TMP2]], i32 1 // CHECK-32-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i32* // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 // CHECK-32-NEXT: call void @__omp_outlined__34(i32* [[DOTADDR1]], i32* [[DOTZERO_ADDR]], i32 [[TMP5]], i32 [[TMP8]]) #[[ATTR2]] // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l81 // CHECK-32-SAME: () #[[ATTR0]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32: user_code.entry: // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 // CHECK-32-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4 // CHECK-32-NEXT: call void @__omp_outlined__35(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR2]] // CHECK-32-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-NEXT: ret void // CHECK-32: worker.exit: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@__omp_outlined__35 // CHECK-32-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x i8*], align 4 // CHECK-32-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block() // CHECK-32-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-32-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-32: cond.true: // CHECK-32-NEXT: br label [[COND_END:%.*]] // CHECK-32: cond.false: // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: br label [[COND_END]] // CHECK-32: cond.end: // CHECK-32-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-32-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32: omp.inner.for.cond: // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP210:![0-9]+]] // CHECK-32-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10 // CHECK-32-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32: omp.inner.for.body: // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP210]] // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP210]] // CHECK-32-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0 // CHECK-32-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to i8* // CHECK-32-NEXT: store i8* [[TMP9]], i8** [[TMP8]], align 4, !llvm.access.group [[ACC_GRP210]] // CHECK-32-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1 // CHECK-32-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to i8* // CHECK-32-NEXT: store i8* [[TMP11]], i8** [[TMP10]], align 4, !llvm.access.group [[ACC_GRP210]] // CHECK-32-NEXT: [[TMP12:%.*]] = bitcast [2 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32)* @__omp_outlined__36 to i8*), i8* null, i8** [[TMP12]], i32 2), !llvm.access.group [[ACC_GRP210]] // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32: omp.inner.for.inc: // CHECK-32-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP210]] // CHECK-32-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP210]] // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] // CHECK-32-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP210]] // CHECK-32-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP210]] // CHECK-32-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP210]] // CHECK-32-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] // CHECK-32-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP210]] // CHECK-32-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP210]] // CHECK-32-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP210]] // CHECK-32-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] // CHECK-32-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP210]] // CHECK-32-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP210]] // CHECK-32-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP19]], 9 // CHECK-32-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]] // CHECK-32: cond.true5: // CHECK-32-NEXT: br label [[COND_END7:%.*]] // CHECK-32: cond.false6: // CHECK-32-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP210]] // CHECK-32-NEXT: br label [[COND_END7]] // CHECK-32: cond.end7: // CHECK-32-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP20]], [[COND_FALSE6]] ] // CHECK-32-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP210]] // CHECK-32-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP210]] // CHECK-32-NEXT: store i32 [[TMP21]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP210]] // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP211:![0-9]+]] // CHECK-32: omp.inner.for.end: // CHECK-32-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-32: omp.loop.exit: // CHECK-32-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) // CHECK-32-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 // CHECK-32-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-32: .omp.final.then: // CHECK-32-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-32-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-32: .omp.final.done: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@__omp_outlined__36 // CHECK-32-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 // CHECK-32-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 1073741862, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1) // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-32: omp.dispatch.cond: // CHECK-32-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-32-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0 // CHECK-32-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-32: omp.dispatch.body: // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32: omp.inner.for.cond: // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP213:![0-9]+]] // CHECK-32-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP213]] // CHECK-32-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] // CHECK-32-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32: omp.inner.for.body: // CHECK-32-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP213]] // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP213]] // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32: omp.body.continue: // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32: omp.inner.for.inc: // CHECK-32-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP213]] // CHECK-32-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP11]], 1 // CHECK-32-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP213]] // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP214:![0-9]+]] // CHECK-32: omp.inner.for.end: // CHECK-32-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-32: omp.dispatch.inc: // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-32: omp.dispatch.end: // CHECK-32-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0 // CHECK-32-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-32: .omp.final.then: // CHECK-32-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-32-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-32: .omp.final.done: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l85 // CHECK-32-SAME: () #[[ATTR0]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32: user_code.entry: // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 // CHECK-32-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4 // CHECK-32-NEXT: call void @__omp_outlined__37(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR2]] // CHECK-32-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-NEXT: ret void // CHECK-32: worker.exit: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@__omp_outlined__37 // CHECK-32-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x i8*], align 4 // CHECK-32-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block() // CHECK-32-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-32-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-32: cond.true: // CHECK-32-NEXT: br label [[COND_END:%.*]] // CHECK-32: cond.false: // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: br label [[COND_END]] // CHECK-32: cond.end: // CHECK-32-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-32-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32: omp.inner.for.cond: // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP216:![0-9]+]] // CHECK-32-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10 // CHECK-32-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32: omp.inner.for.body: // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP216]] // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP216]] // CHECK-32-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0 // CHECK-32-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to i8* // CHECK-32-NEXT: store i8* [[TMP9]], i8** [[TMP8]], align 4, !llvm.access.group [[ACC_GRP216]] // CHECK-32-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1 // CHECK-32-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to i8* // CHECK-32-NEXT: store i8* [[TMP11]], i8** [[TMP10]], align 4, !llvm.access.group [[ACC_GRP216]] // CHECK-32-NEXT: [[TMP12:%.*]] = bitcast [2 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32)* @__omp_outlined__38 to i8*), i8* null, i8** [[TMP12]], i32 2), !llvm.access.group [[ACC_GRP216]] // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32: omp.inner.for.inc: // CHECK-32-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP216]] // CHECK-32-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP216]] // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] // CHECK-32-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP216]] // CHECK-32-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP216]] // CHECK-32-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP216]] // CHECK-32-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] // CHECK-32-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP216]] // CHECK-32-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP216]] // CHECK-32-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP216]] // CHECK-32-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] // CHECK-32-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP216]] // CHECK-32-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP216]] // CHECK-32-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP19]], 9 // CHECK-32-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]] // CHECK-32: cond.true5: // CHECK-32-NEXT: br label [[COND_END7:%.*]] // CHECK-32: cond.false6: // CHECK-32-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP216]] // CHECK-32-NEXT: br label [[COND_END7]] // CHECK-32: cond.end7: // CHECK-32-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP20]], [[COND_FALSE6]] ] // CHECK-32-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP216]] // CHECK-32-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP216]] // CHECK-32-NEXT: store i32 [[TMP21]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP216]] // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP217:![0-9]+]] // CHECK-32: omp.inner.for.end: // CHECK-32-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-32: omp.loop.exit: // CHECK-32-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) // CHECK-32-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 // CHECK-32-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-32: .omp.final.then: // CHECK-32-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-32-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-32: .omp.final.done: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@__omp_outlined__38 // CHECK-32-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 // CHECK-32-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 1073741861, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1) // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-32: omp.dispatch.cond: // CHECK-32-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-32-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0 // CHECK-32-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-32: omp.dispatch.body: // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32: omp.inner.for.cond: // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP219:![0-9]+]] // CHECK-32-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP219]] // CHECK-32-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] // CHECK-32-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32: omp.inner.for.body: // CHECK-32-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP219]] // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP219]] // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32: omp.body.continue: // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32: omp.inner.for.inc: // CHECK-32-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP219]] // CHECK-32-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP11]], 1 // CHECK-32-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP219]] // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP220:![0-9]+]] // CHECK-32: omp.inner.for.end: // CHECK-32-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-32: omp.dispatch.inc: // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-32: omp.dispatch.end: // CHECK-32-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0 // CHECK-32-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-32: .omp.final.then: // CHECK-32-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-32-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-32: .omp.final.done: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l89 // CHECK-32-SAME: () #[[ATTR0]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32: user_code.entry: // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 // CHECK-32-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4 // CHECK-32-NEXT: call void @__omp_outlined__39(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR2]] // CHECK-32-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-NEXT: ret void // CHECK-32: worker.exit: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@__omp_outlined__39 // CHECK-32-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x i8*], align 4 // CHECK-32-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block() // CHECK-32-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-32-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-32: cond.true: // CHECK-32-NEXT: br label [[COND_END:%.*]] // CHECK-32: cond.false: // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: br label [[COND_END]] // CHECK-32: cond.end: // CHECK-32-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-32-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32: omp.inner.for.cond: // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP222:![0-9]+]] // CHECK-32-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10 // CHECK-32-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32: omp.inner.for.body: // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP222]] // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP222]] // CHECK-32-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0 // CHECK-32-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to i8* // CHECK-32-NEXT: store i8* [[TMP9]], i8** [[TMP8]], align 4, !llvm.access.group [[ACC_GRP222]] // CHECK-32-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1 // CHECK-32-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to i8* // CHECK-32-NEXT: store i8* [[TMP11]], i8** [[TMP10]], align 4, !llvm.access.group [[ACC_GRP222]] // CHECK-32-NEXT: [[TMP12:%.*]] = bitcast [2 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32)* @__omp_outlined__40 to i8*), i8* null, i8** [[TMP12]], i32 2), !llvm.access.group [[ACC_GRP222]] // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32: omp.inner.for.inc: // CHECK-32-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP222]] // CHECK-32-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP222]] // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] // CHECK-32-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP222]] // CHECK-32-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP222]] // CHECK-32-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP222]] // CHECK-32-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] // CHECK-32-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP222]] // CHECK-32-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP222]] // CHECK-32-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP222]] // CHECK-32-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] // CHECK-32-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP222]] // CHECK-32-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP222]] // CHECK-32-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP19]], 9 // CHECK-32-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]] // CHECK-32: cond.true5: // CHECK-32-NEXT: br label [[COND_END7:%.*]] // CHECK-32: cond.false6: // CHECK-32-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP222]] // CHECK-32-NEXT: br label [[COND_END7]] // CHECK-32: cond.end7: // CHECK-32-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP20]], [[COND_FALSE6]] ] // CHECK-32-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP222]] // CHECK-32-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP222]] // CHECK-32-NEXT: store i32 [[TMP21]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP222]] // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP223:![0-9]+]] // CHECK-32: omp.inner.for.end: // CHECK-32-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-32: omp.loop.exit: // CHECK-32-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) // CHECK-32-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 // CHECK-32-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-32: .omp.final.then: // CHECK-32-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-32-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-32: .omp.final.done: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@__omp_outlined__40 // CHECK-32-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 // CHECK-32-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 1073741859, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1) // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-32: omp.dispatch.cond: // CHECK-32-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-32-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0 // CHECK-32-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-32: omp.dispatch.body: // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32: omp.inner.for.cond: // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP225:![0-9]+]] // CHECK-32-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP225]] // CHECK-32-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] // CHECK-32-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32: omp.inner.for.body: // CHECK-32-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP225]] // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP225]] // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32: omp.body.continue: // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32: omp.inner.for.inc: // CHECK-32-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP225]] // CHECK-32-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP11]], 1 // CHECK-32-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP225]] // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP226:![0-9]+]] // CHECK-32: omp.inner.for.end: // CHECK-32-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-32: omp.dispatch.inc: // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-32: omp.dispatch.end: // CHECK-32-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0 // CHECK-32-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-32: .omp.final.then: // CHECK-32-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-32-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-32: .omp.final.done: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l93 // CHECK-32-SAME: () #[[ATTR0]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32: user_code.entry: // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 // CHECK-32-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4 // CHECK-32-NEXT: call void @__omp_outlined__41(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR2]] // CHECK-32-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-NEXT: ret void // CHECK-32: worker.exit: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@__omp_outlined__41 // CHECK-32-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x i8*], align 4 // CHECK-32-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block() // CHECK-32-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-32-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-32: cond.true: // CHECK-32-NEXT: br label [[COND_END:%.*]] // CHECK-32: cond.false: // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: br label [[COND_END]] // CHECK-32: cond.end: // CHECK-32-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-32-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32: omp.inner.for.cond: // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP228:![0-9]+]] // CHECK-32-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10 // CHECK-32-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32: omp.inner.for.body: // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP228]] // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP228]] // CHECK-32-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0 // CHECK-32-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to i8* // CHECK-32-NEXT: store i8* [[TMP9]], i8** [[TMP8]], align 4, !llvm.access.group [[ACC_GRP228]] // CHECK-32-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1 // CHECK-32-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to i8* // CHECK-32-NEXT: store i8* [[TMP11]], i8** [[TMP10]], align 4, !llvm.access.group [[ACC_GRP228]] // CHECK-32-NEXT: [[TMP12:%.*]] = bitcast [2 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32)* @__omp_outlined__42 to i8*), i8* null, i8** [[TMP12]], i32 2), !llvm.access.group [[ACC_GRP228]] // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32: omp.inner.for.inc: // CHECK-32-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP228]] // CHECK-32-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP228]] // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] // CHECK-32-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP228]] // CHECK-32-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP228]] // CHECK-32-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP228]] // CHECK-32-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] // CHECK-32-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP228]] // CHECK-32-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP228]] // CHECK-32-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP228]] // CHECK-32-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] // CHECK-32-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP228]] // CHECK-32-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP228]] // CHECK-32-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP19]], 9 // CHECK-32-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]] // CHECK-32: cond.true5: // CHECK-32-NEXT: br label [[COND_END7:%.*]] // CHECK-32: cond.false6: // CHECK-32-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP228]] // CHECK-32-NEXT: br label [[COND_END7]] // CHECK-32: cond.end7: // CHECK-32-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP20]], [[COND_FALSE6]] ] // CHECK-32-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP228]] // CHECK-32-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP228]] // CHECK-32-NEXT: store i32 [[TMP21]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP228]] // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP229:![0-9]+]] // CHECK-32: omp.inner.for.end: // CHECK-32-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-32: omp.loop.exit: // CHECK-32-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) // CHECK-32-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 // CHECK-32-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-32: .omp.final.then: // CHECK-32-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-32-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-32: .omp.final.done: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@__omp_outlined__42 // CHECK-32-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 // CHECK-32-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 1073741860, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1) // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-32: omp.dispatch.cond: // CHECK-32-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-32-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0 // CHECK-32-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-32: omp.dispatch.body: // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32: omp.inner.for.cond: // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP231:![0-9]+]] // CHECK-32-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP231]] // CHECK-32-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] // CHECK-32-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32: omp.inner.for.body: // CHECK-32-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP231]] // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP231]] // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32: omp.body.continue: // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32: omp.inner.for.inc: // CHECK-32-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP231]] // CHECK-32-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP11]], 1 // CHECK-32-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP231]] // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP232:![0-9]+]] // CHECK-32: omp.inner.for.end: // CHECK-32-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-32: omp.dispatch.inc: // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-32: omp.dispatch.end: // CHECK-32-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0 // CHECK-32-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-32: .omp.final.then: // CHECK-32-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-32-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-32: .omp.final.done: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l97 // CHECK-32-SAME: () #[[ATTR0]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32: user_code.entry: // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 // CHECK-32-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4 // CHECK-32-NEXT: call void @__omp_outlined__43(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR2]] // CHECK-32-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-NEXT: ret void // CHECK-32: worker.exit: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@__omp_outlined__43 // CHECK-32-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x i8*], align 4 // CHECK-32-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block() // CHECK-32-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-32-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-32: cond.true: // CHECK-32-NEXT: br label [[COND_END:%.*]] // CHECK-32: cond.false: // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: br label [[COND_END]] // CHECK-32: cond.end: // CHECK-32-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-32-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32: omp.inner.for.cond: // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10 // CHECK-32-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32: omp.inner.for.body: // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0 // CHECK-32-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to i8* // CHECK-32-NEXT: store i8* [[TMP9]], i8** [[TMP8]], align 4 // CHECK-32-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1 // CHECK-32-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to i8* // CHECK-32-NEXT: store i8* [[TMP11]], i8** [[TMP10]], align 4 // CHECK-32-NEXT: [[TMP12:%.*]] = bitcast [2 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32)* @__omp_outlined__44 to i8*), i8* null, i8** [[TMP12]], i32 2) // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32: omp.inner.for.inc: // CHECK-32-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] // CHECK-32-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] // CHECK-32-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] // CHECK-32-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP19]], 9 // CHECK-32-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]] // CHECK-32: cond.true5: // CHECK-32-NEXT: br label [[COND_END7:%.*]] // CHECK-32: cond.false6: // CHECK-32-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: br label [[COND_END7]] // CHECK-32: cond.end7: // CHECK-32-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP20]], [[COND_FALSE6]] ] // CHECK-32-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP21]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK-32: omp.inner.for.end: // CHECK-32-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-32: omp.loop.exit: // CHECK-32-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@__omp_outlined__44 // CHECK-32-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 // CHECK-32-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP3]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32: omp.inner.for.cond: // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-NEXT: [[CMP:%.*]] = icmp ule i32 [[TMP5]], [[TMP6]] // CHECK-32-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32: omp.inner.for.body: // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-NEXT: store i32 [[ADD]], i32* [[I]], align 4 // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32: omp.body.continue: // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32: omp.inner.for.inc: // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP8]], [[TMP9]] // CHECK-32-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK-32: omp.inner.for.end: // CHECK-32-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-32: omp.loop.exit: // CHECK-32-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]]) // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l101 // CHECK-32-SAME: () #[[ATTR0]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32: user_code.entry: // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 // CHECK-32-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4 // CHECK-32-NEXT: call void @__omp_outlined__45(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR2]] // CHECK-32-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-NEXT: ret void // CHECK-32: worker.exit: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@__omp_outlined__45 // CHECK-32-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x i8*], align 4 // CHECK-32-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block() // CHECK-32-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-32-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-32: cond.true: // CHECK-32-NEXT: br label [[COND_END:%.*]] // CHECK-32: cond.false: // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: br label [[COND_END]] // CHECK-32: cond.end: // CHECK-32-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-32-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32: omp.inner.for.cond: // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10 // CHECK-32-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32: omp.inner.for.body: // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0 // CHECK-32-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to i8* // CHECK-32-NEXT: store i8* [[TMP9]], i8** [[TMP8]], align 4 // CHECK-32-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1 // CHECK-32-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to i8* // CHECK-32-NEXT: store i8* [[TMP11]], i8** [[TMP10]], align 4 // CHECK-32-NEXT: [[TMP12:%.*]] = bitcast [2 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32)* @__omp_outlined__46 to i8*), i8* null, i8** [[TMP12]], i32 2) // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32: omp.inner.for.inc: // CHECK-32-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] // CHECK-32-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] // CHECK-32-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] // CHECK-32-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP19]], 9 // CHECK-32-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]] // CHECK-32: cond.true5: // CHECK-32-NEXT: br label [[COND_END7:%.*]] // CHECK-32: cond.false6: // CHECK-32-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: br label [[COND_END7]] // CHECK-32: cond.end7: // CHECK-32-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP20]], [[COND_FALSE6]] ] // CHECK-32-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP21]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK-32: omp.inner.for.end: // CHECK-32-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-32: omp.loop.exit: // CHECK-32-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@__omp_outlined__46 // CHECK-32-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 // CHECK-32-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 9 // CHECK-32-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-32: cond.true: // CHECK-32-NEXT: br label [[COND_END:%.*]] // CHECK-32: cond.false: // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: br label [[COND_END]] // CHECK-32: cond.end: // CHECK-32-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] // CHECK-32-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32: omp.inner.for.cond: // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] // CHECK-32-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32: omp.inner.for.body: // CHECK-32-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-NEXT: store i32 [[ADD]], i32* [[I]], align 4 // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32: omp.body.continue: // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32: omp.inner.for.inc: // CHECK-32-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 // CHECK-32-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK-32: omp.inner.for.end: // CHECK-32-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-32: omp.loop.exit: // CHECK-32-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]]) // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l105 // CHECK-32-SAME: () #[[ATTR0]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32: user_code.entry: // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 // CHECK-32-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4 // CHECK-32-NEXT: call void @__omp_outlined__47(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR2]] // CHECK-32-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-NEXT: ret void // CHECK-32: worker.exit: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@__omp_outlined__47 // CHECK-32-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x i8*], align 4 // CHECK-32-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block() // CHECK-32-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-32-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-32: cond.true: // CHECK-32-NEXT: br label [[COND_END:%.*]] // CHECK-32: cond.false: // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: br label [[COND_END]] // CHECK-32: cond.end: // CHECK-32-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-32-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32: omp.inner.for.cond: // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10 // CHECK-32-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32: omp.inner.for.body: // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0 // CHECK-32-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to i8* // CHECK-32-NEXT: store i8* [[TMP9]], i8** [[TMP8]], align 4 // CHECK-32-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1 // CHECK-32-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to i8* // CHECK-32-NEXT: store i8* [[TMP11]], i8** [[TMP10]], align 4 // CHECK-32-NEXT: [[TMP12:%.*]] = bitcast [2 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32)* @__omp_outlined__48 to i8*), i8* null, i8** [[TMP12]], i32 2) // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32: omp.inner.for.inc: // CHECK-32-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] // CHECK-32-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] // CHECK-32-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] // CHECK-32-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP19]], 9 // CHECK-32-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]] // CHECK-32: cond.true5: // CHECK-32-NEXT: br label [[COND_END7:%.*]] // CHECK-32: cond.false6: // CHECK-32-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: br label [[COND_END7]] // CHECK-32: cond.end7: // CHECK-32-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP20]], [[COND_FALSE6]] ] // CHECK-32-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP21]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK-32: omp.inner.for.end: // CHECK-32-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-32: omp.loop.exit: // CHECK-32-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@__omp_outlined__48 // CHECK-32-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 // CHECK-32-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP3]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32: omp.inner.for.cond: // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-NEXT: [[CMP:%.*]] = icmp ule i32 [[TMP5]], [[TMP6]] // CHECK-32-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32: omp.inner.for.body: // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-NEXT: store i32 [[ADD]], i32* [[I]], align 4 // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32: omp.body.continue: // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32: omp.inner.for.inc: // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP8]], [[TMP9]] // CHECK-32-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK-32: omp.inner.for.end: // CHECK-32-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-32: omp.loop.exit: // CHECK-32-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]]) // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l109 // CHECK-32-SAME: () #[[ATTR0]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32: user_code.entry: // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 // CHECK-32-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4 // CHECK-32-NEXT: call void @__omp_outlined__49(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR2]] // CHECK-32-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-NEXT: ret void // CHECK-32: worker.exit: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@__omp_outlined__49 // CHECK-32-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x i8*], align 4 // CHECK-32-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block() // CHECK-32-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-32-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-32: cond.true: // CHECK-32-NEXT: br label [[COND_END:%.*]] // CHECK-32: cond.false: // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: br label [[COND_END]] // CHECK-32: cond.end: // CHECK-32-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-32-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32: omp.inner.for.cond: // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10 // CHECK-32-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32: omp.inner.for.body: // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0 // CHECK-32-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to i8* // CHECK-32-NEXT: store i8* [[TMP9]], i8** [[TMP8]], align 4 // CHECK-32-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1 // CHECK-32-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to i8* // CHECK-32-NEXT: store i8* [[TMP11]], i8** [[TMP10]], align 4 // CHECK-32-NEXT: [[TMP12:%.*]] = bitcast [2 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32)* @__omp_outlined__50 to i8*), i8* null, i8** [[TMP12]], i32 2) // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32: omp.inner.for.inc: // CHECK-32-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] // CHECK-32-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] // CHECK-32-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] // CHECK-32-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP19]], 9 // CHECK-32-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]] // CHECK-32: cond.true5: // CHECK-32-NEXT: br label [[COND_END7:%.*]] // CHECK-32: cond.false6: // CHECK-32-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: br label [[COND_END7]] // CHECK-32: cond.end7: // CHECK-32-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP20]], [[COND_FALSE6]] ] // CHECK-32-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP21]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK-32: omp.inner.for.end: // CHECK-32-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-32: omp.loop.exit: // CHECK-32-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@__omp_outlined__50 // CHECK-32-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 // CHECK-32-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 1073741862, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1) // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-32: omp.dispatch.cond: // CHECK-32-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-32-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0 // CHECK-32-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-32: omp.dispatch.body: // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32: omp.inner.for.cond: // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP234:![0-9]+]] // CHECK-32-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP234]] // CHECK-32-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] // CHECK-32-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32: omp.inner.for.body: // CHECK-32-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP234]] // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP234]] // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32: omp.body.continue: // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32: omp.inner.for.inc: // CHECK-32-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP234]] // CHECK-32-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP11]], 1 // CHECK-32-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP234]] // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP235:![0-9]+]] // CHECK-32: omp.inner.for.end: // CHECK-32-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-32: omp.dispatch.inc: // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-32: omp.dispatch.end: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l113 // CHECK-32-SAME: () #[[ATTR0]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32: user_code.entry: // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 // CHECK-32-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4 // CHECK-32-NEXT: call void @__omp_outlined__51(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR2]] // CHECK-32-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-NEXT: ret void // CHECK-32: worker.exit: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@__omp_outlined__51 // CHECK-32-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x i8*], align 4 // CHECK-32-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block() // CHECK-32-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-32-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-32: cond.true: // CHECK-32-NEXT: br label [[COND_END:%.*]] // CHECK-32: cond.false: // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: br label [[COND_END]] // CHECK-32: cond.end: // CHECK-32-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-32-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32: omp.inner.for.cond: // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10 // CHECK-32-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32: omp.inner.for.body: // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0 // CHECK-32-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to i8* // CHECK-32-NEXT: store i8* [[TMP9]], i8** [[TMP8]], align 4 // CHECK-32-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1 // CHECK-32-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to i8* // CHECK-32-NEXT: store i8* [[TMP11]], i8** [[TMP10]], align 4 // CHECK-32-NEXT: [[TMP12:%.*]] = bitcast [2 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32)* @__omp_outlined__52 to i8*), i8* null, i8** [[TMP12]], i32 2) // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32: omp.inner.for.inc: // CHECK-32-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] // CHECK-32-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] // CHECK-32-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] // CHECK-32-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP19]], 9 // CHECK-32-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]] // CHECK-32: cond.true5: // CHECK-32-NEXT: br label [[COND_END7:%.*]] // CHECK-32: cond.false6: // CHECK-32-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: br label [[COND_END7]] // CHECK-32: cond.end7: // CHECK-32-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP20]], [[COND_FALSE6]] ] // CHECK-32-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP21]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK-32: omp.inner.for.end: // CHECK-32-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-32: omp.loop.exit: // CHECK-32-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@__omp_outlined__52 // CHECK-32-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 // CHECK-32-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 1073741861, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1) // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-32: omp.dispatch.cond: // CHECK-32-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-32-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0 // CHECK-32-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-32: omp.dispatch.body: // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32: omp.inner.for.cond: // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP237:![0-9]+]] // CHECK-32-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP237]] // CHECK-32-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] // CHECK-32-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32: omp.inner.for.body: // CHECK-32-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP237]] // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP237]] // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32: omp.body.continue: // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32: omp.inner.for.inc: // CHECK-32-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP237]] // CHECK-32-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP11]], 1 // CHECK-32-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP237]] // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP238:![0-9]+]] // CHECK-32: omp.inner.for.end: // CHECK-32-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-32: omp.dispatch.inc: // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-32: omp.dispatch.end: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l117 // CHECK-32-SAME: () #[[ATTR0]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32: user_code.entry: // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 // CHECK-32-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4 // CHECK-32-NEXT: call void @__omp_outlined__53(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR2]] // CHECK-32-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-NEXT: ret void // CHECK-32: worker.exit: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@__omp_outlined__53 // CHECK-32-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x i8*], align 4 // CHECK-32-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block() // CHECK-32-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-32-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-32: cond.true: // CHECK-32-NEXT: br label [[COND_END:%.*]] // CHECK-32: cond.false: // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: br label [[COND_END]] // CHECK-32: cond.end: // CHECK-32-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-32-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32: omp.inner.for.cond: // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10 // CHECK-32-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32: omp.inner.for.body: // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0 // CHECK-32-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to i8* // CHECK-32-NEXT: store i8* [[TMP9]], i8** [[TMP8]], align 4 // CHECK-32-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1 // CHECK-32-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to i8* // CHECK-32-NEXT: store i8* [[TMP11]], i8** [[TMP10]], align 4 // CHECK-32-NEXT: [[TMP12:%.*]] = bitcast [2 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32)* @__omp_outlined__54 to i8*), i8* null, i8** [[TMP12]], i32 2) // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32: omp.inner.for.inc: // CHECK-32-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] // CHECK-32-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] // CHECK-32-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] // CHECK-32-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP19]], 9 // CHECK-32-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]] // CHECK-32: cond.true5: // CHECK-32-NEXT: br label [[COND_END7:%.*]] // CHECK-32: cond.false6: // CHECK-32-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: br label [[COND_END7]] // CHECK-32: cond.end7: // CHECK-32-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP20]], [[COND_FALSE6]] ] // CHECK-32-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP21]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK-32: omp.inner.for.end: // CHECK-32-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-32: omp.loop.exit: // CHECK-32-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@__omp_outlined__54 // CHECK-32-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 // CHECK-32-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 1073741859, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1) // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-32: omp.dispatch.cond: // CHECK-32-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-32-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0 // CHECK-32-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-32: omp.dispatch.body: // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32: omp.inner.for.cond: // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP240:![0-9]+]] // CHECK-32-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP240]] // CHECK-32-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] // CHECK-32-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32: omp.inner.for.body: // CHECK-32-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP240]] // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP240]] // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32: omp.body.continue: // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32: omp.inner.for.inc: // CHECK-32-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP240]] // CHECK-32-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP11]], 1 // CHECK-32-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP240]] // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP241:![0-9]+]] // CHECK-32: omp.inner.for.end: // CHECK-32-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-32: omp.dispatch.inc: // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-32: omp.dispatch.end: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l121 // CHECK-32-SAME: () #[[ATTR0]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32: user_code.entry: // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 // CHECK-32-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4 // CHECK-32-NEXT: call void @__omp_outlined__55(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR2]] // CHECK-32-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-NEXT: ret void // CHECK-32: worker.exit: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@__omp_outlined__55 // CHECK-32-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x i8*], align 4 // CHECK-32-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block() // CHECK-32-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-32-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-32: cond.true: // CHECK-32-NEXT: br label [[COND_END:%.*]] // CHECK-32: cond.false: // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: br label [[COND_END]] // CHECK-32: cond.end: // CHECK-32-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-32-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32: omp.inner.for.cond: // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10 // CHECK-32-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32: omp.inner.for.body: // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0 // CHECK-32-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to i8* // CHECK-32-NEXT: store i8* [[TMP9]], i8** [[TMP8]], align 4 // CHECK-32-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1 // CHECK-32-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to i8* // CHECK-32-NEXT: store i8* [[TMP11]], i8** [[TMP10]], align 4 // CHECK-32-NEXT: [[TMP12:%.*]] = bitcast [2 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32)* @__omp_outlined__56 to i8*), i8* null, i8** [[TMP12]], i32 2) // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32: omp.inner.for.inc: // CHECK-32-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] // CHECK-32-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] // CHECK-32-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] // CHECK-32-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP19]], 9 // CHECK-32-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]] // CHECK-32: cond.true5: // CHECK-32-NEXT: br label [[COND_END7:%.*]] // CHECK-32: cond.false6: // CHECK-32-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: br label [[COND_END7]] // CHECK-32: cond.end7: // CHECK-32-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP20]], [[COND_FALSE6]] ] // CHECK-32-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP21]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK-32: omp.inner.for.end: // CHECK-32-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-32: omp.loop.exit: // CHECK-32-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@__omp_outlined__56 // CHECK-32-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 // CHECK-32-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 1073741860, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1) // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-32: omp.dispatch.cond: // CHECK-32-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-32-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0 // CHECK-32-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-32: omp.dispatch.body: // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32: omp.inner.for.cond: // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP243:![0-9]+]] // CHECK-32-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP243]] // CHECK-32-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] // CHECK-32-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32: omp.inner.for.body: // CHECK-32-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP243]] // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP243]] // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32: omp.body.continue: // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32: omp.inner.for.inc: // CHECK-32-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP243]] // CHECK-32-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP11]], 1 // CHECK-32-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP243]] // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP244:![0-9]+]] // CHECK-32: omp.inner.for.end: // CHECK-32-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-32: omp.dispatch.inc: // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-32: omp.dispatch.end: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l125 // CHECK-32-SAME: () #[[ATTR0]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32: user_code.entry: // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 // CHECK-32-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4 // CHECK-32-NEXT: call void @__omp_outlined__57(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR2]] // CHECK-32-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-NEXT: ret void // CHECK-32: worker.exit: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@__omp_outlined__57 // CHECK-32-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x i8*], align 4 // CHECK-32-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block() // CHECK-32-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-32-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-32: cond.true: // CHECK-32-NEXT: br label [[COND_END:%.*]] // CHECK-32: cond.false: // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: br label [[COND_END]] // CHECK-32: cond.end: // CHECK-32-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-32-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32: omp.inner.for.cond: // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10 // CHECK-32-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32: omp.inner.for.body: // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0 // CHECK-32-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to i8* // CHECK-32-NEXT: store i8* [[TMP9]], i8** [[TMP8]], align 4 // CHECK-32-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1 // CHECK-32-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to i8* // CHECK-32-NEXT: store i8* [[TMP11]], i8** [[TMP10]], align 4 // CHECK-32-NEXT: [[TMP12:%.*]] = bitcast [2 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32)* @__omp_outlined__58 to i8*), i8* null, i8** [[TMP12]], i32 2) // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32: omp.inner.for.inc: // CHECK-32-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] // CHECK-32-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] // CHECK-32-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] // CHECK-32-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP19]], 9 // CHECK-32-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]] // CHECK-32: cond.true5: // CHECK-32-NEXT: br label [[COND_END7:%.*]] // CHECK-32: cond.false6: // CHECK-32-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: br label [[COND_END7]] // CHECK-32: cond.end7: // CHECK-32-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP20]], [[COND_FALSE6]] ] // CHECK-32-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP21]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK-32: omp.inner.for.end: // CHECK-32-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-32: omp.loop.exit: // CHECK-32-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@__omp_outlined__58 // CHECK-32-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 // CHECK-32-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP3]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32: omp.inner.for.cond: // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-NEXT: [[CMP:%.*]] = icmp ule i32 [[TMP5]], [[TMP6]] // CHECK-32-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32: omp.inner.for.body: // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-NEXT: store i32 [[ADD]], i32* [[I]], align 4 // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32: omp.body.continue: // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32: omp.inner.for.inc: // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP8]], [[TMP9]] // CHECK-32-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK-32: omp.inner.for.end: // CHECK-32-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-32: omp.loop.exit: // CHECK-32-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]]) // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l130 // CHECK-32-SAME: () #[[ATTR0]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32: user_code.entry: // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 // CHECK-32-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4 // CHECK-32-NEXT: call void @__omp_outlined__59(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR2]] // CHECK-32-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-NEXT: ret void // CHECK-32: worker.exit: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@__omp_outlined__59 // CHECK-32-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x i8*], align 4 // CHECK-32-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block() // CHECK-32-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-32-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-32: cond.true: // CHECK-32-NEXT: br label [[COND_END:%.*]] // CHECK-32: cond.false: // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: br label [[COND_END]] // CHECK-32: cond.end: // CHECK-32-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-32-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32: omp.inner.for.cond: // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10 // CHECK-32-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32: omp.inner.for.body: // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0 // CHECK-32-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to i8* // CHECK-32-NEXT: store i8* [[TMP9]], i8** [[TMP8]], align 4 // CHECK-32-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1 // CHECK-32-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to i8* // CHECK-32-NEXT: store i8* [[TMP11]], i8** [[TMP10]], align 4 // CHECK-32-NEXT: [[TMP12:%.*]] = bitcast [2 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32)* @__omp_outlined__60 to i8*), i8* null, i8** [[TMP12]], i32 2) // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32: omp.inner.for.inc: // CHECK-32-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] // CHECK-32-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] // CHECK-32-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] // CHECK-32-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP19]], 9 // CHECK-32-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]] // CHECK-32: cond.true5: // CHECK-32-NEXT: br label [[COND_END7:%.*]] // CHECK-32: cond.false6: // CHECK-32-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: br label [[COND_END7]] // CHECK-32: cond.end7: // CHECK-32-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP20]], [[COND_FALSE6]] ] // CHECK-32-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP21]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK-32: omp.inner.for.end: // CHECK-32-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-32: omp.loop.exit: // CHECK-32-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@__omp_outlined__60 // CHECK-32-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 // CHECK-32-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 9 // CHECK-32-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-32: cond.true: // CHECK-32-NEXT: br label [[COND_END:%.*]] // CHECK-32: cond.false: // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: br label [[COND_END]] // CHECK-32: cond.end: // CHECK-32-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] // CHECK-32-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32: omp.inner.for.cond: // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] // CHECK-32-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32: omp.inner.for.body: // CHECK-32-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-NEXT: store i32 [[ADD]], i32* [[I]], align 4 // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32: omp.body.continue: // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32: omp.inner.for.inc: // CHECK-32-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 // CHECK-32-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK-32: omp.inner.for.end: // CHECK-32-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-32: omp.loop.exit: // CHECK-32-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]]) // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l135 // CHECK-32-SAME: () #[[ATTR0]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32: user_code.entry: // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 // CHECK-32-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4 // CHECK-32-NEXT: call void @__omp_outlined__61(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR2]] // CHECK-32-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-NEXT: ret void // CHECK-32: worker.exit: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@__omp_outlined__61 // CHECK-32-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x i8*], align 4 // CHECK-32-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block() // CHECK-32-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-32-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-32: cond.true: // CHECK-32-NEXT: br label [[COND_END:%.*]] // CHECK-32: cond.false: // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: br label [[COND_END]] // CHECK-32: cond.end: // CHECK-32-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-32-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32: omp.inner.for.cond: // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10 // CHECK-32-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32: omp.inner.for.body: // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0 // CHECK-32-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to i8* // CHECK-32-NEXT: store i8* [[TMP9]], i8** [[TMP8]], align 4 // CHECK-32-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1 // CHECK-32-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to i8* // CHECK-32-NEXT: store i8* [[TMP11]], i8** [[TMP10]], align 4 // CHECK-32-NEXT: [[TMP12:%.*]] = bitcast [2 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32)* @__omp_outlined__62 to i8*), i8* null, i8** [[TMP12]], i32 2) // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32: omp.inner.for.inc: // CHECK-32-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] // CHECK-32-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] // CHECK-32-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] // CHECK-32-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP19]], 9 // CHECK-32-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]] // CHECK-32: cond.true5: // CHECK-32-NEXT: br label [[COND_END7:%.*]] // CHECK-32: cond.false6: // CHECK-32-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: br label [[COND_END7]] // CHECK-32: cond.end7: // CHECK-32-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP20]], [[COND_FALSE6]] ] // CHECK-32-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP21]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK-32: omp.inner.for.end: // CHECK-32-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-32: omp.loop.exit: // CHECK-32-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@__omp_outlined__62 // CHECK-32-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 // CHECK-32-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP3]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32: omp.inner.for.cond: // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-NEXT: [[CMP:%.*]] = icmp ule i32 [[TMP5]], [[TMP6]] // CHECK-32-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32: omp.inner.for.body: // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-NEXT: store i32 [[ADD]], i32* [[I]], align 4 // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32: omp.body.continue: // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32: omp.inner.for.inc: // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP8]], [[TMP9]] // CHECK-32-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK-32: omp.inner.for.end: // CHECK-32-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-32: omp.loop.exit: // CHECK-32-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]]) // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l140 // CHECK-32-SAME: () #[[ATTR0]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32: user_code.entry: // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 // CHECK-32-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4 // CHECK-32-NEXT: call void @__omp_outlined__63(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR2]] // CHECK-32-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-NEXT: ret void // CHECK-32: worker.exit: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@__omp_outlined__63 // CHECK-32-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x i8*], align 4 // CHECK-32-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block() // CHECK-32-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-32-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-32: cond.true: // CHECK-32-NEXT: br label [[COND_END:%.*]] // CHECK-32: cond.false: // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: br label [[COND_END]] // CHECK-32: cond.end: // CHECK-32-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-32-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32: omp.inner.for.cond: // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10 // CHECK-32-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32: omp.inner.for.body: // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0 // CHECK-32-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to i8* // CHECK-32-NEXT: store i8* [[TMP9]], i8** [[TMP8]], align 4 // CHECK-32-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1 // CHECK-32-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to i8* // CHECK-32-NEXT: store i8* [[TMP11]], i8** [[TMP10]], align 4 // CHECK-32-NEXT: [[TMP12:%.*]] = bitcast [2 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32)* @__omp_outlined__64 to i8*), i8* null, i8** [[TMP12]], i32 2) // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32: omp.inner.for.inc: // CHECK-32-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] // CHECK-32-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] // CHECK-32-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] // CHECK-32-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP19]], 9 // CHECK-32-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]] // CHECK-32: cond.true5: // CHECK-32-NEXT: br label [[COND_END7:%.*]] // CHECK-32: cond.false6: // CHECK-32-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: br label [[COND_END7]] // CHECK-32: cond.end7: // CHECK-32-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP20]], [[COND_FALSE6]] ] // CHECK-32-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP21]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK-32: omp.inner.for.end: // CHECK-32-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-32: omp.loop.exit: // CHECK-32-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@__omp_outlined__64 // CHECK-32-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 // CHECK-32-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 1073741862, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1) // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-32: omp.dispatch.cond: // CHECK-32-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-32-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0 // CHECK-32-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-32: omp.dispatch.body: // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32: omp.inner.for.cond: // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP246:![0-9]+]] // CHECK-32-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP246]] // CHECK-32-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] // CHECK-32-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32: omp.inner.for.body: // CHECK-32-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP246]] // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP246]] // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32: omp.body.continue: // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32: omp.inner.for.inc: // CHECK-32-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP246]] // CHECK-32-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP11]], 1 // CHECK-32-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP246]] // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP247:![0-9]+]] // CHECK-32: omp.inner.for.end: // CHECK-32-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-32: omp.dispatch.inc: // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-32: omp.dispatch.end: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l145 // CHECK-32-SAME: () #[[ATTR0]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32: user_code.entry: // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 // CHECK-32-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4 // CHECK-32-NEXT: call void @__omp_outlined__65(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR2]] // CHECK-32-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-NEXT: ret void // CHECK-32: worker.exit: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@__omp_outlined__65 // CHECK-32-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x i8*], align 4 // CHECK-32-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block() // CHECK-32-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-32-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-32: cond.true: // CHECK-32-NEXT: br label [[COND_END:%.*]] // CHECK-32: cond.false: // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: br label [[COND_END]] // CHECK-32: cond.end: // CHECK-32-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-32-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32: omp.inner.for.cond: // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10 // CHECK-32-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32: omp.inner.for.body: // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0 // CHECK-32-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to i8* // CHECK-32-NEXT: store i8* [[TMP9]], i8** [[TMP8]], align 4 // CHECK-32-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1 // CHECK-32-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to i8* // CHECK-32-NEXT: store i8* [[TMP11]], i8** [[TMP10]], align 4 // CHECK-32-NEXT: [[TMP12:%.*]] = bitcast [2 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32)* @__omp_outlined__66 to i8*), i8* null, i8** [[TMP12]], i32 2) // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32: omp.inner.for.inc: // CHECK-32-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] // CHECK-32-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] // CHECK-32-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] // CHECK-32-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP19]], 9 // CHECK-32-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]] // CHECK-32: cond.true5: // CHECK-32-NEXT: br label [[COND_END7:%.*]] // CHECK-32: cond.false6: // CHECK-32-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: br label [[COND_END7]] // CHECK-32: cond.end7: // CHECK-32-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP20]], [[COND_FALSE6]] ] // CHECK-32-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP21]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK-32: omp.inner.for.end: // CHECK-32-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-32: omp.loop.exit: // CHECK-32-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@__omp_outlined__66 // CHECK-32-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 // CHECK-32-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 1073741861, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1) // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-32: omp.dispatch.cond: // CHECK-32-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-32-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0 // CHECK-32-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-32: omp.dispatch.body: // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32: omp.inner.for.cond: // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP249:![0-9]+]] // CHECK-32-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP249]] // CHECK-32-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] // CHECK-32-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32: omp.inner.for.body: // CHECK-32-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP249]] // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP249]] // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32: omp.body.continue: // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32: omp.inner.for.inc: // CHECK-32-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP249]] // CHECK-32-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP11]], 1 // CHECK-32-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP249]] // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP250:![0-9]+]] // CHECK-32: omp.inner.for.end: // CHECK-32-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-32: omp.dispatch.inc: // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-32: omp.dispatch.end: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l150 // CHECK-32-SAME: () #[[ATTR0]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32: user_code.entry: // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 // CHECK-32-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4 // CHECK-32-NEXT: call void @__omp_outlined__67(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR2]] // CHECK-32-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-NEXT: ret void // CHECK-32: worker.exit: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@__omp_outlined__67 // CHECK-32-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x i8*], align 4 // CHECK-32-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block() // CHECK-32-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-32-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-32: cond.true: // CHECK-32-NEXT: br label [[COND_END:%.*]] // CHECK-32: cond.false: // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: br label [[COND_END]] // CHECK-32: cond.end: // CHECK-32-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-32-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32: omp.inner.for.cond: // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10 // CHECK-32-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32: omp.inner.for.body: // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0 // CHECK-32-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to i8* // CHECK-32-NEXT: store i8* [[TMP9]], i8** [[TMP8]], align 4 // CHECK-32-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1 // CHECK-32-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to i8* // CHECK-32-NEXT: store i8* [[TMP11]], i8** [[TMP10]], align 4 // CHECK-32-NEXT: [[TMP12:%.*]] = bitcast [2 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32)* @__omp_outlined__68 to i8*), i8* null, i8** [[TMP12]], i32 2) // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32: omp.inner.for.inc: // CHECK-32-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] // CHECK-32-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] // CHECK-32-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] // CHECK-32-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP19]], 9 // CHECK-32-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]] // CHECK-32: cond.true5: // CHECK-32-NEXT: br label [[COND_END7:%.*]] // CHECK-32: cond.false6: // CHECK-32-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: br label [[COND_END7]] // CHECK-32: cond.end7: // CHECK-32-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP20]], [[COND_FALSE6]] ] // CHECK-32-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP21]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK-32: omp.inner.for.end: // CHECK-32-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-32: omp.loop.exit: // CHECK-32-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@__omp_outlined__68 // CHECK-32-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 // CHECK-32-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 1073741859, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1) // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-32: omp.dispatch.cond: // CHECK-32-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-32-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0 // CHECK-32-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-32: omp.dispatch.body: // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32: omp.inner.for.cond: // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP252:![0-9]+]] // CHECK-32-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP252]] // CHECK-32-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] // CHECK-32-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32: omp.inner.for.body: // CHECK-32-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP252]] // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP252]] // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32: omp.body.continue: // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32: omp.inner.for.inc: // CHECK-32-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP252]] // CHECK-32-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP11]], 1 // CHECK-32-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP252]] // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP253:![0-9]+]] // CHECK-32: omp.inner.for.end: // CHECK-32-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-32: omp.dispatch.inc: // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-32: omp.dispatch.end: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l155 // CHECK-32-SAME: () #[[ATTR0]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32: user_code.entry: // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 // CHECK-32-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4 // CHECK-32-NEXT: call void @__omp_outlined__69(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR2]] // CHECK-32-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-NEXT: ret void // CHECK-32: worker.exit: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@__omp_outlined__69 // CHECK-32-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x i8*], align 4 // CHECK-32-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block() // CHECK-32-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-32-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-32: cond.true: // CHECK-32-NEXT: br label [[COND_END:%.*]] // CHECK-32: cond.false: // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: br label [[COND_END]] // CHECK-32: cond.end: // CHECK-32-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-32-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32: omp.inner.for.cond: // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10 // CHECK-32-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32: omp.inner.for.body: // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0 // CHECK-32-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to i8* // CHECK-32-NEXT: store i8* [[TMP9]], i8** [[TMP8]], align 4 // CHECK-32-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1 // CHECK-32-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to i8* // CHECK-32-NEXT: store i8* [[TMP11]], i8** [[TMP10]], align 4 // CHECK-32-NEXT: [[TMP12:%.*]] = bitcast [2 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32)* @__omp_outlined__70 to i8*), i8* null, i8** [[TMP12]], i32 2) // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32: omp.inner.for.inc: // CHECK-32-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] // CHECK-32-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] // CHECK-32-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] // CHECK-32-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP19]], 9 // CHECK-32-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]] // CHECK-32: cond.true5: // CHECK-32-NEXT: br label [[COND_END7:%.*]] // CHECK-32: cond.false6: // CHECK-32-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: br label [[COND_END7]] // CHECK-32: cond.end7: // CHECK-32-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP20]], [[COND_FALSE6]] ] // CHECK-32-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP21]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK-32: omp.inner.for.end: // CHECK-32-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-32: omp.loop.exit: // CHECK-32-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@__omp_outlined__70 // CHECK-32-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 // CHECK-32-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 1073741860, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1) // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-32: omp.dispatch.cond: // CHECK-32-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-32-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0 // CHECK-32-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-32: omp.dispatch.body: // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32: omp.inner.for.cond: // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP255:![0-9]+]] // CHECK-32-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP255]] // CHECK-32-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] // CHECK-32-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32: omp.inner.for.body: // CHECK-32-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP255]] // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP255]] // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32: omp.body.continue: // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32: omp.inner.for.inc: // CHECK-32-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP255]] // CHECK-32-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP11]], 1 // CHECK-32-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP255]] // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP256:![0-9]+]] // CHECK-32: omp.inner.for.end: // CHECK-32-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-32: omp.dispatch.inc: // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-32: omp.dispatch.end: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l160 // CHECK-32-SAME: (i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR8:[0-9]+]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 4 // CHECK-32-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 // CHECK-32-NEXT: [[CONV:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR__ADDR]] to i8* // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32: user_code.entry: // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-NEXT: [[TMP2:%.*]] = load i8, i8* [[CONV]], align 1 // CHECK-32-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP2]] to i1 // CHECK-32-NEXT: [[TMP3:%.*]] = zext i1 [[TOBOOL]] to i32 // CHECK-32-NEXT: [[TMP4:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 [[TMP3]], i32 -1, i32 -1, i8* bitcast (void (i32*, i32*)* @__omp_outlined__71 to i8*), i8* null, i8** [[TMP4]], i32 0) // CHECK-32-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-NEXT: ret void // CHECK-32: worker.exit: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@__omp_outlined__71 // CHECK-32-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-32: omp.dispatch.cond: // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-32-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-32: cond.true: // CHECK-32-NEXT: br label [[COND_END:%.*]] // CHECK-32: cond.false: // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: br label [[COND_END]] // CHECK-32: cond.end: // CHECK-32-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-32-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] // CHECK-32-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-32: omp.dispatch.body: // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32: omp.inner.for.cond: // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] // CHECK-32-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32: omp.inner.for.body: // CHECK-32-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-NEXT: store i32 [[ADD]], i32* [[I]], align 4 // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32: omp.body.continue: // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32: omp.inner.for.inc: // CHECK-32-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 // CHECK-32-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK-32: omp.inner.for.end: // CHECK-32-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-32: omp.dispatch.inc: // CHECK-32-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] // CHECK-32-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] // CHECK-32-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-32: omp.dispatch.end: // CHECK-32-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l163 // CHECK-32-SAME: () #[[ATTR8]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32: user_code.entry: // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-NEXT: [[TMP2:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*)* @__omp_outlined__72 to i8*), i8* null, i8** [[TMP2]], i32 0) // CHECK-32-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-NEXT: ret void // CHECK-32: worker.exit: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@__omp_outlined__72 // CHECK-32-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-32-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-32: cond.true: // CHECK-32-NEXT: br label [[COND_END:%.*]] // CHECK-32: cond.false: // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: br label [[COND_END]] // CHECK-32: cond.end: // CHECK-32-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-32-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32: omp.inner.for.cond: // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] // CHECK-32-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32: omp.inner.for.body: // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-NEXT: store i32 [[ADD]], i32* [[I]], align 4 // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32: omp.body.continue: // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32: omp.inner.for.inc: // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 1 // CHECK-32-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK-32: omp.inner.for.end: // CHECK-32-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-32: omp.loop.exit: // CHECK-32-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l166 // CHECK-32-SAME: () #[[ATTR8]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32: user_code.entry: // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-NEXT: [[TMP2:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*)* @__omp_outlined__73 to i8*), i8* null, i8** [[TMP2]], i32 0) // CHECK-32-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-NEXT: ret void // CHECK-32: worker.exit: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@__omp_outlined__73 // CHECK-32-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-32: omp.dispatch.cond: // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-32-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-32: cond.true: // CHECK-32-NEXT: br label [[COND_END:%.*]] // CHECK-32: cond.false: // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: br label [[COND_END]] // CHECK-32: cond.end: // CHECK-32-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-32-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] // CHECK-32-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-32: omp.dispatch.body: // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32: omp.inner.for.cond: // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] // CHECK-32-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32: omp.inner.for.body: // CHECK-32-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-NEXT: store i32 [[ADD]], i32* [[I]], align 4 // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32: omp.body.continue: // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32: omp.inner.for.inc: // CHECK-32-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 // CHECK-32-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK-32: omp.inner.for.end: // CHECK-32-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-32: omp.dispatch.inc: // CHECK-32-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] // CHECK-32-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] // CHECK-32-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-32: omp.dispatch.end: // CHECK-32-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l169 // CHECK-32-SAME: () #[[ATTR8]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32: user_code.entry: // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-NEXT: [[TMP2:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*)* @__omp_outlined__74 to i8*), i8* null, i8** [[TMP2]], i32 0) // CHECK-32-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-NEXT: ret void // CHECK-32: worker.exit: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@__omp_outlined__74 // CHECK-32-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1073741862, i32 0, i32 9, i32 1, i32 1) // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-32: omp.dispatch.cond: // CHECK-32-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-32-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0 // CHECK-32-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-32: omp.dispatch.body: // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP3]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32: omp.inner.for.cond: // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP258:![0-9]+]] // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP258]] // CHECK-32-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]] // CHECK-32-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32: omp.inner.for.body: // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP258]] // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP258]] // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32: omp.body.continue: // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32: omp.inner.for.inc: // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP258]] // CHECK-32-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP7]], 1 // CHECK-32-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP258]] // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP259:![0-9]+]] // CHECK-32: omp.inner.for.end: // CHECK-32-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-32: omp.dispatch.inc: // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-32: omp.dispatch.end: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l172 // CHECK-32-SAME: () #[[ATTR8]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32: user_code.entry: // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-NEXT: [[TMP2:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*)* @__omp_outlined__75 to i8*), i8* null, i8** [[TMP2]], i32 0) // CHECK-32-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-NEXT: ret void // CHECK-32: worker.exit: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@__omp_outlined__75 // CHECK-32-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1073741861, i32 0, i32 9, i32 1, i32 1) // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-32: omp.dispatch.cond: // CHECK-32-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-32-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0 // CHECK-32-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-32: omp.dispatch.body: // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP3]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32: omp.inner.for.cond: // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP261:![0-9]+]] // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP261]] // CHECK-32-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]] // CHECK-32-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32: omp.inner.for.body: // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP261]] // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP261]] // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32: omp.body.continue: // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32: omp.inner.for.inc: // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP261]] // CHECK-32-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP7]], 1 // CHECK-32-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP261]] // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP262:![0-9]+]] // CHECK-32: omp.inner.for.end: // CHECK-32-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-32: omp.dispatch.inc: // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-32: omp.dispatch.end: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l175 // CHECK-32-SAME: () #[[ATTR8]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32: user_code.entry: // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-NEXT: [[TMP2:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*)* @__omp_outlined__76 to i8*), i8* null, i8** [[TMP2]], i32 0) // CHECK-32-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-NEXT: ret void // CHECK-32: worker.exit: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@__omp_outlined__76 // CHECK-32-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1073741859, i32 0, i32 9, i32 1, i32 1) // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-32: omp.dispatch.cond: // CHECK-32-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-32-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0 // CHECK-32-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-32: omp.dispatch.body: // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP3]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32: omp.inner.for.cond: // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP264:![0-9]+]] // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP264]] // CHECK-32-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]] // CHECK-32-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32: omp.inner.for.body: // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP264]] // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP264]] // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32: omp.body.continue: // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32: omp.inner.for.inc: // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP264]] // CHECK-32-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP7]], 1 // CHECK-32-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP264]] // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP265:![0-9]+]] // CHECK-32: omp.inner.for.end: // CHECK-32-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-32: omp.dispatch.inc: // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-32: omp.dispatch.end: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l178 // CHECK-32-SAME: () #[[ATTR8]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32: user_code.entry: // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-NEXT: [[TMP2:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*)* @__omp_outlined__77 to i8*), i8* null, i8** [[TMP2]], i32 0) // CHECK-32-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-NEXT: ret void // CHECK-32: worker.exit: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@__omp_outlined__77 // CHECK-32-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1073741860, i32 0, i32 9, i32 1, i32 1) // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-32: omp.dispatch.cond: // CHECK-32-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-32-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0 // CHECK-32-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-32: omp.dispatch.body: // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP3]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32: omp.inner.for.cond: // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP267:![0-9]+]] // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP267]] // CHECK-32-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]] // CHECK-32-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32: omp.inner.for.body: // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP267]] // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP267]] // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32: omp.body.continue: // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32: omp.inner.for.inc: // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP267]] // CHECK-32-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP7]], 1 // CHECK-32-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP267]] // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP268:![0-9]+]] // CHECK-32: omp.inner.for.end: // CHECK-32-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-32: omp.dispatch.inc: // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-32: omp.dispatch.end: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l181 // CHECK-32-SAME: (i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR8]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 4 // CHECK-32-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 // CHECK-32-NEXT: [[CONV:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR__ADDR]] to i8* // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32: user_code.entry: // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-NEXT: [[TMP2:%.*]] = load i8, i8* [[CONV]], align 1 // CHECK-32-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP2]] to i1 // CHECK-32-NEXT: [[TMP3:%.*]] = zext i1 [[TOBOOL]] to i32 // CHECK-32-NEXT: [[TMP4:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 [[TMP3]], i32 -1, i32 -1, i8* bitcast (void (i32*, i32*)* @__omp_outlined__78 to i8*), i8* null, i8** [[TMP4]], i32 0) // CHECK-32-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-NEXT: ret void // CHECK-32: worker.exit: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@__omp_outlined__78 // CHECK-32-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-32: omp.dispatch.cond: // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-32-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-32: cond.true: // CHECK-32-NEXT: br label [[COND_END:%.*]] // CHECK-32: cond.false: // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: br label [[COND_END]] // CHECK-32: cond.end: // CHECK-32-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-32-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] // CHECK-32-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-32: omp.dispatch.body: // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32: omp.inner.for.cond: // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP270:![0-9]+]] // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP270]] // CHECK-32-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] // CHECK-32-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32: omp.inner.for.body: // CHECK-32-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP270]] // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP270]] // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32: omp.body.continue: // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32: omp.inner.for.inc: // CHECK-32-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP270]] // CHECK-32-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 // CHECK-32-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP270]] // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP271:![0-9]+]] // CHECK-32: omp.inner.for.end: // CHECK-32-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-32: omp.dispatch.inc: // CHECK-32-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] // CHECK-32-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] // CHECK-32-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-32: omp.dispatch.end: // CHECK-32-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) // CHECK-32-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0 // CHECK-32-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-32: .omp.final.then: // CHECK-32-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-32-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-32: .omp.final.done: // CHECK-32-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4:[0-9]+]], i32 [[TMP1]]) // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l185 // CHECK-32-SAME: () #[[ATTR8]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32: user_code.entry: // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-NEXT: [[TMP2:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*)* @__omp_outlined__79 to i8*), i8* null, i8** [[TMP2]], i32 0) // CHECK-32-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-NEXT: ret void // CHECK-32: worker.exit: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@__omp_outlined__79 // CHECK-32-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-32-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-32: cond.true: // CHECK-32-NEXT: br label [[COND_END:%.*]] // CHECK-32: cond.false: // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: br label [[COND_END]] // CHECK-32: cond.end: // CHECK-32-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-32-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32: omp.inner.for.cond: // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP273:![0-9]+]] // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP273]] // CHECK-32-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] // CHECK-32-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32: omp.inner.for.body: // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP273]] // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP273]] // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32: omp.body.continue: // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32: omp.inner.for.inc: // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP273]] // CHECK-32-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 1 // CHECK-32-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP273]] // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP274:![0-9]+]] // CHECK-32: omp.inner.for.end: // CHECK-32-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-32: omp.loop.exit: // CHECK-32-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) // CHECK-32-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0 // CHECK-32-NEXT: br i1 [[TMP10]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-32: .omp.final.then: // CHECK-32-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-32-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-32: .omp.final.done: // CHECK-32-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4]], i32 [[TMP1]]) // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l189 // CHECK-32-SAME: () #[[ATTR8]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32: user_code.entry: // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-NEXT: [[TMP2:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*)* @__omp_outlined__80 to i8*), i8* null, i8** [[TMP2]], i32 0) // CHECK-32-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-NEXT: ret void // CHECK-32: worker.exit: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@__omp_outlined__80 // CHECK-32-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-32: omp.dispatch.cond: // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-32-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-32: cond.true: // CHECK-32-NEXT: br label [[COND_END:%.*]] // CHECK-32: cond.false: // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: br label [[COND_END]] // CHECK-32: cond.end: // CHECK-32-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-32-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] // CHECK-32-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-32: omp.dispatch.body: // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32: omp.inner.for.cond: // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP276:![0-9]+]] // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP276]] // CHECK-32-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] // CHECK-32-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32: omp.inner.for.body: // CHECK-32-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP276]] // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP276]] // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32: omp.body.continue: // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32: omp.inner.for.inc: // CHECK-32-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP276]] // CHECK-32-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 // CHECK-32-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP276]] // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP277:![0-9]+]] // CHECK-32: omp.inner.for.end: // CHECK-32-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-32: omp.dispatch.inc: // CHECK-32-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] // CHECK-32-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] // CHECK-32-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-32: omp.dispatch.end: // CHECK-32-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) // CHECK-32-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0 // CHECK-32-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-32: .omp.final.then: // CHECK-32-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-32-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-32: .omp.final.done: // CHECK-32-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4]], i32 [[TMP1]]) // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l193 // CHECK-32-SAME: () #[[ATTR8]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32: user_code.entry: // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-NEXT: [[TMP2:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*)* @__omp_outlined__81 to i8*), i8* null, i8** [[TMP2]], i32 0) // CHECK-32-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-NEXT: ret void // CHECK-32: worker.exit: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@__omp_outlined__81 // CHECK-32-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1073741862, i32 0, i32 9, i32 1, i32 1) // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-32: omp.dispatch.cond: // CHECK-32-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-32-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0 // CHECK-32-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-32: omp.dispatch.body: // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP3]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32: omp.inner.for.cond: // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP279:![0-9]+]] // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP279]] // CHECK-32-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]] // CHECK-32-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32: omp.inner.for.body: // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP279]] // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP279]] // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32: omp.body.continue: // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32: omp.inner.for.inc: // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP279]] // CHECK-32-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP7]], 1 // CHECK-32-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP279]] // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP280:![0-9]+]] // CHECK-32: omp.inner.for.end: // CHECK-32-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-32: omp.dispatch.inc: // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-32: omp.dispatch.end: // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[TMP9:%.*]] = icmp ne i32 [[TMP8]], 0 // CHECK-32-NEXT: br i1 [[TMP9]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-32: .omp.final.then: // CHECK-32-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-32-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-32: .omp.final.done: // CHECK-32-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4]], i32 [[TMP1]]) // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l197 // CHECK-32-SAME: () #[[ATTR8]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32: user_code.entry: // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-NEXT: [[TMP2:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*)* @__omp_outlined__82 to i8*), i8* null, i8** [[TMP2]], i32 0) // CHECK-32-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-NEXT: ret void // CHECK-32: worker.exit: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@__omp_outlined__82 // CHECK-32-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1073741861, i32 0, i32 9, i32 1, i32 1) // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-32: omp.dispatch.cond: // CHECK-32-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-32-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0 // CHECK-32-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-32: omp.dispatch.body: // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP3]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32: omp.inner.for.cond: // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP282:![0-9]+]] // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP282]] // CHECK-32-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]] // CHECK-32-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32: omp.inner.for.body: // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP282]] // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP282]] // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32: omp.body.continue: // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32: omp.inner.for.inc: // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP282]] // CHECK-32-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP7]], 1 // CHECK-32-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP282]] // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP283:![0-9]+]] // CHECK-32: omp.inner.for.end: // CHECK-32-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-32: omp.dispatch.inc: // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-32: omp.dispatch.end: // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[TMP9:%.*]] = icmp ne i32 [[TMP8]], 0 // CHECK-32-NEXT: br i1 [[TMP9]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-32: .omp.final.then: // CHECK-32-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-32-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-32: .omp.final.done: // CHECK-32-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4]], i32 [[TMP1]]) // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l201 // CHECK-32-SAME: () #[[ATTR8]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32: user_code.entry: // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-NEXT: [[TMP2:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*)* @__omp_outlined__83 to i8*), i8* null, i8** [[TMP2]], i32 0) // CHECK-32-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-NEXT: ret void // CHECK-32: worker.exit: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@__omp_outlined__83 // CHECK-32-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1073741859, i32 0, i32 9, i32 1, i32 1) // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-32: omp.dispatch.cond: // CHECK-32-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-32-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0 // CHECK-32-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-32: omp.dispatch.body: // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP3]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32: omp.inner.for.cond: // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP285:![0-9]+]] // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP285]] // CHECK-32-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]] // CHECK-32-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32: omp.inner.for.body: // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP285]] // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP285]] // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32: omp.body.continue: // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32: omp.inner.for.inc: // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP285]] // CHECK-32-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP7]], 1 // CHECK-32-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP285]] // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP286:![0-9]+]] // CHECK-32: omp.inner.for.end: // CHECK-32-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-32: omp.dispatch.inc: // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-32: omp.dispatch.end: // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[TMP9:%.*]] = icmp ne i32 [[TMP8]], 0 // CHECK-32-NEXT: br i1 [[TMP9]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-32: .omp.final.then: // CHECK-32-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-32-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-32: .omp.final.done: // CHECK-32-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4]], i32 [[TMP1]]) // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l205 // CHECK-32-SAME: () #[[ATTR8]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32: user_code.entry: // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-NEXT: [[TMP2:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*)* @__omp_outlined__84 to i8*), i8* null, i8** [[TMP2]], i32 0) // CHECK-32-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-NEXT: ret void // CHECK-32: worker.exit: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@__omp_outlined__84 // CHECK-32-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1073741860, i32 0, i32 9, i32 1, i32 1) // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-32: omp.dispatch.cond: // CHECK-32-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-32-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0 // CHECK-32-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-32: omp.dispatch.body: // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP3]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32: omp.inner.for.cond: // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP288:![0-9]+]] // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP288]] // CHECK-32-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]] // CHECK-32-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32: omp.inner.for.body: // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP288]] // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP288]] // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32: omp.body.continue: // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32: omp.inner.for.inc: // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP288]] // CHECK-32-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP7]], 1 // CHECK-32-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP288]] // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP289:![0-9]+]] // CHECK-32: omp.inner.for.end: // CHECK-32-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-32: omp.dispatch.inc: // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-32: omp.dispatch.end: // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[TMP9:%.*]] = icmp ne i32 [[TMP8]], 0 // CHECK-32-NEXT: br i1 [[TMP9]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-32: .omp.final.then: // CHECK-32-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-32-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-32: .omp.final.done: // CHECK-32-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4]], i32 [[TMP1]]) // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l209 // CHECK-32-SAME: () #[[ATTR8]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32: user_code.entry: // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-NEXT: [[TMP2:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*)* @__omp_outlined__85 to i8*), i8* null, i8** [[TMP2]], i32 0) // CHECK-32-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-NEXT: ret void // CHECK-32: worker.exit: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@__omp_outlined__85 // CHECK-32-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 65, i32 0, i32 9, i32 1, i32 1) // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-32: omp.dispatch.cond: // CHECK-32-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-32-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0 // CHECK-32-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-32: omp.dispatch.body: // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP3]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32: omp.inner.for.cond: // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP291:![0-9]+]] // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP291]] // CHECK-32-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]] // CHECK-32-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32: omp.inner.for.body: // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP291]] // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP291]] // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32: omp.body.continue: // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32: omp.inner.for.inc: // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP291]] // CHECK-32-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP7]], 1 // CHECK-32-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP291]] // CHECK-32-NEXT: call void @__kmpc_dispatch_fini_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP291]] // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP292:![0-9]+]] // CHECK-32: omp.inner.for.end: // CHECK-32-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-32: omp.dispatch.inc: // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-32: omp.dispatch.end: // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[TMP9:%.*]] = icmp ne i32 [[TMP8]], 0 // CHECK-32-NEXT: br i1 [[TMP9]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-32: .omp.final.then: // CHECK-32-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-32-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-32: .omp.final.done: // CHECK-32-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4]], i32 [[TMP1]]) // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l214 // CHECK-32-SAME: () #[[ATTR8]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32: user_code.entry: // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-NEXT: [[TMP2:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*)* @__omp_outlined__86 to i8*), i8* null, i8** [[TMP2]], i32 0) // CHECK-32-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-NEXT: ret void // CHECK-32: worker.exit: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@__omp_outlined__86 // CHECK-32-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-32-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-32: cond.true: // CHECK-32-NEXT: br label [[COND_END:%.*]] // CHECK-32: cond.false: // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: br label [[COND_END]] // CHECK-32: cond.end: // CHECK-32-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-32-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32: omp.inner.for.cond: // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP294:![0-9]+]] // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP294]] // CHECK-32-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] // CHECK-32-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32: omp.inner.for.body: // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP294]] // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP294]] // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32: omp.body.continue: // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32: omp.inner.for.inc: // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP294]] // CHECK-32-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 1 // CHECK-32-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP294]] // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP295:![0-9]+]] // CHECK-32: omp.inner.for.end: // CHECK-32-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-32: omp.loop.exit: // CHECK-32-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) // CHECK-32-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0 // CHECK-32-NEXT: br i1 [[TMP10]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-32: .omp.final.then: // CHECK-32-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-32-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-32: .omp.final.done: // CHECK-32-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4]], i32 [[TMP1]]) // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l219 // CHECK-32-SAME: () #[[ATTR8]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32: user_code.entry: // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-NEXT: [[TMP2:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*)* @__omp_outlined__87 to i8*), i8* null, i8** [[TMP2]], i32 0) // CHECK-32-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-NEXT: ret void // CHECK-32: worker.exit: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@__omp_outlined__87 // CHECK-32-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-32: omp.dispatch.cond: // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-32-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-32: cond.true: // CHECK-32-NEXT: br label [[COND_END:%.*]] // CHECK-32: cond.false: // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: br label [[COND_END]] // CHECK-32: cond.end: // CHECK-32-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-32-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] // CHECK-32-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-32: omp.dispatch.body: // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32: omp.inner.for.cond: // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP297:![0-9]+]] // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP297]] // CHECK-32-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] // CHECK-32-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32: omp.inner.for.body: // CHECK-32-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP297]] // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP297]] // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32: omp.body.continue: // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32: omp.inner.for.inc: // CHECK-32-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP297]] // CHECK-32-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 // CHECK-32-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP297]] // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP298:![0-9]+]] // CHECK-32: omp.inner.for.end: // CHECK-32-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-32: omp.dispatch.inc: // CHECK-32-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] // CHECK-32-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] // CHECK-32-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-32: omp.dispatch.end: // CHECK-32-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) // CHECK-32-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0 // CHECK-32-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-32: .omp.final.then: // CHECK-32-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-32-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-32: .omp.final.done: // CHECK-32-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4]], i32 [[TMP1]]) // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l224 // CHECK-32-SAME: () #[[ATTR8]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32: user_code.entry: // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-NEXT: [[TMP2:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*)* @__omp_outlined__88 to i8*), i8* null, i8** [[TMP2]], i32 0) // CHECK-32-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-NEXT: ret void // CHECK-32: worker.exit: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@__omp_outlined__88 // CHECK-32-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1073741862, i32 0, i32 9, i32 1, i32 1) // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-32: omp.dispatch.cond: // CHECK-32-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-32-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0 // CHECK-32-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-32: omp.dispatch.body: // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP3]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32: omp.inner.for.cond: // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP300:![0-9]+]] // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP300]] // CHECK-32-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]] // CHECK-32-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32: omp.inner.for.body: // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP300]] // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP300]] // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32: omp.body.continue: // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32: omp.inner.for.inc: // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP300]] // CHECK-32-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP7]], 1 // CHECK-32-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP300]] // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP301:![0-9]+]] // CHECK-32: omp.inner.for.end: // CHECK-32-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-32: omp.dispatch.inc: // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-32: omp.dispatch.end: // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[TMP9:%.*]] = icmp ne i32 [[TMP8]], 0 // CHECK-32-NEXT: br i1 [[TMP9]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-32: .omp.final.then: // CHECK-32-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-32-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-32: .omp.final.done: // CHECK-32-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4]], i32 [[TMP1]]) // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l229 // CHECK-32-SAME: () #[[ATTR8]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32: user_code.entry: // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-NEXT: [[TMP2:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*)* @__omp_outlined__89 to i8*), i8* null, i8** [[TMP2]], i32 0) // CHECK-32-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-NEXT: ret void // CHECK-32: worker.exit: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@__omp_outlined__89 // CHECK-32-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1073741861, i32 0, i32 9, i32 1, i32 1) // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-32: omp.dispatch.cond: // CHECK-32-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-32-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0 // CHECK-32-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-32: omp.dispatch.body: // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP3]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32: omp.inner.for.cond: // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP303:![0-9]+]] // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP303]] // CHECK-32-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]] // CHECK-32-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32: omp.inner.for.body: // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP303]] // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP303]] // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32: omp.body.continue: // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32: omp.inner.for.inc: // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP303]] // CHECK-32-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP7]], 1 // CHECK-32-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP303]] // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP304:![0-9]+]] // CHECK-32: omp.inner.for.end: // CHECK-32-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-32: omp.dispatch.inc: // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-32: omp.dispatch.end: // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[TMP9:%.*]] = icmp ne i32 [[TMP8]], 0 // CHECK-32-NEXT: br i1 [[TMP9]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-32: .omp.final.then: // CHECK-32-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-32-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-32: .omp.final.done: // CHECK-32-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4]], i32 [[TMP1]]) // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l234 // CHECK-32-SAME: () #[[ATTR8]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32: user_code.entry: // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-NEXT: [[TMP2:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*)* @__omp_outlined__90 to i8*), i8* null, i8** [[TMP2]], i32 0) // CHECK-32-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-NEXT: ret void // CHECK-32: worker.exit: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@__omp_outlined__90 // CHECK-32-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1073741859, i32 0, i32 9, i32 1, i32 1) // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-32: omp.dispatch.cond: // CHECK-32-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-32-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0 // CHECK-32-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-32: omp.dispatch.body: // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP3]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32: omp.inner.for.cond: // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP306:![0-9]+]] // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP306]] // CHECK-32-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]] // CHECK-32-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32: omp.inner.for.body: // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP306]] // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP306]] // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32: omp.body.continue: // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32: omp.inner.for.inc: // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP306]] // CHECK-32-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP7]], 1 // CHECK-32-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP306]] // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP307:![0-9]+]] // CHECK-32: omp.inner.for.end: // CHECK-32-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-32: omp.dispatch.inc: // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-32: omp.dispatch.end: // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[TMP9:%.*]] = icmp ne i32 [[TMP8]], 0 // CHECK-32-NEXT: br i1 [[TMP9]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-32: .omp.final.then: // CHECK-32-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-32-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-32: .omp.final.done: // CHECK-32-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4]], i32 [[TMP1]]) // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l239 // CHECK-32-SAME: () #[[ATTR8]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32: user_code.entry: // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-NEXT: [[TMP2:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*)* @__omp_outlined__91 to i8*), i8* null, i8** [[TMP2]], i32 0) // CHECK-32-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-NEXT: ret void // CHECK-32: worker.exit: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@__omp_outlined__91 // CHECK-32-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1073741860, i32 0, i32 9, i32 1, i32 1) // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-32: omp.dispatch.cond: // CHECK-32-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-32-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0 // CHECK-32-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-32: omp.dispatch.body: // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP3]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32: omp.inner.for.cond: // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP309:![0-9]+]] // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP309]] // CHECK-32-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]] // CHECK-32-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32: omp.inner.for.body: // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP309]] // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP309]] // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32: omp.body.continue: // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32: omp.inner.for.inc: // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP309]] // CHECK-32-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP7]], 1 // CHECK-32-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP309]] // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP310:![0-9]+]] // CHECK-32: omp.inner.for.end: // CHECK-32-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-32: omp.dispatch.inc: // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-32: omp.dispatch.end: // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[TMP9:%.*]] = icmp ne i32 [[TMP8]], 0 // CHECK-32-NEXT: br i1 [[TMP9]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-32: .omp.final.then: // CHECK-32-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-32-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-32: .omp.final.done: // CHECK-32-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4]], i32 [[TMP1]]) // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l244 // CHECK-32-SAME: () #[[ATTR8]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32: user_code.entry: // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-NEXT: [[TMP2:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*)* @__omp_outlined__92 to i8*), i8* null, i8** [[TMP2]], i32 0) // CHECK-32-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-NEXT: ret void // CHECK-32: worker.exit: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@__omp_outlined__92 // CHECK-32-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-32: omp.dispatch.cond: // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-32-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-32: cond.true: // CHECK-32-NEXT: br label [[COND_END:%.*]] // CHECK-32: cond.false: // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: br label [[COND_END]] // CHECK-32: cond.end: // CHECK-32-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-32-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] // CHECK-32-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-32: omp.dispatch.body: // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32: omp.inner.for.cond: // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] // CHECK-32-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32: omp.inner.for.body: // CHECK-32-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-NEXT: store i32 [[ADD]], i32* [[I]], align 4 // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32: omp.body.continue: // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32: omp.inner.for.inc: // CHECK-32-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 // CHECK-32-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK-32: omp.inner.for.end: // CHECK-32-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-32: omp.dispatch.inc: // CHECK-32-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] // CHECK-32-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] // CHECK-32-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-32: omp.dispatch.end: // CHECK-32-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l248 // CHECK-32-SAME: () #[[ATTR8]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32: user_code.entry: // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-NEXT: [[TMP2:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*)* @__omp_outlined__93 to i8*), i8* null, i8** [[TMP2]], i32 0) // CHECK-32-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-NEXT: ret void // CHECK-32: worker.exit: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@__omp_outlined__93 // CHECK-32-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-32-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-32: cond.true: // CHECK-32-NEXT: br label [[COND_END:%.*]] // CHECK-32: cond.false: // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: br label [[COND_END]] // CHECK-32: cond.end: // CHECK-32-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-32-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32: omp.inner.for.cond: // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] // CHECK-32-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32: omp.inner.for.body: // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-NEXT: store i32 [[ADD]], i32* [[I]], align 4 // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32: omp.body.continue: // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32: omp.inner.for.inc: // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 1 // CHECK-32-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK-32: omp.inner.for.end: // CHECK-32-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-32: omp.loop.exit: // CHECK-32-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l252 // CHECK-32-SAME: () #[[ATTR8]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32: user_code.entry: // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-NEXT: [[TMP2:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*)* @__omp_outlined__94 to i8*), i8* null, i8** [[TMP2]], i32 0) // CHECK-32-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-NEXT: ret void // CHECK-32: worker.exit: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@__omp_outlined__94 // CHECK-32-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-32: omp.dispatch.cond: // CHECK-32-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-32-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-32: cond.true: // CHECK-32-NEXT: br label [[COND_END:%.*]] // CHECK-32: cond.false: // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: br label [[COND_END]] // CHECK-32: cond.end: // CHECK-32-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-32-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] // CHECK-32-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-32: omp.dispatch.body: // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32: omp.inner.for.cond: // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] // CHECK-32-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32: omp.inner.for.body: // CHECK-32-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-NEXT: store i32 [[ADD]], i32* [[I]], align 4 // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32: omp.body.continue: // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32: omp.inner.for.inc: // CHECK-32-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 // CHECK-32-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK-32: omp.inner.for.end: // CHECK-32-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-32: omp.dispatch.inc: // CHECK-32-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] // CHECK-32-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] // CHECK-32-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-32: omp.dispatch.end: // CHECK-32-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l256 // CHECK-32-SAME: () #[[ATTR8]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32: user_code.entry: // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-NEXT: [[TMP2:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*)* @__omp_outlined__95 to i8*), i8* null, i8** [[TMP2]], i32 0) // CHECK-32-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-NEXT: ret void // CHECK-32: worker.exit: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@__omp_outlined__95 // CHECK-32-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1073741862, i32 0, i32 9, i32 1, i32 1) // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-32: omp.dispatch.cond: // CHECK-32-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-32-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0 // CHECK-32-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-32: omp.dispatch.body: // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP3]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32: omp.inner.for.cond: // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP312:![0-9]+]] // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP312]] // CHECK-32-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]] // CHECK-32-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32: omp.inner.for.body: // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP312]] // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP312]] // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32: omp.body.continue: // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32: omp.inner.for.inc: // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP312]] // CHECK-32-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP7]], 1 // CHECK-32-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP312]] // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP313:![0-9]+]] // CHECK-32: omp.inner.for.end: // CHECK-32-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-32: omp.dispatch.inc: // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-32: omp.dispatch.end: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l260 // CHECK-32-SAME: () #[[ATTR8]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32: user_code.entry: // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-NEXT: [[TMP2:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*)* @__omp_outlined__96 to i8*), i8* null, i8** [[TMP2]], i32 0) // CHECK-32-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-NEXT: ret void // CHECK-32: worker.exit: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@__omp_outlined__96 // CHECK-32-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1073741861, i32 0, i32 9, i32 1, i32 1) // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-32: omp.dispatch.cond: // CHECK-32-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-32-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0 // CHECK-32-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-32: omp.dispatch.body: // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP3]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32: omp.inner.for.cond: // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP315:![0-9]+]] // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP315]] // CHECK-32-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]] // CHECK-32-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32: omp.inner.for.body: // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP315]] // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP315]] // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32: omp.body.continue: // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32: omp.inner.for.inc: // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP315]] // CHECK-32-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP7]], 1 // CHECK-32-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP315]] // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP316:![0-9]+]] // CHECK-32: omp.inner.for.end: // CHECK-32-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-32: omp.dispatch.inc: // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-32: omp.dispatch.end: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l264 // CHECK-32-SAME: () #[[ATTR8]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32: user_code.entry: // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-NEXT: [[TMP2:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*)* @__omp_outlined__97 to i8*), i8* null, i8** [[TMP2]], i32 0) // CHECK-32-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-NEXT: ret void // CHECK-32: worker.exit: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@__omp_outlined__97 // CHECK-32-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1073741859, i32 0, i32 9, i32 1, i32 1) // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-32: omp.dispatch.cond: // CHECK-32-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-32-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0 // CHECK-32-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-32: omp.dispatch.body: // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP3]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32: omp.inner.for.cond: // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP318:![0-9]+]] // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP318]] // CHECK-32-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]] // CHECK-32-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32: omp.inner.for.body: // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP318]] // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP318]] // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32: omp.body.continue: // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32: omp.inner.for.inc: // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP318]] // CHECK-32-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP7]], 1 // CHECK-32-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP318]] // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP319:![0-9]+]] // CHECK-32: omp.inner.for.end: // CHECK-32-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-32: omp.dispatch.inc: // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-32: omp.dispatch.end: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l268 // CHECK-32-SAME: () #[[ATTR8]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32: user_code.entry: // CHECK-32-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-NEXT: [[TMP2:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*)* @__omp_outlined__98 to i8*), i8* null, i8** [[TMP2]], i32 0) // CHECK-32-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-NEXT: ret void // CHECK-32: worker.exit: // CHECK-32-NEXT: ret void // // // CHECK-32-LABEL: define {{[^@]+}}@__omp_outlined__98 // CHECK-32-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-NEXT: entry: // CHECK-32-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1073741860, i32 0, i32 9, i32 1, i32 1) // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-32: omp.dispatch.cond: // CHECK-32-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-32-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0 // CHECK-32-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-32: omp.dispatch.body: // CHECK-32-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-NEXT: store i32 [[TMP3]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32: omp.inner.for.cond: // CHECK-32-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP321:![0-9]+]] // CHECK-32-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP321]] // CHECK-32-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]] // CHECK-32-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32: omp.inner.for.body: // CHECK-32-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP321]] // CHECK-32-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1 // CHECK-32-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP321]] // CHECK-32-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32: omp.body.continue: // CHECK-32-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32: omp.inner.for.inc: // CHECK-32-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP321]] // CHECK-32-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP7]], 1 // CHECK-32-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP321]] // CHECK-32-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP322:![0-9]+]] // CHECK-32: omp.inner.for.end: // CHECK-32-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-32: omp.dispatch.inc: // CHECK-32-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-32: omp.dispatch.end: // CHECK-32-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l15 // CHECK-32-EX-SAME: (i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR0:[0-9]+]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 // CHECK-32-EX-NEXT: [[CONV:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR__ADDR]] to i8* // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1:[0-9]+]], i8 2, i1 false) // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32-EX: user_code.entry: // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i8, i8* [[CONV]], align 1 // CHECK-32-EX-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP2]] to i1 // CHECK-32-EX-NEXT: [[CONV1:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR__CASTED]] to i8* // CHECK-32-EX-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8 // CHECK-32-EX-NEXT: store i8 [[FROMBOOL]], i8* [[CONV1]], align 1 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4 // CHECK-32-EX-NEXT: call void @__omp_outlined__(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i32 [[TMP3]]) #[[ATTR2:[0-9]+]] // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-EX-NEXT: ret void // CHECK-32-EX: worker.exit: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@__omp_outlined__ // CHECK-32-EX-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1:[0-9]+]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [3 x i8*], align 4 // CHECK-32-EX-NEXT: [[DOTCAPTURE_EXPR__CASTED16:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS19:%.*]] = alloca [3 x i8*], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 // CHECK-32-EX-NEXT: [[CONV:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR__ADDR]] to i8* // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block() // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP1]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-32-EX: cond.true: // CHECK-32-EX-NEXT: br label [[COND_END:%.*]] // CHECK-32-EX: cond.false: // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: br label [[COND_END]] // CHECK-32-EX: cond.end: // CHECK-32-EX-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-32-EX-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i8, i8* [[CONV]], align 1 // CHECK-32-EX-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP5]] to i1 // CHECK-32-EX-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] // CHECK-32-EX: omp_if.then: // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32-EX: omp.inner.for.cond: // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP130:![0-9]+]] // CHECK-32-EX-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP6]], 10 // CHECK-32-EX-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32-EX: omp.inner.for.body: // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP130]] // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP130]] // CHECK-32-EX-NEXT: [[TMP9:%.*]] = load i8, i8* [[CONV]], align 1, !llvm.access.group [[ACC_GRP130]] // CHECK-32-EX-NEXT: [[TOBOOL2:%.*]] = trunc i8 [[TMP9]] to i1 // CHECK-32-EX-NEXT: [[CONV3:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR__CASTED]] to i8* // CHECK-32-EX-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL2]] to i8 // CHECK-32-EX-NEXT: store i8 [[FROMBOOL]], i8* [[CONV3]], align 1, !llvm.access.group [[ACC_GRP130]] // CHECK-32-EX-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4, !llvm.access.group [[ACC_GRP130]] // CHECK-32-EX-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0 // CHECK-32-EX-NEXT: [[TMP12:%.*]] = inttoptr i32 [[TMP7]] to i8* // CHECK-32-EX-NEXT: store i8* [[TMP12]], i8** [[TMP11]], align 4, !llvm.access.group [[ACC_GRP130]] // CHECK-32-EX-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1 // CHECK-32-EX-NEXT: [[TMP14:%.*]] = inttoptr i32 [[TMP8]] to i8* // CHECK-32-EX-NEXT: store i8* [[TMP14]], i8** [[TMP13]], align 4, !llvm.access.group [[ACC_GRP130]] // CHECK-32-EX-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2 // CHECK-32-EX-NEXT: [[TMP16:%.*]] = inttoptr i32 [[TMP10]] to i8* // CHECK-32-EX-NEXT: store i8* [[TMP16]], i8** [[TMP15]], align 4, !llvm.access.group [[ACC_GRP130]] // CHECK-32-EX-NEXT: [[TMP17:%.*]] = load i8, i8* [[CONV]], align 1, !llvm.access.group [[ACC_GRP130]] // CHECK-32-EX-NEXT: [[TOBOOL4:%.*]] = trunc i8 [[TMP17]] to i1 // CHECK-32-EX-NEXT: [[TMP18:%.*]] = zext i1 [[TOBOOL4]] to i32 // CHECK-32-EX-NEXT: [[TMP19:%.*]] = bitcast [3 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 [[TMP18]], i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, i32)* @__omp_outlined__1 to i8*), i8* null, i8** [[TMP19]], i32 3), !llvm.access.group [[ACC_GRP130]] // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32-EX: omp.inner.for.inc: // CHECK-32-EX-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP130]] // CHECK-32-EX-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP130]] // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] // CHECK-32-EX-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP130]] // CHECK-32-EX-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP130]] // CHECK-32-EX-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP130]] // CHECK-32-EX-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP22]], [[TMP23]] // CHECK-32-EX-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP130]] // CHECK-32-EX-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP130]] // CHECK-32-EX-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP130]] // CHECK-32-EX-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP24]], [[TMP25]] // CHECK-32-EX-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP130]] // CHECK-32-EX-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP130]] // CHECK-32-EX-NEXT: [[CMP7:%.*]] = icmp sgt i32 [[TMP26]], 9 // CHECK-32-EX-NEXT: br i1 [[CMP7]], label [[COND_TRUE8:%.*]], label [[COND_FALSE9:%.*]] // CHECK-32-EX: cond.true8: // CHECK-32-EX-NEXT: br label [[COND_END10:%.*]] // CHECK-32-EX: cond.false9: // CHECK-32-EX-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP130]] // CHECK-32-EX-NEXT: br label [[COND_END10]] // CHECK-32-EX: cond.end10: // CHECK-32-EX-NEXT: [[COND11:%.*]] = phi i32 [ 9, [[COND_TRUE8]] ], [ [[TMP27]], [[COND_FALSE9]] ] // CHECK-32-EX-NEXT: store i32 [[COND11]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP130]] // CHECK-32-EX-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP130]] // CHECK-32-EX-NEXT: store i32 [[TMP28]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP130]] // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP131:![0-9]+]] // CHECK-32-EX: omp.inner.for.end: // CHECK-32-EX-NEXT: br label [[OMP_IF_END:%.*]] // CHECK-32-EX: omp_if.else: // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND12:%.*]] // CHECK-32-EX: omp.inner.for.cond12: // CHECK-32-EX-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[CMP13:%.*]] = icmp slt i32 [[TMP29]], 10 // CHECK-32-EX-NEXT: br i1 [[CMP13]], label [[OMP_INNER_FOR_BODY14:%.*]], label [[OMP_INNER_FOR_END30:%.*]] // CHECK-32-EX: omp.inner.for.body14: // CHECK-32-EX-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP32:%.*]] = load i8, i8* [[CONV]], align 1 // CHECK-32-EX-NEXT: [[TOBOOL15:%.*]] = trunc i8 [[TMP32]] to i1 // CHECK-32-EX-NEXT: [[CONV17:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR__CASTED16]] to i8* // CHECK-32-EX-NEXT: [[FROMBOOL18:%.*]] = zext i1 [[TOBOOL15]] to i8 // CHECK-32-EX-NEXT: store i8 [[FROMBOOL18]], i8* [[CONV17]], align 1 // CHECK-32-EX-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED16]], align 4 // CHECK-32-EX-NEXT: [[TMP34:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS19]], i32 0, i32 0 // CHECK-32-EX-NEXT: [[TMP35:%.*]] = inttoptr i32 [[TMP30]] to i8* // CHECK-32-EX-NEXT: store i8* [[TMP35]], i8** [[TMP34]], align 4 // CHECK-32-EX-NEXT: [[TMP36:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS19]], i32 0, i32 1 // CHECK-32-EX-NEXT: [[TMP37:%.*]] = inttoptr i32 [[TMP31]] to i8* // CHECK-32-EX-NEXT: store i8* [[TMP37]], i8** [[TMP36]], align 4 // CHECK-32-EX-NEXT: [[TMP38:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS19]], i32 0, i32 2 // CHECK-32-EX-NEXT: [[TMP39:%.*]] = inttoptr i32 [[TMP33]] to i8* // CHECK-32-EX-NEXT: store i8* [[TMP39]], i8** [[TMP38]], align 4 // CHECK-32-EX-NEXT: [[TMP40:%.*]] = load i8, i8* [[CONV]], align 1 // CHECK-32-EX-NEXT: [[TOBOOL20:%.*]] = trunc i8 [[TMP40]] to i1 // CHECK-32-EX-NEXT: [[TMP41:%.*]] = zext i1 [[TOBOOL20]] to i32 // CHECK-32-EX-NEXT: [[TMP42:%.*]] = bitcast [3 x i8*]* [[CAPTURED_VARS_ADDRS19]] to i8** // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 [[TMP41]], i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, i32)* @__omp_outlined__2 to i8*), i8* null, i8** [[TMP42]], i32 3) // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC21:%.*]] // CHECK-32-EX: omp.inner.for.inc21: // CHECK-32-EX-NEXT: [[TMP43:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[TMP44:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: [[ADD22:%.*]] = add nsw i32 [[TMP43]], [[TMP44]] // CHECK-32-EX-NEXT: store i32 [[ADD22]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[TMP45:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: [[TMP46:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: [[ADD23:%.*]] = add nsw i32 [[TMP45]], [[TMP46]] // CHECK-32-EX-NEXT: store i32 [[ADD23]], i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: [[TMP47:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP48:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: [[ADD24:%.*]] = add nsw i32 [[TMP47]], [[TMP48]] // CHECK-32-EX-NEXT: store i32 [[ADD24]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP49:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[CMP25:%.*]] = icmp sgt i32 [[TMP49]], 9 // CHECK-32-EX-NEXT: br i1 [[CMP25]], label [[COND_TRUE26:%.*]], label [[COND_FALSE27:%.*]] // CHECK-32-EX: cond.true26: // CHECK-32-EX-NEXT: br label [[COND_END28:%.*]] // CHECK-32-EX: cond.false27: // CHECK-32-EX-NEXT: [[TMP50:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: br label [[COND_END28]] // CHECK-32-EX: cond.end28: // CHECK-32-EX-NEXT: [[COND29:%.*]] = phi i32 [ 9, [[COND_TRUE26]] ], [ [[TMP50]], [[COND_FALSE27]] ] // CHECK-32-EX-NEXT: store i32 [[COND29]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP51:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP51]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND12]], !llvm.loop [[LOOP134:![0-9]+]] // CHECK-32-EX: omp.inner.for.end30: // CHECK-32-EX-NEXT: br label [[OMP_IF_END]] // CHECK-32-EX: omp_if.end: // CHECK-32-EX-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-32-EX: omp.loop.exit: // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) // CHECK-32-EX-NEXT: [[TMP52:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[TMP53:%.*]] = icmp ne i32 [[TMP52]], 0 // CHECK-32-EX-NEXT: br i1 [[TMP53]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-32-EX: .omp.final.then: // CHECK-32-EX-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-32-EX-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-32-EX: .omp.final.done: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@__omp_outlined__1 // CHECK-32-EX-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 // CHECK-32-EX-NEXT: [[CONV:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR__ADDR]] to i8* // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i8, i8* [[CONV]], align 1 // CHECK-32-EX-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP2]] to i1 // CHECK-32-EX-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] // CHECK-32-EX: omp_if.then: // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 // CHECK-32-EX-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32-EX: omp.inner.for.cond: // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP136:![0-9]+]] // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4, !llvm.access.group [[ACC_GRP136]] // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp ule i32 [[TMP6]], [[TMP7]] // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32-EX: omp.inner.for.body: // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP136]] // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-EX-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP136]] // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32-EX: omp.body.continue: // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32-EX: omp.inner.for.inc: // CHECK-32-EX-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP136]] // CHECK-32-EX-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP136]] // CHECK-32-EX-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP9]], [[TMP10]] // CHECK-32-EX-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP136]] // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP137:![0-9]+]] // CHECK-32-EX: omp.inner.for.end: // CHECK-32-EX-NEXT: br label [[OMP_IF_END:%.*]] // CHECK-32-EX: omp_if.else: // CHECK-32-EX-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 // CHECK-32-EX-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP12]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) // CHECK-32-EX-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND2:%.*]] // CHECK-32-EX: omp.inner.for.cond2: // CHECK-32-EX-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-EX-NEXT: [[CMP3:%.*]] = icmp ule i32 [[TMP14]], [[TMP15]] // CHECK-32-EX-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY4:%.*]], label [[OMP_INNER_FOR_END10:%.*]] // CHECK-32-EX: omp.inner.for.body4: // CHECK-32-EX-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[MUL5:%.*]] = mul nsw i32 [[TMP16]], 1 // CHECK-32-EX-NEXT: [[ADD6:%.*]] = add nsw i32 0, [[MUL5]] // CHECK-32-EX-NEXT: store i32 [[ADD6]], i32* [[I]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE7:%.*]] // CHECK-32-EX: omp.body.continue7: // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC8:%.*]] // CHECK-32-EX: omp.inner.for.inc8: // CHECK-32-EX-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] // CHECK-32-EX-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND2]], !llvm.loop [[LOOP139:![0-9]+]] // CHECK-32-EX: omp.inner.for.end10: // CHECK-32-EX-NEXT: br label [[OMP_IF_END]] // CHECK-32-EX: omp_if.end: // CHECK-32-EX-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-32-EX: omp.loop.exit: // CHECK-32-EX-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4 // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP20]]) // CHECK-32-EX-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0 // CHECK-32-EX-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-32-EX: .omp.final.then: // CHECK-32-EX-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-32-EX-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-32-EX: .omp.final.done: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@__omp_outlined__2 // CHECK-32-EX-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 // CHECK-32-EX-NEXT: [[CONV:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR__ADDR]] to i8* // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i8, i8* [[CONV]], align 1 // CHECK-32-EX-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP2]] to i1 // CHECK-32-EX-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]] // CHECK-32-EX: omp_if.then: // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 // CHECK-32-EX-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32-EX: omp.inner.for.cond: // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP140:![0-9]+]] // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4, !llvm.access.group [[ACC_GRP140]] // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp ule i32 [[TMP6]], [[TMP7]] // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32-EX: omp.inner.for.body: // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP140]] // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-EX-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP140]] // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32-EX: omp.body.continue: // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32-EX: omp.inner.for.inc: // CHECK-32-EX-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP140]] // CHECK-32-EX-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP140]] // CHECK-32-EX-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP9]], [[TMP10]] // CHECK-32-EX-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP140]] // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP141:![0-9]+]] // CHECK-32-EX: omp.inner.for.end: // CHECK-32-EX-NEXT: br label [[OMP_IF_END:%.*]] // CHECK-32-EX: omp_if.else: // CHECK-32-EX-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 // CHECK-32-EX-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP12]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) // CHECK-32-EX-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND2:%.*]] // CHECK-32-EX: omp.inner.for.cond2: // CHECK-32-EX-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-EX-NEXT: [[CMP3:%.*]] = icmp ule i32 [[TMP14]], [[TMP15]] // CHECK-32-EX-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY4:%.*]], label [[OMP_INNER_FOR_END10:%.*]] // CHECK-32-EX: omp.inner.for.body4: // CHECK-32-EX-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[MUL5:%.*]] = mul nsw i32 [[TMP16]], 1 // CHECK-32-EX-NEXT: [[ADD6:%.*]] = add nsw i32 0, [[MUL5]] // CHECK-32-EX-NEXT: store i32 [[ADD6]], i32* [[I]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE7:%.*]] // CHECK-32-EX: omp.body.continue7: // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC8:%.*]] // CHECK-32-EX: omp.inner.for.inc8: // CHECK-32-EX-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] // CHECK-32-EX-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND2]], !llvm.loop [[LOOP143:![0-9]+]] // CHECK-32-EX: omp.inner.for.end10: // CHECK-32-EX-NEXT: br label [[OMP_IF_END]] // CHECK-32-EX: omp_if.end: // CHECK-32-EX-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-32-EX: omp.loop.exit: // CHECK-32-EX-NEXT: [[TMP19:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP19]], align 4 // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP20]]) // CHECK-32-EX-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0 // CHECK-32-EX-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-32-EX: .omp.final.then: // CHECK-32-EX-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-32-EX-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-32-EX: .omp.final.done: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l18 // CHECK-32-EX-SAME: () #[[ATTR0]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32-EX: user_code.entry: // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4 // CHECK-32-EX-NEXT: call void @__omp_outlined__3(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR2]] // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-EX-NEXT: ret void // CHECK-32-EX: worker.exit: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@__omp_outlined__3 // CHECK-32-EX-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x i8*], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block() // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-32-EX: cond.true: // CHECK-32-EX-NEXT: br label [[COND_END:%.*]] // CHECK-32-EX: cond.false: // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: br label [[COND_END]] // CHECK-32-EX: cond.end: // CHECK-32-EX-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-32-EX-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32-EX: omp.inner.for.cond: // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP144:![0-9]+]] // CHECK-32-EX-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10 // CHECK-32-EX-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32-EX: omp.inner.for.body: // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP144]] // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP144]] // CHECK-32-EX-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to i8* // CHECK-32-EX-NEXT: store i8* [[TMP9]], i8** [[TMP8]], align 4, !llvm.access.group [[ACC_GRP144]] // CHECK-32-EX-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1 // CHECK-32-EX-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to i8* // CHECK-32-EX-NEXT: store i8* [[TMP11]], i8** [[TMP10]], align 4, !llvm.access.group [[ACC_GRP144]] // CHECK-32-EX-NEXT: [[TMP12:%.*]] = bitcast [2 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32)* @__omp_outlined__4 to i8*), i8* null, i8** [[TMP12]], i32 2), !llvm.access.group [[ACC_GRP144]] // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32-EX: omp.inner.for.inc: // CHECK-32-EX-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP144]] // CHECK-32-EX-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP144]] // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] // CHECK-32-EX-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP144]] // CHECK-32-EX-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP144]] // CHECK-32-EX-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP144]] // CHECK-32-EX-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] // CHECK-32-EX-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP144]] // CHECK-32-EX-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP144]] // CHECK-32-EX-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP144]] // CHECK-32-EX-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] // CHECK-32-EX-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP144]] // CHECK-32-EX-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP144]] // CHECK-32-EX-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP19]], 9 // CHECK-32-EX-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]] // CHECK-32-EX: cond.true5: // CHECK-32-EX-NEXT: br label [[COND_END7:%.*]] // CHECK-32-EX: cond.false6: // CHECK-32-EX-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP144]] // CHECK-32-EX-NEXT: br label [[COND_END7]] // CHECK-32-EX: cond.end7: // CHECK-32-EX-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP20]], [[COND_FALSE6]] ] // CHECK-32-EX-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP144]] // CHECK-32-EX-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP144]] // CHECK-32-EX-NEXT: store i32 [[TMP21]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP144]] // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP145:![0-9]+]] // CHECK-32-EX: omp.inner.for.end: // CHECK-32-EX-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-32-EX: omp.loop.exit: // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) // CHECK-32-EX-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 // CHECK-32-EX-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-32-EX: .omp.final.then: // CHECK-32-EX-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-32-EX-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-32-EX: .omp.final.done: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@__omp_outlined__4 // CHECK-32-EX-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 // CHECK-32-EX-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 9 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-32-EX: cond.true: // CHECK-32-EX-NEXT: br label [[COND_END:%.*]] // CHECK-32-EX: cond.false: // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: br label [[COND_END]] // CHECK-32-EX: cond.end: // CHECK-32-EX-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] // CHECK-32-EX-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32-EX: omp.inner.for.cond: // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP147:![0-9]+]] // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP147]] // CHECK-32-EX-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] // CHECK-32-EX-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32-EX: omp.inner.for.body: // CHECK-32-EX-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP147]] // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-EX-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP147]] // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32-EX: omp.body.continue: // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32-EX: omp.inner.for.inc: // CHECK-32-EX-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP147]] // CHECK-32-EX-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 // CHECK-32-EX-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP147]] // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP148:![0-9]+]] // CHECK-32-EX: omp.inner.for.end: // CHECK-32-EX-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-32-EX: omp.loop.exit: // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]]) // CHECK-32-EX-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0 // CHECK-32-EX-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-32-EX: .omp.final.then: // CHECK-32-EX-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-32-EX-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-32-EX: .omp.final.done: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l21 // CHECK-32-EX-SAME: () #[[ATTR0]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32-EX: user_code.entry: // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4 // CHECK-32-EX-NEXT: call void @__omp_outlined__5(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR2]] // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-EX-NEXT: ret void // CHECK-32-EX: worker.exit: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@__omp_outlined__5 // CHECK-32-EX-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x i8*], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block() // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-32-EX: cond.true: // CHECK-32-EX-NEXT: br label [[COND_END:%.*]] // CHECK-32-EX: cond.false: // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: br label [[COND_END]] // CHECK-32-EX: cond.end: // CHECK-32-EX-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-32-EX-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32-EX: omp.inner.for.cond: // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP150:![0-9]+]] // CHECK-32-EX-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10 // CHECK-32-EX-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32-EX: omp.inner.for.body: // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP150]] // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP150]] // CHECK-32-EX-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to i8* // CHECK-32-EX-NEXT: store i8* [[TMP9]], i8** [[TMP8]], align 4, !llvm.access.group [[ACC_GRP150]] // CHECK-32-EX-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1 // CHECK-32-EX-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to i8* // CHECK-32-EX-NEXT: store i8* [[TMP11]], i8** [[TMP10]], align 4, !llvm.access.group [[ACC_GRP150]] // CHECK-32-EX-NEXT: [[TMP12:%.*]] = bitcast [2 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32)* @__omp_outlined__6 to i8*), i8* null, i8** [[TMP12]], i32 2), !llvm.access.group [[ACC_GRP150]] // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32-EX: omp.inner.for.inc: // CHECK-32-EX-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP150]] // CHECK-32-EX-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP150]] // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] // CHECK-32-EX-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP150]] // CHECK-32-EX-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP150]] // CHECK-32-EX-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP150]] // CHECK-32-EX-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] // CHECK-32-EX-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP150]] // CHECK-32-EX-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP150]] // CHECK-32-EX-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP150]] // CHECK-32-EX-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] // CHECK-32-EX-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP150]] // CHECK-32-EX-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP150]] // CHECK-32-EX-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP19]], 9 // CHECK-32-EX-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]] // CHECK-32-EX: cond.true5: // CHECK-32-EX-NEXT: br label [[COND_END7:%.*]] // CHECK-32-EX: cond.false6: // CHECK-32-EX-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP150]] // CHECK-32-EX-NEXT: br label [[COND_END7]] // CHECK-32-EX: cond.end7: // CHECK-32-EX-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP20]], [[COND_FALSE6]] ] // CHECK-32-EX-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP150]] // CHECK-32-EX-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP150]] // CHECK-32-EX-NEXT: store i32 [[TMP21]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP150]] // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP151:![0-9]+]] // CHECK-32-EX: omp.inner.for.end: // CHECK-32-EX-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-32-EX: omp.loop.exit: // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) // CHECK-32-EX-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 // CHECK-32-EX-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-32-EX: .omp.final.then: // CHECK-32-EX-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-32-EX-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-32-EX: .omp.final.done: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@__omp_outlined__6 // CHECK-32-EX-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 // CHECK-32-EX-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP3]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32-EX: omp.inner.for.cond: // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP153:![0-9]+]] // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4, !llvm.access.group [[ACC_GRP153]] // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp ule i32 [[TMP5]], [[TMP6]] // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32-EX: omp.inner.for.body: // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP153]] // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-EX-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP153]] // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32-EX: omp.body.continue: // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32-EX: omp.inner.for.inc: // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP153]] // CHECK-32-EX-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP153]] // CHECK-32-EX-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP8]], [[TMP9]] // CHECK-32-EX-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP153]] // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP154:![0-9]+]] // CHECK-32-EX: omp.inner.for.end: // CHECK-32-EX-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-32-EX: omp.loop.exit: // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]]) // CHECK-32-EX-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[TMP11:%.*]] = icmp ne i32 [[TMP10]], 0 // CHECK-32-EX-NEXT: br i1 [[TMP11]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-32-EX: .omp.final.then: // CHECK-32-EX-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-32-EX-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-32-EX: .omp.final.done: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l24 // CHECK-32-EX-SAME: () #[[ATTR0]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32-EX: user_code.entry: // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4 // CHECK-32-EX-NEXT: call void @__omp_outlined__7(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR2]] // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-EX-NEXT: ret void // CHECK-32-EX: worker.exit: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@__omp_outlined__7 // CHECK-32-EX-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x i8*], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block() // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-32-EX: cond.true: // CHECK-32-EX-NEXT: br label [[COND_END:%.*]] // CHECK-32-EX: cond.false: // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: br label [[COND_END]] // CHECK-32-EX: cond.end: // CHECK-32-EX-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-32-EX-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32-EX: omp.inner.for.cond: // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP156:![0-9]+]] // CHECK-32-EX-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10 // CHECK-32-EX-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32-EX: omp.inner.for.body: // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP156]] // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP156]] // CHECK-32-EX-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to i8* // CHECK-32-EX-NEXT: store i8* [[TMP9]], i8** [[TMP8]], align 4, !llvm.access.group [[ACC_GRP156]] // CHECK-32-EX-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1 // CHECK-32-EX-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to i8* // CHECK-32-EX-NEXT: store i8* [[TMP11]], i8** [[TMP10]], align 4, !llvm.access.group [[ACC_GRP156]] // CHECK-32-EX-NEXT: [[TMP12:%.*]] = bitcast [2 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32)* @__omp_outlined__8 to i8*), i8* null, i8** [[TMP12]], i32 2), !llvm.access.group [[ACC_GRP156]] // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32-EX: omp.inner.for.inc: // CHECK-32-EX-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP156]] // CHECK-32-EX-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP156]] // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] // CHECK-32-EX-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP156]] // CHECK-32-EX-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP156]] // CHECK-32-EX-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP156]] // CHECK-32-EX-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] // CHECK-32-EX-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP156]] // CHECK-32-EX-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP156]] // CHECK-32-EX-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP156]] // CHECK-32-EX-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] // CHECK-32-EX-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP156]] // CHECK-32-EX-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP156]] // CHECK-32-EX-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP19]], 9 // CHECK-32-EX-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]] // CHECK-32-EX: cond.true5: // CHECK-32-EX-NEXT: br label [[COND_END7:%.*]] // CHECK-32-EX: cond.false6: // CHECK-32-EX-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP156]] // CHECK-32-EX-NEXT: br label [[COND_END7]] // CHECK-32-EX: cond.end7: // CHECK-32-EX-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP20]], [[COND_FALSE6]] ] // CHECK-32-EX-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP156]] // CHECK-32-EX-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP156]] // CHECK-32-EX-NEXT: store i32 [[TMP21]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP156]] // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP157:![0-9]+]] // CHECK-32-EX: omp.inner.for.end: // CHECK-32-EX-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-32-EX: omp.loop.exit: // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) // CHECK-32-EX-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 // CHECK-32-EX-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-32-EX: .omp.final.then: // CHECK-32-EX-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-32-EX-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-32-EX: .omp.final.done: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@__omp_outlined__8 // CHECK-32-EX-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 1073741862, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1) // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-32-EX: omp.dispatch.cond: // CHECK-32-EX-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-32-EX-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0 // CHECK-32-EX-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-32-EX: omp.dispatch.body: // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32-EX: omp.inner.for.cond: // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP159:![0-9]+]] // CHECK-32-EX-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP159]] // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32-EX: omp.inner.for.body: // CHECK-32-EX-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP159]] // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-EX-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP159]] // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32-EX: omp.body.continue: // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32-EX: omp.inner.for.inc: // CHECK-32-EX-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP159]] // CHECK-32-EX-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP11]], 1 // CHECK-32-EX-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP159]] // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP160:![0-9]+]] // CHECK-32-EX: omp.inner.for.end: // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-32-EX: omp.dispatch.inc: // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-32-EX: omp.dispatch.end: // CHECK-32-EX-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0 // CHECK-32-EX-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-32-EX: .omp.final.then: // CHECK-32-EX-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-32-EX-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-32-EX: .omp.final.done: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l27 // CHECK-32-EX-SAME: () #[[ATTR0]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32-EX: user_code.entry: // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4 // CHECK-32-EX-NEXT: call void @__omp_outlined__9(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR2]] // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-EX-NEXT: ret void // CHECK-32-EX: worker.exit: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@__omp_outlined__9 // CHECK-32-EX-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x i8*], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block() // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-32-EX: cond.true: // CHECK-32-EX-NEXT: br label [[COND_END:%.*]] // CHECK-32-EX: cond.false: // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: br label [[COND_END]] // CHECK-32-EX: cond.end: // CHECK-32-EX-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-32-EX-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32-EX: omp.inner.for.cond: // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP162:![0-9]+]] // CHECK-32-EX-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10 // CHECK-32-EX-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32-EX: omp.inner.for.body: // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP162]] // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP162]] // CHECK-32-EX-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to i8* // CHECK-32-EX-NEXT: store i8* [[TMP9]], i8** [[TMP8]], align 4, !llvm.access.group [[ACC_GRP162]] // CHECK-32-EX-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1 // CHECK-32-EX-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to i8* // CHECK-32-EX-NEXT: store i8* [[TMP11]], i8** [[TMP10]], align 4, !llvm.access.group [[ACC_GRP162]] // CHECK-32-EX-NEXT: [[TMP12:%.*]] = bitcast [2 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32)* @__omp_outlined__10 to i8*), i8* null, i8** [[TMP12]], i32 2), !llvm.access.group [[ACC_GRP162]] // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32-EX: omp.inner.for.inc: // CHECK-32-EX-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP162]] // CHECK-32-EX-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP162]] // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] // CHECK-32-EX-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP162]] // CHECK-32-EX-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP162]] // CHECK-32-EX-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP162]] // CHECK-32-EX-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] // CHECK-32-EX-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP162]] // CHECK-32-EX-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP162]] // CHECK-32-EX-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP162]] // CHECK-32-EX-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] // CHECK-32-EX-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP162]] // CHECK-32-EX-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP162]] // CHECK-32-EX-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP19]], 9 // CHECK-32-EX-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]] // CHECK-32-EX: cond.true5: // CHECK-32-EX-NEXT: br label [[COND_END7:%.*]] // CHECK-32-EX: cond.false6: // CHECK-32-EX-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP162]] // CHECK-32-EX-NEXT: br label [[COND_END7]] // CHECK-32-EX: cond.end7: // CHECK-32-EX-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP20]], [[COND_FALSE6]] ] // CHECK-32-EX-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP162]] // CHECK-32-EX-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP162]] // CHECK-32-EX-NEXT: store i32 [[TMP21]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP162]] // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP163:![0-9]+]] // CHECK-32-EX: omp.inner.for.end: // CHECK-32-EX-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-32-EX: omp.loop.exit: // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) // CHECK-32-EX-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 // CHECK-32-EX-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-32-EX: .omp.final.then: // CHECK-32-EX-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-32-EX-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-32-EX: .omp.final.done: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@__omp_outlined__10 // CHECK-32-EX-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 1073741861, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1) // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-32-EX: omp.dispatch.cond: // CHECK-32-EX-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-32-EX-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0 // CHECK-32-EX-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-32-EX: omp.dispatch.body: // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32-EX: omp.inner.for.cond: // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP165:![0-9]+]] // CHECK-32-EX-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP165]] // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32-EX: omp.inner.for.body: // CHECK-32-EX-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP165]] // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-EX-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP165]] // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32-EX: omp.body.continue: // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32-EX: omp.inner.for.inc: // CHECK-32-EX-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP165]] // CHECK-32-EX-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP11]], 1 // CHECK-32-EX-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP165]] // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP166:![0-9]+]] // CHECK-32-EX: omp.inner.for.end: // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-32-EX: omp.dispatch.inc: // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-32-EX: omp.dispatch.end: // CHECK-32-EX-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0 // CHECK-32-EX-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-32-EX: .omp.final.then: // CHECK-32-EX-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-32-EX-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-32-EX: .omp.final.done: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l30 // CHECK-32-EX-SAME: () #[[ATTR0]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32-EX: user_code.entry: // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4 // CHECK-32-EX-NEXT: call void @__omp_outlined__11(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR2]] // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-EX-NEXT: ret void // CHECK-32-EX: worker.exit: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@__omp_outlined__11 // CHECK-32-EX-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x i8*], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block() // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-32-EX: cond.true: // CHECK-32-EX-NEXT: br label [[COND_END:%.*]] // CHECK-32-EX: cond.false: // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: br label [[COND_END]] // CHECK-32-EX: cond.end: // CHECK-32-EX-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-32-EX-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32-EX: omp.inner.for.cond: // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP168:![0-9]+]] // CHECK-32-EX-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10 // CHECK-32-EX-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32-EX: omp.inner.for.body: // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP168]] // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP168]] // CHECK-32-EX-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to i8* // CHECK-32-EX-NEXT: store i8* [[TMP9]], i8** [[TMP8]], align 4, !llvm.access.group [[ACC_GRP168]] // CHECK-32-EX-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1 // CHECK-32-EX-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to i8* // CHECK-32-EX-NEXT: store i8* [[TMP11]], i8** [[TMP10]], align 4, !llvm.access.group [[ACC_GRP168]] // CHECK-32-EX-NEXT: [[TMP12:%.*]] = bitcast [2 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32)* @__omp_outlined__12 to i8*), i8* null, i8** [[TMP12]], i32 2), !llvm.access.group [[ACC_GRP168]] // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32-EX: omp.inner.for.inc: // CHECK-32-EX-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP168]] // CHECK-32-EX-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP168]] // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] // CHECK-32-EX-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP168]] // CHECK-32-EX-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP168]] // CHECK-32-EX-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP168]] // CHECK-32-EX-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] // CHECK-32-EX-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP168]] // CHECK-32-EX-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP168]] // CHECK-32-EX-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP168]] // CHECK-32-EX-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] // CHECK-32-EX-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP168]] // CHECK-32-EX-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP168]] // CHECK-32-EX-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP19]], 9 // CHECK-32-EX-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]] // CHECK-32-EX: cond.true5: // CHECK-32-EX-NEXT: br label [[COND_END7:%.*]] // CHECK-32-EX: cond.false6: // CHECK-32-EX-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP168]] // CHECK-32-EX-NEXT: br label [[COND_END7]] // CHECK-32-EX: cond.end7: // CHECK-32-EX-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP20]], [[COND_FALSE6]] ] // CHECK-32-EX-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP168]] // CHECK-32-EX-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP168]] // CHECK-32-EX-NEXT: store i32 [[TMP21]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP168]] // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP169:![0-9]+]] // CHECK-32-EX: omp.inner.for.end: // CHECK-32-EX-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-32-EX: omp.loop.exit: // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) // CHECK-32-EX-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 // CHECK-32-EX-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-32-EX: .omp.final.then: // CHECK-32-EX-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-32-EX-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-32-EX: .omp.final.done: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@__omp_outlined__12 // CHECK-32-EX-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 1073741859, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1) // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-32-EX: omp.dispatch.cond: // CHECK-32-EX-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-32-EX-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0 // CHECK-32-EX-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-32-EX: omp.dispatch.body: // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32-EX: omp.inner.for.cond: // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP171:![0-9]+]] // CHECK-32-EX-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP171]] // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32-EX: omp.inner.for.body: // CHECK-32-EX-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP171]] // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-EX-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP171]] // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32-EX: omp.body.continue: // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32-EX: omp.inner.for.inc: // CHECK-32-EX-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP171]] // CHECK-32-EX-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP11]], 1 // CHECK-32-EX-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP171]] // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP172:![0-9]+]] // CHECK-32-EX: omp.inner.for.end: // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-32-EX: omp.dispatch.inc: // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-32-EX: omp.dispatch.end: // CHECK-32-EX-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0 // CHECK-32-EX-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-32-EX: .omp.final.then: // CHECK-32-EX-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-32-EX-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-32-EX: .omp.final.done: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l33 // CHECK-32-EX-SAME: () #[[ATTR0]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32-EX: user_code.entry: // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4 // CHECK-32-EX-NEXT: call void @__omp_outlined__13(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR2]] // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-EX-NEXT: ret void // CHECK-32-EX: worker.exit: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@__omp_outlined__13 // CHECK-32-EX-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x i8*], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block() // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-32-EX: cond.true: // CHECK-32-EX-NEXT: br label [[COND_END:%.*]] // CHECK-32-EX: cond.false: // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: br label [[COND_END]] // CHECK-32-EX: cond.end: // CHECK-32-EX-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-32-EX-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32-EX: omp.inner.for.cond: // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP174:![0-9]+]] // CHECK-32-EX-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10 // CHECK-32-EX-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32-EX: omp.inner.for.body: // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP174]] // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP174]] // CHECK-32-EX-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to i8* // CHECK-32-EX-NEXT: store i8* [[TMP9]], i8** [[TMP8]], align 4, !llvm.access.group [[ACC_GRP174]] // CHECK-32-EX-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1 // CHECK-32-EX-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to i8* // CHECK-32-EX-NEXT: store i8* [[TMP11]], i8** [[TMP10]], align 4, !llvm.access.group [[ACC_GRP174]] // CHECK-32-EX-NEXT: [[TMP12:%.*]] = bitcast [2 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32)* @__omp_outlined__14 to i8*), i8* null, i8** [[TMP12]], i32 2), !llvm.access.group [[ACC_GRP174]] // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32-EX: omp.inner.for.inc: // CHECK-32-EX-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP174]] // CHECK-32-EX-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP174]] // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] // CHECK-32-EX-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP174]] // CHECK-32-EX-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP174]] // CHECK-32-EX-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP174]] // CHECK-32-EX-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] // CHECK-32-EX-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP174]] // CHECK-32-EX-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP174]] // CHECK-32-EX-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP174]] // CHECK-32-EX-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] // CHECK-32-EX-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP174]] // CHECK-32-EX-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP174]] // CHECK-32-EX-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP19]], 9 // CHECK-32-EX-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]] // CHECK-32-EX: cond.true5: // CHECK-32-EX-NEXT: br label [[COND_END7:%.*]] // CHECK-32-EX: cond.false6: // CHECK-32-EX-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP174]] // CHECK-32-EX-NEXT: br label [[COND_END7]] // CHECK-32-EX: cond.end7: // CHECK-32-EX-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP20]], [[COND_FALSE6]] ] // CHECK-32-EX-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP174]] // CHECK-32-EX-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP174]] // CHECK-32-EX-NEXT: store i32 [[TMP21]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP174]] // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP175:![0-9]+]] // CHECK-32-EX: omp.inner.for.end: // CHECK-32-EX-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-32-EX: omp.loop.exit: // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) // CHECK-32-EX-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 // CHECK-32-EX-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-32-EX: .omp.final.then: // CHECK-32-EX-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-32-EX-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-32-EX: .omp.final.done: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@__omp_outlined__14 // CHECK-32-EX-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 1073741860, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1) // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-32-EX: omp.dispatch.cond: // CHECK-32-EX-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-32-EX-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0 // CHECK-32-EX-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-32-EX: omp.dispatch.body: // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32-EX: omp.inner.for.cond: // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP177:![0-9]+]] // CHECK-32-EX-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP177]] // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32-EX: omp.inner.for.body: // CHECK-32-EX-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP177]] // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-EX-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP177]] // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32-EX: omp.body.continue: // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32-EX: omp.inner.for.inc: // CHECK-32-EX-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP177]] // CHECK-32-EX-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP11]], 1 // CHECK-32-EX-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP177]] // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP178:![0-9]+]] // CHECK-32-EX: omp.inner.for.end: // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-32-EX: omp.dispatch.inc: // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-32-EX: omp.dispatch.end: // CHECK-32-EX-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0 // CHECK-32-EX-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-32-EX: .omp.final.then: // CHECK-32-EX-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-32-EX-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-32-EX: .omp.final.done: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l37 // CHECK-32-EX-SAME: (i32 noundef [[A:%.*]]) #[[ATTR0]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32-EX: user_code.entry: // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, i32* [[A_ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP2]], i32* [[A_CASTED]], align 4 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, i32* [[A_CASTED]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4 // CHECK-32-EX-NEXT: call void @__omp_outlined__15(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]], i32 [[TMP3]]) #[[ATTR2]] // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-EX-NEXT: ret void // CHECK-32-EX: worker.exit: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@__omp_outlined__15 // CHECK-32-EX-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[A:%.*]]) #[[ATTR1]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [3 x i8*], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 // CHECK-32-EX-NEXT: [[A1:%.*]] = call align 8 i8* @__kmpc_alloc_shared(i32 4) // CHECK-32-EX-NEXT: [[A_ON_STACK:%.*]] = bitcast i8* [[A1]] to i32* // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block() // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-32-EX: cond.true: // CHECK-32-EX-NEXT: br label [[COND_END:%.*]] // CHECK-32-EX: cond.false: // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: br label [[COND_END]] // CHECK-32-EX: cond.end: // CHECK-32-EX-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-32-EX-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32-EX: omp.inner.for.cond: // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[CMP2:%.*]] = icmp slt i32 [[TMP5]], 10 // CHECK-32-EX-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32-EX: omp.inner.for.body: // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, i32* [[A_ON_STACK]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP8]], i32* [[A_CASTED]], align 4 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = load i32, i32* [[A_CASTED]], align 4 // CHECK-32-EX-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0 // CHECK-32-EX-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP6]] to i8* // CHECK-32-EX-NEXT: store i8* [[TMP11]], i8** [[TMP10]], align 4 // CHECK-32-EX-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1 // CHECK-32-EX-NEXT: [[TMP13:%.*]] = inttoptr i32 [[TMP7]] to i8* // CHECK-32-EX-NEXT: store i8* [[TMP13]], i8** [[TMP12]], align 4 // CHECK-32-EX-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2 // CHECK-32-EX-NEXT: [[TMP15:%.*]] = inttoptr i32 [[TMP9]] to i8* // CHECK-32-EX-NEXT: store i8* [[TMP15]], i8** [[TMP14]], align 4 // CHECK-32-EX-NEXT: [[TMP16:%.*]] = bitcast [3 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, i32)* @__omp_outlined__16 to i8*), i8* null, i8** [[TMP16]], i32 3) // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32-EX: omp.inner.for.inc: // CHECK-32-EX-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] // CHECK-32-EX-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] // CHECK-32-EX-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] // CHECK-32-EX-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP23]], 9 // CHECK-32-EX-NEXT: br i1 [[CMP5]], label [[COND_TRUE6:%.*]], label [[COND_FALSE7:%.*]] // CHECK-32-EX: cond.true6: // CHECK-32-EX-NEXT: br label [[COND_END8:%.*]] // CHECK-32-EX: cond.false7: // CHECK-32-EX-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: br label [[COND_END8]] // CHECK-32-EX: cond.end8: // CHECK-32-EX-NEXT: [[COND9:%.*]] = phi i32 [ 9, [[COND_TRUE6]] ], [ [[TMP24]], [[COND_FALSE7]] ] // CHECK-32-EX-NEXT: store i32 [[COND9]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP25]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK-32-EX: omp.inner.for.end: // CHECK-32-EX-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-32-EX: omp.loop.exit: // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) // CHECK-32-EX-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[TMP27:%.*]] = icmp ne i32 [[TMP26]], 0 // CHECK-32-EX-NEXT: br i1 [[TMP27]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] // CHECK-32-EX: .omp.lastprivate.then: // CHECK-32-EX-NEXT: [[TMP28:%.*]] = load i32, i32* [[A_ON_STACK]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP28]], i32* [[A_ADDR]], align 4 // CHECK-32-EX-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] // CHECK-32-EX: .omp.lastprivate.done: // CHECK-32-EX-NEXT: call void @__kmpc_free_shared(i8* [[A1]], i32 4) // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@__omp_outlined__16 // CHECK-32-EX-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32 noundef [[A:%.*]]) #[[ATTR1]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[A1:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 // CHECK-32-EX-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP3]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32-EX: omp.inner.for.cond: // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp ule i32 [[TMP5]], [[TMP6]] // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32-EX: omp.inner.for.body: // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-EX-NEXT: store i32 [[ADD]], i32* [[I]], align 4 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, i32* [[I]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP8]], i32* [[A1]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32-EX: omp.body.continue: // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32-EX: omp.inner.for.inc: // CHECK-32-EX-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP9]], [[TMP10]] // CHECK-32-EX-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK-32-EX: omp.inner.for.end: // CHECK-32-EX-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-32-EX: omp.loop.exit: // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]]) // CHECK-32-EX-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0 // CHECK-32-EX-NEXT: br i1 [[TMP12]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]] // CHECK-32-EX: .omp.lastprivate.then: // CHECK-32-EX-NEXT: [[TMP13:%.*]] = load i32, i32* [[A1]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP13]], i32* [[A_ADDR]], align 4 // CHECK-32-EX-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]] // CHECK-32-EX: .omp.lastprivate.done: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l40 // CHECK-32-EX-SAME: () #[[ATTR0]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32-EX: user_code.entry: // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4 // CHECK-32-EX-NEXT: call void @__omp_outlined__17(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR2]] // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-EX-NEXT: ret void // CHECK-32-EX: worker.exit: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@__omp_outlined__17 // CHECK-32-EX-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x i8*], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block() // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-32-EX: cond.true: // CHECK-32-EX-NEXT: br label [[COND_END:%.*]] // CHECK-32-EX: cond.false: // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: br label [[COND_END]] // CHECK-32-EX: cond.end: // CHECK-32-EX-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-32-EX-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32-EX: omp.inner.for.cond: // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10 // CHECK-32-EX-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32-EX: omp.inner.for.body: // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to i8* // CHECK-32-EX-NEXT: store i8* [[TMP9]], i8** [[TMP8]], align 4 // CHECK-32-EX-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1 // CHECK-32-EX-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to i8* // CHECK-32-EX-NEXT: store i8* [[TMP11]], i8** [[TMP10]], align 4 // CHECK-32-EX-NEXT: [[TMP12:%.*]] = bitcast [2 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32)* @__omp_outlined__18 to i8*), i8* null, i8** [[TMP12]], i32 2) // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32-EX: omp.inner.for.inc: // CHECK-32-EX-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] // CHECK-32-EX-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] // CHECK-32-EX-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] // CHECK-32-EX-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP19]], 9 // CHECK-32-EX-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]] // CHECK-32-EX: cond.true5: // CHECK-32-EX-NEXT: br label [[COND_END7:%.*]] // CHECK-32-EX: cond.false6: // CHECK-32-EX-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: br label [[COND_END7]] // CHECK-32-EX: cond.end7: // CHECK-32-EX-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP20]], [[COND_FALSE6]] ] // CHECK-32-EX-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP21]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK-32-EX: omp.inner.for.end: // CHECK-32-EX-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-32-EX: omp.loop.exit: // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@__omp_outlined__18 // CHECK-32-EX-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 // CHECK-32-EX-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 9 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-32-EX: cond.true: // CHECK-32-EX-NEXT: br label [[COND_END:%.*]] // CHECK-32-EX: cond.false: // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: br label [[COND_END]] // CHECK-32-EX: cond.end: // CHECK-32-EX-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] // CHECK-32-EX-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32-EX: omp.inner.for.cond: // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] // CHECK-32-EX-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32-EX: omp.inner.for.body: // CHECK-32-EX-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-EX-NEXT: store i32 [[ADD]], i32* [[I]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32-EX: omp.body.continue: // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32-EX: omp.inner.for.inc: // CHECK-32-EX-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 // CHECK-32-EX-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK-32-EX: omp.inner.for.end: // CHECK-32-EX-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-32-EX: omp.loop.exit: // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]]) // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l43 // CHECK-32-EX-SAME: () #[[ATTR0]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32-EX: user_code.entry: // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4 // CHECK-32-EX-NEXT: call void @__omp_outlined__19(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR2]] // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-EX-NEXT: ret void // CHECK-32-EX: worker.exit: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@__omp_outlined__19 // CHECK-32-EX-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x i8*], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block() // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-32-EX: cond.true: // CHECK-32-EX-NEXT: br label [[COND_END:%.*]] // CHECK-32-EX: cond.false: // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: br label [[COND_END]] // CHECK-32-EX: cond.end: // CHECK-32-EX-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-32-EX-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32-EX: omp.inner.for.cond: // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10 // CHECK-32-EX-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32-EX: omp.inner.for.body: // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to i8* // CHECK-32-EX-NEXT: store i8* [[TMP9]], i8** [[TMP8]], align 4 // CHECK-32-EX-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1 // CHECK-32-EX-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to i8* // CHECK-32-EX-NEXT: store i8* [[TMP11]], i8** [[TMP10]], align 4 // CHECK-32-EX-NEXT: [[TMP12:%.*]] = bitcast [2 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32)* @__omp_outlined__20 to i8*), i8* null, i8** [[TMP12]], i32 2) // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32-EX: omp.inner.for.inc: // CHECK-32-EX-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] // CHECK-32-EX-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] // CHECK-32-EX-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] // CHECK-32-EX-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP19]], 9 // CHECK-32-EX-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]] // CHECK-32-EX: cond.true5: // CHECK-32-EX-NEXT: br label [[COND_END7:%.*]] // CHECK-32-EX: cond.false6: // CHECK-32-EX-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: br label [[COND_END7]] // CHECK-32-EX: cond.end7: // CHECK-32-EX-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP20]], [[COND_FALSE6]] ] // CHECK-32-EX-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP21]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK-32-EX: omp.inner.for.end: // CHECK-32-EX-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-32-EX: omp.loop.exit: // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@__omp_outlined__20 // CHECK-32-EX-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 // CHECK-32-EX-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP3]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32-EX: omp.inner.for.cond: // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp ule i32 [[TMP5]], [[TMP6]] // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32-EX: omp.inner.for.body: // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-EX-NEXT: store i32 [[ADD]], i32* [[I]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32-EX: omp.body.continue: // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32-EX: omp.inner.for.inc: // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP8]], [[TMP9]] // CHECK-32-EX-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK-32-EX: omp.inner.for.end: // CHECK-32-EX-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-32-EX: omp.loop.exit: // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]]) // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l46 // CHECK-32-EX-SAME: () #[[ATTR0]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32-EX: user_code.entry: // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4 // CHECK-32-EX-NEXT: call void @__omp_outlined__21(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR2]] // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-EX-NEXT: ret void // CHECK-32-EX: worker.exit: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@__omp_outlined__21 // CHECK-32-EX-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x i8*], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block() // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-32-EX: cond.true: // CHECK-32-EX-NEXT: br label [[COND_END:%.*]] // CHECK-32-EX: cond.false: // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: br label [[COND_END]] // CHECK-32-EX: cond.end: // CHECK-32-EX-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-32-EX-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32-EX: omp.inner.for.cond: // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10 // CHECK-32-EX-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32-EX: omp.inner.for.body: // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to i8* // CHECK-32-EX-NEXT: store i8* [[TMP9]], i8** [[TMP8]], align 4 // CHECK-32-EX-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1 // CHECK-32-EX-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to i8* // CHECK-32-EX-NEXT: store i8* [[TMP11]], i8** [[TMP10]], align 4 // CHECK-32-EX-NEXT: [[TMP12:%.*]] = bitcast [2 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32)* @__omp_outlined__22 to i8*), i8* null, i8** [[TMP12]], i32 2) // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32-EX: omp.inner.for.inc: // CHECK-32-EX-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] // CHECK-32-EX-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] // CHECK-32-EX-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] // CHECK-32-EX-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP19]], 9 // CHECK-32-EX-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]] // CHECK-32-EX: cond.true5: // CHECK-32-EX-NEXT: br label [[COND_END7:%.*]] // CHECK-32-EX: cond.false6: // CHECK-32-EX-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: br label [[COND_END7]] // CHECK-32-EX: cond.end7: // CHECK-32-EX-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP20]], [[COND_FALSE6]] ] // CHECK-32-EX-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP21]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK-32-EX: omp.inner.for.end: // CHECK-32-EX-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-32-EX: omp.loop.exit: // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@__omp_outlined__22 // CHECK-32-EX-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 1073741862, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1) // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-32-EX: omp.dispatch.cond: // CHECK-32-EX-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-32-EX-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0 // CHECK-32-EX-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-32-EX: omp.dispatch.body: // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32-EX: omp.inner.for.cond: // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP180:![0-9]+]] // CHECK-32-EX-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP180]] // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32-EX: omp.inner.for.body: // CHECK-32-EX-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP180]] // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-EX-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP180]] // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32-EX: omp.body.continue: // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32-EX: omp.inner.for.inc: // CHECK-32-EX-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP180]] // CHECK-32-EX-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP11]], 1 // CHECK-32-EX-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP180]] // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP181:![0-9]+]] // CHECK-32-EX: omp.inner.for.end: // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-32-EX: omp.dispatch.inc: // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-32-EX: omp.dispatch.end: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l49 // CHECK-32-EX-SAME: () #[[ATTR0]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32-EX: user_code.entry: // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4 // CHECK-32-EX-NEXT: call void @__omp_outlined__23(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR2]] // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-EX-NEXT: ret void // CHECK-32-EX: worker.exit: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@__omp_outlined__23 // CHECK-32-EX-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x i8*], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block() // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-32-EX: cond.true: // CHECK-32-EX-NEXT: br label [[COND_END:%.*]] // CHECK-32-EX: cond.false: // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: br label [[COND_END]] // CHECK-32-EX: cond.end: // CHECK-32-EX-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-32-EX-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32-EX: omp.inner.for.cond: // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10 // CHECK-32-EX-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32-EX: omp.inner.for.body: // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to i8* // CHECK-32-EX-NEXT: store i8* [[TMP9]], i8** [[TMP8]], align 4 // CHECK-32-EX-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1 // CHECK-32-EX-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to i8* // CHECK-32-EX-NEXT: store i8* [[TMP11]], i8** [[TMP10]], align 4 // CHECK-32-EX-NEXT: [[TMP12:%.*]] = bitcast [2 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32)* @__omp_outlined__24 to i8*), i8* null, i8** [[TMP12]], i32 2) // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32-EX: omp.inner.for.inc: // CHECK-32-EX-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] // CHECK-32-EX-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] // CHECK-32-EX-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] // CHECK-32-EX-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP19]], 9 // CHECK-32-EX-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]] // CHECK-32-EX: cond.true5: // CHECK-32-EX-NEXT: br label [[COND_END7:%.*]] // CHECK-32-EX: cond.false6: // CHECK-32-EX-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: br label [[COND_END7]] // CHECK-32-EX: cond.end7: // CHECK-32-EX-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP20]], [[COND_FALSE6]] ] // CHECK-32-EX-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP21]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK-32-EX: omp.inner.for.end: // CHECK-32-EX-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-32-EX: omp.loop.exit: // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@__omp_outlined__24 // CHECK-32-EX-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 1073741861, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1) // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-32-EX: omp.dispatch.cond: // CHECK-32-EX-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-32-EX-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0 // CHECK-32-EX-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-32-EX: omp.dispatch.body: // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32-EX: omp.inner.for.cond: // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP183:![0-9]+]] // CHECK-32-EX-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP183]] // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32-EX: omp.inner.for.body: // CHECK-32-EX-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP183]] // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-EX-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP183]] // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32-EX: omp.body.continue: // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32-EX: omp.inner.for.inc: // CHECK-32-EX-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP183]] // CHECK-32-EX-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP11]], 1 // CHECK-32-EX-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP183]] // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP184:![0-9]+]] // CHECK-32-EX: omp.inner.for.end: // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-32-EX: omp.dispatch.inc: // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-32-EX: omp.dispatch.end: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l52 // CHECK-32-EX-SAME: () #[[ATTR0]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32-EX: user_code.entry: // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4 // CHECK-32-EX-NEXT: call void @__omp_outlined__25(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR2]] // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-EX-NEXT: ret void // CHECK-32-EX: worker.exit: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@__omp_outlined__25 // CHECK-32-EX-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x i8*], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block() // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-32-EX: cond.true: // CHECK-32-EX-NEXT: br label [[COND_END:%.*]] // CHECK-32-EX: cond.false: // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: br label [[COND_END]] // CHECK-32-EX: cond.end: // CHECK-32-EX-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-32-EX-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32-EX: omp.inner.for.cond: // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10 // CHECK-32-EX-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32-EX: omp.inner.for.body: // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to i8* // CHECK-32-EX-NEXT: store i8* [[TMP9]], i8** [[TMP8]], align 4 // CHECK-32-EX-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1 // CHECK-32-EX-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to i8* // CHECK-32-EX-NEXT: store i8* [[TMP11]], i8** [[TMP10]], align 4 // CHECK-32-EX-NEXT: [[TMP12:%.*]] = bitcast [2 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32)* @__omp_outlined__26 to i8*), i8* null, i8** [[TMP12]], i32 2) // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32-EX: omp.inner.for.inc: // CHECK-32-EX-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] // CHECK-32-EX-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] // CHECK-32-EX-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] // CHECK-32-EX-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP19]], 9 // CHECK-32-EX-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]] // CHECK-32-EX: cond.true5: // CHECK-32-EX-NEXT: br label [[COND_END7:%.*]] // CHECK-32-EX: cond.false6: // CHECK-32-EX-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: br label [[COND_END7]] // CHECK-32-EX: cond.end7: // CHECK-32-EX-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP20]], [[COND_FALSE6]] ] // CHECK-32-EX-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP21]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK-32-EX: omp.inner.for.end: // CHECK-32-EX-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-32-EX: omp.loop.exit: // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@__omp_outlined__26 // CHECK-32-EX-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 1073741859, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1) // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-32-EX: omp.dispatch.cond: // CHECK-32-EX-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-32-EX-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0 // CHECK-32-EX-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-32-EX: omp.dispatch.body: // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32-EX: omp.inner.for.cond: // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP186:![0-9]+]] // CHECK-32-EX-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP186]] // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32-EX: omp.inner.for.body: // CHECK-32-EX-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP186]] // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-EX-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP186]] // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32-EX: omp.body.continue: // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32-EX: omp.inner.for.inc: // CHECK-32-EX-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP186]] // CHECK-32-EX-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP11]], 1 // CHECK-32-EX-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP186]] // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP187:![0-9]+]] // CHECK-32-EX: omp.inner.for.end: // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-32-EX: omp.dispatch.inc: // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-32-EX: omp.dispatch.end: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l55 // CHECK-32-EX-SAME: () #[[ATTR0]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32-EX: user_code.entry: // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4 // CHECK-32-EX-NEXT: call void @__omp_outlined__27(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR2]] // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-EX-NEXT: ret void // CHECK-32-EX: worker.exit: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@__omp_outlined__27 // CHECK-32-EX-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x i8*], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block() // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-32-EX: cond.true: // CHECK-32-EX-NEXT: br label [[COND_END:%.*]] // CHECK-32-EX: cond.false: // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: br label [[COND_END]] // CHECK-32-EX: cond.end: // CHECK-32-EX-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-32-EX-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32-EX: omp.inner.for.cond: // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10 // CHECK-32-EX-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32-EX: omp.inner.for.body: // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to i8* // CHECK-32-EX-NEXT: store i8* [[TMP9]], i8** [[TMP8]], align 4 // CHECK-32-EX-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1 // CHECK-32-EX-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to i8* // CHECK-32-EX-NEXT: store i8* [[TMP11]], i8** [[TMP10]], align 4 // CHECK-32-EX-NEXT: [[TMP12:%.*]] = bitcast [2 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32)* @__omp_outlined__28 to i8*), i8* null, i8** [[TMP12]], i32 2) // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32-EX: omp.inner.for.inc: // CHECK-32-EX-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] // CHECK-32-EX-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] // CHECK-32-EX-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] // CHECK-32-EX-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP19]], 9 // CHECK-32-EX-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]] // CHECK-32-EX: cond.true5: // CHECK-32-EX-NEXT: br label [[COND_END7:%.*]] // CHECK-32-EX: cond.false6: // CHECK-32-EX-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: br label [[COND_END7]] // CHECK-32-EX: cond.end7: // CHECK-32-EX-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP20]], [[COND_FALSE6]] ] // CHECK-32-EX-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP21]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK-32-EX: omp.inner.for.end: // CHECK-32-EX-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-32-EX: omp.loop.exit: // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@__omp_outlined__28 // CHECK-32-EX-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 1073741860, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1) // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-32-EX: omp.dispatch.cond: // CHECK-32-EX-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-32-EX-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0 // CHECK-32-EX-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-32-EX: omp.dispatch.body: // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32-EX: omp.inner.for.cond: // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP189:![0-9]+]] // CHECK-32-EX-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP189]] // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32-EX: omp.inner.for.body: // CHECK-32-EX-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP189]] // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-EX-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP189]] // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32-EX: omp.body.continue: // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32-EX: omp.inner.for.inc: // CHECK-32-EX-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP189]] // CHECK-32-EX-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP11]], 1 // CHECK-32-EX-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP189]] // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP190:![0-9]+]] // CHECK-32-EX: omp.inner.for.end: // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-32-EX: omp.dispatch.inc: // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-32-EX: omp.dispatch.end: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l58 // CHECK-32-EX-SAME: () #[[ATTR0]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32-EX: user_code.entry: // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4 // CHECK-32-EX-NEXT: call void @__omp_outlined__29(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR2]] // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-EX-NEXT: ret void // CHECK-32-EX: worker.exit: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@__omp_outlined__29 // CHECK-32-EX-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[B:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x i8*], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block() // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-32-EX: cond.true: // CHECK-32-EX-NEXT: br label [[COND_END:%.*]] // CHECK-32-EX: cond.false: // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: br label [[COND_END]] // CHECK-32-EX: cond.end: // CHECK-32-EX-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-32-EX-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32-EX: omp.inner.for.cond: // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP192:![0-9]+]] // CHECK-32-EX-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10 // CHECK-32-EX-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32-EX: omp.inner.for.body: // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP192]] // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP192]] // CHECK-32-EX-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to i8* // CHECK-32-EX-NEXT: store i8* [[TMP9]], i8** [[TMP8]], align 4, !llvm.access.group [[ACC_GRP192]] // CHECK-32-EX-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1 // CHECK-32-EX-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to i8* // CHECK-32-EX-NEXT: store i8* [[TMP11]], i8** [[TMP10]], align 4, !llvm.access.group [[ACC_GRP192]] // CHECK-32-EX-NEXT: [[TMP12:%.*]] = bitcast [2 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32)* @__omp_outlined__30 to i8*), i8* null, i8** [[TMP12]], i32 2), !llvm.access.group [[ACC_GRP192]] // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32-EX: omp.inner.for.inc: // CHECK-32-EX-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP192]] // CHECK-32-EX-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP192]] // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] // CHECK-32-EX-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP192]] // CHECK-32-EX-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP192]] // CHECK-32-EX-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP192]] // CHECK-32-EX-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] // CHECK-32-EX-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP192]] // CHECK-32-EX-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP192]] // CHECK-32-EX-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP192]] // CHECK-32-EX-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] // CHECK-32-EX-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP192]] // CHECK-32-EX-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP192]] // CHECK-32-EX-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP19]], 9 // CHECK-32-EX-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]] // CHECK-32-EX: cond.true5: // CHECK-32-EX-NEXT: br label [[COND_END7:%.*]] // CHECK-32-EX: cond.false6: // CHECK-32-EX-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP192]] // CHECK-32-EX-NEXT: br label [[COND_END7]] // CHECK-32-EX: cond.end7: // CHECK-32-EX-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP20]], [[COND_FALSE6]] ] // CHECK-32-EX-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP192]] // CHECK-32-EX-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP192]] // CHECK-32-EX-NEXT: store i32 [[TMP21]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP192]] // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP193:![0-9]+]] // CHECK-32-EX: omp.inner.for.end: // CHECK-32-EX-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-32-EX: omp.loop.exit: // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) // CHECK-32-EX-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 // CHECK-32-EX-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-32-EX: .omp.final.then: // CHECK-32-EX-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-32-EX-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-32-EX: .omp.final.done: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@__omp_outlined__30 // CHECK-32-EX-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 // CHECK-32-EX-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP3]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32-EX: omp.inner.for.cond: // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP195:![0-9]+]] // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4, !llvm.access.group [[ACC_GRP195]] // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp ule i32 [[TMP5]], [[TMP6]] // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32-EX: omp.inner.for.body: // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP195]] // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-EX-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP195]] // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32-EX: omp.body.continue: // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32-EX: omp.inner.for.inc: // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP195]] // CHECK-32-EX-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP195]] // CHECK-32-EX-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP8]], [[TMP9]] // CHECK-32-EX-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP195]] // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP196:![0-9]+]] // CHECK-32-EX: omp.inner.for.end: // CHECK-32-EX-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-32-EX: omp.loop.exit: // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]]) // CHECK-32-EX-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[TMP11:%.*]] = icmp ne i32 [[TMP10]], 0 // CHECK-32-EX-NEXT: br i1 [[TMP11]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-32-EX: .omp.final.then: // CHECK-32-EX-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-32-EX-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-32-EX: .omp.final.done: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l66 // CHECK-32-EX-SAME: () #[[ATTR0]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32-EX: user_code.entry: // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4 // CHECK-32-EX-NEXT: call void @__omp_outlined__31(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR2]] // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-EX-NEXT: ret void // CHECK-32-EX: worker.exit: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@__omp_outlined__31 // CHECK-32-EX-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[B:%.*]] = alloca [3 x i32], align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x i8*], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = bitcast [3 x i32]* [[B]] to i8* // CHECK-32-EX-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([3 x i32]* @"__const..b" to i8*), i32 12, i1 false) // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block() // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-32-EX: cond.true: // CHECK-32-EX-NEXT: br label [[COND_END:%.*]] // CHECK-32-EX: cond.false: // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: br label [[COND_END]] // CHECK-32-EX: cond.end: // CHECK-32-EX-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] // CHECK-32-EX-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32-EX: omp.inner.for.cond: // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP198:![0-9]+]] // CHECK-32-EX-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP6]], 10 // CHECK-32-EX-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32-EX: omp.inner.for.body: // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP198]] // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP198]] // CHECK-32-EX-NEXT: [[TMP9:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0 // CHECK-32-EX-NEXT: [[TMP10:%.*]] = inttoptr i32 [[TMP7]] to i8* // CHECK-32-EX-NEXT: store i8* [[TMP10]], i8** [[TMP9]], align 4, !llvm.access.group [[ACC_GRP198]] // CHECK-32-EX-NEXT: [[TMP11:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1 // CHECK-32-EX-NEXT: [[TMP12:%.*]] = inttoptr i32 [[TMP8]] to i8* // CHECK-32-EX-NEXT: store i8* [[TMP12]], i8** [[TMP11]], align 4, !llvm.access.group [[ACC_GRP198]] // CHECK-32-EX-NEXT: [[TMP13:%.*]] = bitcast [2 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32)* @__omp_outlined__32 to i8*), i8* null, i8** [[TMP13]], i32 2), !llvm.access.group [[ACC_GRP198]] // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32-EX: omp.inner.for.inc: // CHECK-32-EX-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP198]] // CHECK-32-EX-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP198]] // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]] // CHECK-32-EX-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP198]] // CHECK-32-EX-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP198]] // CHECK-32-EX-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP198]] // CHECK-32-EX-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP16]], [[TMP17]] // CHECK-32-EX-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP198]] // CHECK-32-EX-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP198]] // CHECK-32-EX-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP198]] // CHECK-32-EX-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] // CHECK-32-EX-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP198]] // CHECK-32-EX-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP198]] // CHECK-32-EX-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP20]], 9 // CHECK-32-EX-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]] // CHECK-32-EX: cond.true5: // CHECK-32-EX-NEXT: br label [[COND_END7:%.*]] // CHECK-32-EX: cond.false6: // CHECK-32-EX-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP198]] // CHECK-32-EX-NEXT: br label [[COND_END7]] // CHECK-32-EX: cond.end7: // CHECK-32-EX-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP21]], [[COND_FALSE6]] ] // CHECK-32-EX-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP198]] // CHECK-32-EX-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP198]] // CHECK-32-EX-NEXT: store i32 [[TMP22]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP198]] // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP199:![0-9]+]] // CHECK-32-EX: omp.inner.for.end: // CHECK-32-EX-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-32-EX: omp.loop.exit: // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP2]]) // CHECK-32-EX-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0 // CHECK-32-EX-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-32-EX: .omp.final.then: // CHECK-32-EX-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-32-EX-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-32-EX: .omp.final.done: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@__omp_outlined__32 // CHECK-32-EX-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 // CHECK-32-EX-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 9 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-32-EX: cond.true: // CHECK-32-EX-NEXT: br label [[COND_END:%.*]] // CHECK-32-EX: cond.false: // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: br label [[COND_END]] // CHECK-32-EX: cond.end: // CHECK-32-EX-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] // CHECK-32-EX-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32-EX: omp.inner.for.cond: // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP201:![0-9]+]] // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP201]] // CHECK-32-EX-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] // CHECK-32-EX-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32-EX: omp.inner.for.body: // CHECK-32-EX-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP201]] // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-EX-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP201]] // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32-EX: omp.body.continue: // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32-EX: omp.inner.for.inc: // CHECK-32-EX-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP201]] // CHECK-32-EX-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 // CHECK-32-EX-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP201]] // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP202:![0-9]+]] // CHECK-32-EX: omp.inner.for.end: // CHECK-32-EX-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-32-EX: omp.loop.exit: // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]]) // CHECK-32-EX-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0 // CHECK-32-EX-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-32-EX: .omp.final.then: // CHECK-32-EX-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-32-EX-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-32-EX: .omp.final.done: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l73 // CHECK-32-EX-SAME: () #[[ATTR0]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 1, i1 true) // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32-EX: user_code.entry: // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4 // CHECK-32-EX-NEXT: call void @__omp_outlined__33(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR2]] // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 1) // CHECK-32-EX-NEXT: ret void // CHECK-32-EX: worker.exit: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@__omp_outlined__33 // CHECK-32-EX-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x i8*], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: [[C:%.*]] = call align 8 i8* @__kmpc_alloc_shared(i32 4) // CHECK-32-EX-NEXT: [[C_ON_STACK:%.*]] = bitcast i8* [[C]] to i32** // CHECK-32-EX-NEXT: [[B:%.*]] = call align 8 i8* @__kmpc_alloc_shared(i32 4) // CHECK-32-EX-NEXT: [[B_ON_STACK:%.*]] = bitcast i8* [[B]] to i32* // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-32-EX: cond.true: // CHECK-32-EX-NEXT: br label [[COND_END:%.*]] // CHECK-32-EX: cond.false: // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: br label [[COND_END]] // CHECK-32-EX: cond.end: // CHECK-32-EX-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-32-EX-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32-EX: omp.inner.for.cond: // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP204:![0-9]+]] // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP204]] // CHECK-32-EX-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] // CHECK-32-EX-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32-EX: omp.inner.for.body: // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP204]] // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP204]] // CHECK-32-EX-NEXT: [[TMP9:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0 // CHECK-32-EX-NEXT: [[TMP10:%.*]] = inttoptr i32 [[TMP7]] to i8* // CHECK-32-EX-NEXT: store i8* [[TMP10]], i8** [[TMP9]], align 4, !llvm.access.group [[ACC_GRP204]] // CHECK-32-EX-NEXT: [[TMP11:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1 // CHECK-32-EX-NEXT: [[TMP12:%.*]] = inttoptr i32 [[TMP8]] to i8* // CHECK-32-EX-NEXT: store i8* [[TMP12]], i8** [[TMP11]], align 4, !llvm.access.group [[ACC_GRP204]] // CHECK-32-EX-NEXT: [[TMP13:%.*]] = bitcast [2 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32)* @__omp_outlined__34 to i8*), i8* bitcast (void (i16, i32)* @__omp_outlined__34_wrapper to i8*), i8** [[TMP13]], i32 2), !llvm.access.group [[ACC_GRP204]] // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32-EX: omp.inner.for.inc: // CHECK-32-EX-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP204]] // CHECK-32-EX-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP204]] // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]] // CHECK-32-EX-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP204]] // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP205:![0-9]+]] // CHECK-32-EX: omp.inner.for.end: // CHECK-32-EX-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-32-EX: omp.loop.exit: // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) // CHECK-32-EX-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 // CHECK-32-EX-NEXT: br i1 [[TMP17]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-32-EX: .omp.final.then: // CHECK-32-EX-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-32-EX-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-32-EX: .omp.final.done: // CHECK-32-EX-NEXT: store i32* [[B_ON_STACK]], i32** [[C_ON_STACK]], align 4 // CHECK-32-EX-NEXT: call void @__kmpc_free_shared(i8* [[B]], i32 4) // CHECK-32-EX-NEXT: call void @__kmpc_free_shared(i8* [[C]], i32 4) // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@__omp_outlined__34 // CHECK-32-EX-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 // CHECK-32-EX-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP3]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32-EX: omp.inner.for.cond: // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP207:![0-9]+]] // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4, !llvm.access.group [[ACC_GRP207]] // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp ule i32 [[TMP5]], [[TMP6]] // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32-EX: omp.inner.for.body: // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP207]] // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-EX-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP207]] // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32-EX: omp.body.continue: // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32-EX: omp.inner.for.inc: // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP207]] // CHECK-32-EX-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP207]] // CHECK-32-EX-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP8]], [[TMP9]] // CHECK-32-EX-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP207]] // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP208:![0-9]+]] // CHECK-32-EX: omp.inner.for.end: // CHECK-32-EX-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-32-EX: omp.loop.exit: // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]]) // CHECK-32-EX-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[TMP11:%.*]] = icmp ne i32 [[TMP10]], 0 // CHECK-32-EX-NEXT: br i1 [[TMP11]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-32-EX: .omp.final.then: // CHECK-32-EX-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-32-EX-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-32-EX: .omp.final.done: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@__omp_outlined__34_wrapper // CHECK-32-EX-SAME: (i16 noundef zeroext [[TMP0:%.*]], i32 noundef [[TMP1:%.*]]) #[[ATTR7:[0-9]+]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTADDR:%.*]] = alloca i16, align 2 // CHECK-32-EX-NEXT: [[DOTADDR1:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[GLOBAL_ARGS:%.*]] = alloca i8**, align 4 // CHECK-32-EX-NEXT: store i16 [[TMP0]], i16* [[DOTADDR]], align 2 // CHECK-32-EX-NEXT: store i32 [[TMP1]], i32* [[DOTADDR1]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 // CHECK-32-EX-NEXT: call void @__kmpc_get_shared_variables(i8*** [[GLOBAL_ARGS]]) // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i8**, i8*** [[GLOBAL_ARGS]], align 4 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = getelementptr inbounds i8*, i8** [[TMP2]], i32 0 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = bitcast i8** [[TMP3]] to i32* // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = getelementptr inbounds i8*, i8** [[TMP2]], i32 1 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i32* // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 // CHECK-32-EX-NEXT: call void @__omp_outlined__34(i32* [[DOTADDR1]], i32* [[DOTZERO_ADDR]], i32 [[TMP5]], i32 [[TMP8]]) #[[ATTR2]] // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l81 // CHECK-32-EX-SAME: () #[[ATTR0]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32-EX: user_code.entry: // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4 // CHECK-32-EX-NEXT: call void @__omp_outlined__35(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR2]] // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-EX-NEXT: ret void // CHECK-32-EX: worker.exit: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@__omp_outlined__35 // CHECK-32-EX-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x i8*], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block() // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-32-EX: cond.true: // CHECK-32-EX-NEXT: br label [[COND_END:%.*]] // CHECK-32-EX: cond.false: // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: br label [[COND_END]] // CHECK-32-EX: cond.end: // CHECK-32-EX-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-32-EX-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32-EX: omp.inner.for.cond: // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP210:![0-9]+]] // CHECK-32-EX-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10 // CHECK-32-EX-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32-EX: omp.inner.for.body: // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP210]] // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP210]] // CHECK-32-EX-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to i8* // CHECK-32-EX-NEXT: store i8* [[TMP9]], i8** [[TMP8]], align 4, !llvm.access.group [[ACC_GRP210]] // CHECK-32-EX-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1 // CHECK-32-EX-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to i8* // CHECK-32-EX-NEXT: store i8* [[TMP11]], i8** [[TMP10]], align 4, !llvm.access.group [[ACC_GRP210]] // CHECK-32-EX-NEXT: [[TMP12:%.*]] = bitcast [2 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32)* @__omp_outlined__36 to i8*), i8* null, i8** [[TMP12]], i32 2), !llvm.access.group [[ACC_GRP210]] // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32-EX: omp.inner.for.inc: // CHECK-32-EX-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP210]] // CHECK-32-EX-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP210]] // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] // CHECK-32-EX-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP210]] // CHECK-32-EX-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP210]] // CHECK-32-EX-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP210]] // CHECK-32-EX-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] // CHECK-32-EX-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP210]] // CHECK-32-EX-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP210]] // CHECK-32-EX-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP210]] // CHECK-32-EX-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] // CHECK-32-EX-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP210]] // CHECK-32-EX-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP210]] // CHECK-32-EX-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP19]], 9 // CHECK-32-EX-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]] // CHECK-32-EX: cond.true5: // CHECK-32-EX-NEXT: br label [[COND_END7:%.*]] // CHECK-32-EX: cond.false6: // CHECK-32-EX-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP210]] // CHECK-32-EX-NEXT: br label [[COND_END7]] // CHECK-32-EX: cond.end7: // CHECK-32-EX-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP20]], [[COND_FALSE6]] ] // CHECK-32-EX-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP210]] // CHECK-32-EX-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP210]] // CHECK-32-EX-NEXT: store i32 [[TMP21]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP210]] // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP211:![0-9]+]] // CHECK-32-EX: omp.inner.for.end: // CHECK-32-EX-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-32-EX: omp.loop.exit: // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) // CHECK-32-EX-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 // CHECK-32-EX-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-32-EX: .omp.final.then: // CHECK-32-EX-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-32-EX-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-32-EX: .omp.final.done: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@__omp_outlined__36 // CHECK-32-EX-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 1073741862, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1) // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-32-EX: omp.dispatch.cond: // CHECK-32-EX-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-32-EX-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0 // CHECK-32-EX-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-32-EX: omp.dispatch.body: // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32-EX: omp.inner.for.cond: // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP213:![0-9]+]] // CHECK-32-EX-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP213]] // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32-EX: omp.inner.for.body: // CHECK-32-EX-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP213]] // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-EX-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP213]] // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32-EX: omp.body.continue: // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32-EX: omp.inner.for.inc: // CHECK-32-EX-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP213]] // CHECK-32-EX-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP11]], 1 // CHECK-32-EX-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP213]] // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP214:![0-9]+]] // CHECK-32-EX: omp.inner.for.end: // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-32-EX: omp.dispatch.inc: // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-32-EX: omp.dispatch.end: // CHECK-32-EX-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0 // CHECK-32-EX-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-32-EX: .omp.final.then: // CHECK-32-EX-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-32-EX-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-32-EX: .omp.final.done: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l85 // CHECK-32-EX-SAME: () #[[ATTR0]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32-EX: user_code.entry: // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4 // CHECK-32-EX-NEXT: call void @__omp_outlined__37(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR2]] // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-EX-NEXT: ret void // CHECK-32-EX: worker.exit: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@__omp_outlined__37 // CHECK-32-EX-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x i8*], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block() // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-32-EX: cond.true: // CHECK-32-EX-NEXT: br label [[COND_END:%.*]] // CHECK-32-EX: cond.false: // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: br label [[COND_END]] // CHECK-32-EX: cond.end: // CHECK-32-EX-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-32-EX-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32-EX: omp.inner.for.cond: // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP216:![0-9]+]] // CHECK-32-EX-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10 // CHECK-32-EX-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32-EX: omp.inner.for.body: // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP216]] // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP216]] // CHECK-32-EX-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to i8* // CHECK-32-EX-NEXT: store i8* [[TMP9]], i8** [[TMP8]], align 4, !llvm.access.group [[ACC_GRP216]] // CHECK-32-EX-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1 // CHECK-32-EX-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to i8* // CHECK-32-EX-NEXT: store i8* [[TMP11]], i8** [[TMP10]], align 4, !llvm.access.group [[ACC_GRP216]] // CHECK-32-EX-NEXT: [[TMP12:%.*]] = bitcast [2 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32)* @__omp_outlined__38 to i8*), i8* null, i8** [[TMP12]], i32 2), !llvm.access.group [[ACC_GRP216]] // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32-EX: omp.inner.for.inc: // CHECK-32-EX-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP216]] // CHECK-32-EX-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP216]] // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] // CHECK-32-EX-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP216]] // CHECK-32-EX-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP216]] // CHECK-32-EX-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP216]] // CHECK-32-EX-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] // CHECK-32-EX-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP216]] // CHECK-32-EX-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP216]] // CHECK-32-EX-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP216]] // CHECK-32-EX-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] // CHECK-32-EX-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP216]] // CHECK-32-EX-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP216]] // CHECK-32-EX-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP19]], 9 // CHECK-32-EX-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]] // CHECK-32-EX: cond.true5: // CHECK-32-EX-NEXT: br label [[COND_END7:%.*]] // CHECK-32-EX: cond.false6: // CHECK-32-EX-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP216]] // CHECK-32-EX-NEXT: br label [[COND_END7]] // CHECK-32-EX: cond.end7: // CHECK-32-EX-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP20]], [[COND_FALSE6]] ] // CHECK-32-EX-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP216]] // CHECK-32-EX-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP216]] // CHECK-32-EX-NEXT: store i32 [[TMP21]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP216]] // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP217:![0-9]+]] // CHECK-32-EX: omp.inner.for.end: // CHECK-32-EX-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-32-EX: omp.loop.exit: // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) // CHECK-32-EX-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 // CHECK-32-EX-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-32-EX: .omp.final.then: // CHECK-32-EX-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-32-EX-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-32-EX: .omp.final.done: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@__omp_outlined__38 // CHECK-32-EX-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 1073741861, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1) // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-32-EX: omp.dispatch.cond: // CHECK-32-EX-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-32-EX-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0 // CHECK-32-EX-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-32-EX: omp.dispatch.body: // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32-EX: omp.inner.for.cond: // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP219:![0-9]+]] // CHECK-32-EX-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP219]] // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32-EX: omp.inner.for.body: // CHECK-32-EX-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP219]] // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-EX-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP219]] // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32-EX: omp.body.continue: // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32-EX: omp.inner.for.inc: // CHECK-32-EX-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP219]] // CHECK-32-EX-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP11]], 1 // CHECK-32-EX-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP219]] // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP220:![0-9]+]] // CHECK-32-EX: omp.inner.for.end: // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-32-EX: omp.dispatch.inc: // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-32-EX: omp.dispatch.end: // CHECK-32-EX-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0 // CHECK-32-EX-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-32-EX: .omp.final.then: // CHECK-32-EX-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-32-EX-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-32-EX: .omp.final.done: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l89 // CHECK-32-EX-SAME: () #[[ATTR0]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32-EX: user_code.entry: // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4 // CHECK-32-EX-NEXT: call void @__omp_outlined__39(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR2]] // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-EX-NEXT: ret void // CHECK-32-EX: worker.exit: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@__omp_outlined__39 // CHECK-32-EX-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x i8*], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block() // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-32-EX: cond.true: // CHECK-32-EX-NEXT: br label [[COND_END:%.*]] // CHECK-32-EX: cond.false: // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: br label [[COND_END]] // CHECK-32-EX: cond.end: // CHECK-32-EX-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-32-EX-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32-EX: omp.inner.for.cond: // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP222:![0-9]+]] // CHECK-32-EX-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10 // CHECK-32-EX-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32-EX: omp.inner.for.body: // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP222]] // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP222]] // CHECK-32-EX-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to i8* // CHECK-32-EX-NEXT: store i8* [[TMP9]], i8** [[TMP8]], align 4, !llvm.access.group [[ACC_GRP222]] // CHECK-32-EX-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1 // CHECK-32-EX-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to i8* // CHECK-32-EX-NEXT: store i8* [[TMP11]], i8** [[TMP10]], align 4, !llvm.access.group [[ACC_GRP222]] // CHECK-32-EX-NEXT: [[TMP12:%.*]] = bitcast [2 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32)* @__omp_outlined__40 to i8*), i8* null, i8** [[TMP12]], i32 2), !llvm.access.group [[ACC_GRP222]] // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32-EX: omp.inner.for.inc: // CHECK-32-EX-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP222]] // CHECK-32-EX-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP222]] // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] // CHECK-32-EX-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP222]] // CHECK-32-EX-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP222]] // CHECK-32-EX-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP222]] // CHECK-32-EX-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] // CHECK-32-EX-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP222]] // CHECK-32-EX-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP222]] // CHECK-32-EX-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP222]] // CHECK-32-EX-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] // CHECK-32-EX-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP222]] // CHECK-32-EX-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP222]] // CHECK-32-EX-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP19]], 9 // CHECK-32-EX-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]] // CHECK-32-EX: cond.true5: // CHECK-32-EX-NEXT: br label [[COND_END7:%.*]] // CHECK-32-EX: cond.false6: // CHECK-32-EX-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP222]] // CHECK-32-EX-NEXT: br label [[COND_END7]] // CHECK-32-EX: cond.end7: // CHECK-32-EX-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP20]], [[COND_FALSE6]] ] // CHECK-32-EX-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP222]] // CHECK-32-EX-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP222]] // CHECK-32-EX-NEXT: store i32 [[TMP21]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP222]] // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP223:![0-9]+]] // CHECK-32-EX: omp.inner.for.end: // CHECK-32-EX-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-32-EX: omp.loop.exit: // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) // CHECK-32-EX-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 // CHECK-32-EX-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-32-EX: .omp.final.then: // CHECK-32-EX-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-32-EX-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-32-EX: .omp.final.done: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@__omp_outlined__40 // CHECK-32-EX-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 1073741859, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1) // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-32-EX: omp.dispatch.cond: // CHECK-32-EX-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-32-EX-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0 // CHECK-32-EX-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-32-EX: omp.dispatch.body: // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32-EX: omp.inner.for.cond: // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP225:![0-9]+]] // CHECK-32-EX-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP225]] // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32-EX: omp.inner.for.body: // CHECK-32-EX-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP225]] // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-EX-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP225]] // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32-EX: omp.body.continue: // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32-EX: omp.inner.for.inc: // CHECK-32-EX-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP225]] // CHECK-32-EX-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP11]], 1 // CHECK-32-EX-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP225]] // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP226:![0-9]+]] // CHECK-32-EX: omp.inner.for.end: // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-32-EX: omp.dispatch.inc: // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-32-EX: omp.dispatch.end: // CHECK-32-EX-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0 // CHECK-32-EX-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-32-EX: .omp.final.then: // CHECK-32-EX-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-32-EX-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-32-EX: .omp.final.done: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l93 // CHECK-32-EX-SAME: () #[[ATTR0]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32-EX: user_code.entry: // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4 // CHECK-32-EX-NEXT: call void @__omp_outlined__41(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR2]] // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-EX-NEXT: ret void // CHECK-32-EX: worker.exit: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@__omp_outlined__41 // CHECK-32-EX-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x i8*], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block() // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-32-EX: cond.true: // CHECK-32-EX-NEXT: br label [[COND_END:%.*]] // CHECK-32-EX: cond.false: // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: br label [[COND_END]] // CHECK-32-EX: cond.end: // CHECK-32-EX-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-32-EX-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32-EX: omp.inner.for.cond: // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP228:![0-9]+]] // CHECK-32-EX-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10 // CHECK-32-EX-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32-EX: omp.inner.for.body: // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP228]] // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP228]] // CHECK-32-EX-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to i8* // CHECK-32-EX-NEXT: store i8* [[TMP9]], i8** [[TMP8]], align 4, !llvm.access.group [[ACC_GRP228]] // CHECK-32-EX-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1 // CHECK-32-EX-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to i8* // CHECK-32-EX-NEXT: store i8* [[TMP11]], i8** [[TMP10]], align 4, !llvm.access.group [[ACC_GRP228]] // CHECK-32-EX-NEXT: [[TMP12:%.*]] = bitcast [2 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32)* @__omp_outlined__42 to i8*), i8* null, i8** [[TMP12]], i32 2), !llvm.access.group [[ACC_GRP228]] // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32-EX: omp.inner.for.inc: // CHECK-32-EX-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP228]] // CHECK-32-EX-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP228]] // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] // CHECK-32-EX-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP228]] // CHECK-32-EX-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP228]] // CHECK-32-EX-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP228]] // CHECK-32-EX-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] // CHECK-32-EX-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP228]] // CHECK-32-EX-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP228]] // CHECK-32-EX-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP228]] // CHECK-32-EX-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] // CHECK-32-EX-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP228]] // CHECK-32-EX-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP228]] // CHECK-32-EX-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP19]], 9 // CHECK-32-EX-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]] // CHECK-32-EX: cond.true5: // CHECK-32-EX-NEXT: br label [[COND_END7:%.*]] // CHECK-32-EX: cond.false6: // CHECK-32-EX-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP228]] // CHECK-32-EX-NEXT: br label [[COND_END7]] // CHECK-32-EX: cond.end7: // CHECK-32-EX-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP20]], [[COND_FALSE6]] ] // CHECK-32-EX-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP228]] // CHECK-32-EX-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP228]] // CHECK-32-EX-NEXT: store i32 [[TMP21]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP228]] // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP229:![0-9]+]] // CHECK-32-EX: omp.inner.for.end: // CHECK-32-EX-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-32-EX: omp.loop.exit: // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) // CHECK-32-EX-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0 // CHECK-32-EX-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-32-EX: .omp.final.then: // CHECK-32-EX-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-32-EX-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-32-EX: .omp.final.done: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@__omp_outlined__42 // CHECK-32-EX-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 1073741860, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1) // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-32-EX: omp.dispatch.cond: // CHECK-32-EX-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-32-EX-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0 // CHECK-32-EX-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-32-EX: omp.dispatch.body: // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32-EX: omp.inner.for.cond: // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP231:![0-9]+]] // CHECK-32-EX-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP231]] // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32-EX: omp.inner.for.body: // CHECK-32-EX-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP231]] // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-EX-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP231]] // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32-EX: omp.body.continue: // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32-EX: omp.inner.for.inc: // CHECK-32-EX-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP231]] // CHECK-32-EX-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP11]], 1 // CHECK-32-EX-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP231]] // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP232:![0-9]+]] // CHECK-32-EX: omp.inner.for.end: // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-32-EX: omp.dispatch.inc: // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-32-EX: omp.dispatch.end: // CHECK-32-EX-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0 // CHECK-32-EX-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-32-EX: .omp.final.then: // CHECK-32-EX-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-32-EX-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-32-EX: .omp.final.done: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l97 // CHECK-32-EX-SAME: () #[[ATTR0]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32-EX: user_code.entry: // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4 // CHECK-32-EX-NEXT: call void @__omp_outlined__43(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR2]] // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-EX-NEXT: ret void // CHECK-32-EX: worker.exit: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@__omp_outlined__43 // CHECK-32-EX-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x i8*], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block() // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-32-EX: cond.true: // CHECK-32-EX-NEXT: br label [[COND_END:%.*]] // CHECK-32-EX: cond.false: // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: br label [[COND_END]] // CHECK-32-EX: cond.end: // CHECK-32-EX-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-32-EX-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32-EX: omp.inner.for.cond: // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10 // CHECK-32-EX-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32-EX: omp.inner.for.body: // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to i8* // CHECK-32-EX-NEXT: store i8* [[TMP9]], i8** [[TMP8]], align 4 // CHECK-32-EX-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1 // CHECK-32-EX-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to i8* // CHECK-32-EX-NEXT: store i8* [[TMP11]], i8** [[TMP10]], align 4 // CHECK-32-EX-NEXT: [[TMP12:%.*]] = bitcast [2 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32)* @__omp_outlined__44 to i8*), i8* null, i8** [[TMP12]], i32 2) // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32-EX: omp.inner.for.inc: // CHECK-32-EX-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] // CHECK-32-EX-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] // CHECK-32-EX-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] // CHECK-32-EX-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP19]], 9 // CHECK-32-EX-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]] // CHECK-32-EX: cond.true5: // CHECK-32-EX-NEXT: br label [[COND_END7:%.*]] // CHECK-32-EX: cond.false6: // CHECK-32-EX-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: br label [[COND_END7]] // CHECK-32-EX: cond.end7: // CHECK-32-EX-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP20]], [[COND_FALSE6]] ] // CHECK-32-EX-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP21]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK-32-EX: omp.inner.for.end: // CHECK-32-EX-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-32-EX: omp.loop.exit: // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@__omp_outlined__44 // CHECK-32-EX-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 // CHECK-32-EX-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP3]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32-EX: omp.inner.for.cond: // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp ule i32 [[TMP5]], [[TMP6]] // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32-EX: omp.inner.for.body: // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-EX-NEXT: store i32 [[ADD]], i32* [[I]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32-EX: omp.body.continue: // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32-EX: omp.inner.for.inc: // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP8]], [[TMP9]] // CHECK-32-EX-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK-32-EX: omp.inner.for.end: // CHECK-32-EX-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-32-EX: omp.loop.exit: // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]]) // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l101 // CHECK-32-EX-SAME: () #[[ATTR0]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32-EX: user_code.entry: // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4 // CHECK-32-EX-NEXT: call void @__omp_outlined__45(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR2]] // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-EX-NEXT: ret void // CHECK-32-EX: worker.exit: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@__omp_outlined__45 // CHECK-32-EX-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x i8*], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block() // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-32-EX: cond.true: // CHECK-32-EX-NEXT: br label [[COND_END:%.*]] // CHECK-32-EX: cond.false: // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: br label [[COND_END]] // CHECK-32-EX: cond.end: // CHECK-32-EX-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-32-EX-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32-EX: omp.inner.for.cond: // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10 // CHECK-32-EX-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32-EX: omp.inner.for.body: // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to i8* // CHECK-32-EX-NEXT: store i8* [[TMP9]], i8** [[TMP8]], align 4 // CHECK-32-EX-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1 // CHECK-32-EX-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to i8* // CHECK-32-EX-NEXT: store i8* [[TMP11]], i8** [[TMP10]], align 4 // CHECK-32-EX-NEXT: [[TMP12:%.*]] = bitcast [2 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32)* @__omp_outlined__46 to i8*), i8* null, i8** [[TMP12]], i32 2) // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32-EX: omp.inner.for.inc: // CHECK-32-EX-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] // CHECK-32-EX-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] // CHECK-32-EX-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] // CHECK-32-EX-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP19]], 9 // CHECK-32-EX-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]] // CHECK-32-EX: cond.true5: // CHECK-32-EX-NEXT: br label [[COND_END7:%.*]] // CHECK-32-EX: cond.false6: // CHECK-32-EX-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: br label [[COND_END7]] // CHECK-32-EX: cond.end7: // CHECK-32-EX-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP20]], [[COND_FALSE6]] ] // CHECK-32-EX-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP21]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK-32-EX: omp.inner.for.end: // CHECK-32-EX-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-32-EX: omp.loop.exit: // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@__omp_outlined__46 // CHECK-32-EX-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 // CHECK-32-EX-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 9 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-32-EX: cond.true: // CHECK-32-EX-NEXT: br label [[COND_END:%.*]] // CHECK-32-EX: cond.false: // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: br label [[COND_END]] // CHECK-32-EX: cond.end: // CHECK-32-EX-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] // CHECK-32-EX-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32-EX: omp.inner.for.cond: // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] // CHECK-32-EX-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32-EX: omp.inner.for.body: // CHECK-32-EX-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-EX-NEXT: store i32 [[ADD]], i32* [[I]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32-EX: omp.body.continue: // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32-EX: omp.inner.for.inc: // CHECK-32-EX-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 // CHECK-32-EX-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK-32-EX: omp.inner.for.end: // CHECK-32-EX-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-32-EX: omp.loop.exit: // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]]) // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l105 // CHECK-32-EX-SAME: () #[[ATTR0]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32-EX: user_code.entry: // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4 // CHECK-32-EX-NEXT: call void @__omp_outlined__47(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR2]] // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-EX-NEXT: ret void // CHECK-32-EX: worker.exit: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@__omp_outlined__47 // CHECK-32-EX-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x i8*], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block() // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-32-EX: cond.true: // CHECK-32-EX-NEXT: br label [[COND_END:%.*]] // CHECK-32-EX: cond.false: // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: br label [[COND_END]] // CHECK-32-EX: cond.end: // CHECK-32-EX-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-32-EX-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32-EX: omp.inner.for.cond: // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10 // CHECK-32-EX-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32-EX: omp.inner.for.body: // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to i8* // CHECK-32-EX-NEXT: store i8* [[TMP9]], i8** [[TMP8]], align 4 // CHECK-32-EX-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1 // CHECK-32-EX-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to i8* // CHECK-32-EX-NEXT: store i8* [[TMP11]], i8** [[TMP10]], align 4 // CHECK-32-EX-NEXT: [[TMP12:%.*]] = bitcast [2 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32)* @__omp_outlined__48 to i8*), i8* null, i8** [[TMP12]], i32 2) // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32-EX: omp.inner.for.inc: // CHECK-32-EX-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] // CHECK-32-EX-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] // CHECK-32-EX-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] // CHECK-32-EX-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP19]], 9 // CHECK-32-EX-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]] // CHECK-32-EX: cond.true5: // CHECK-32-EX-NEXT: br label [[COND_END7:%.*]] // CHECK-32-EX: cond.false6: // CHECK-32-EX-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: br label [[COND_END7]] // CHECK-32-EX: cond.end7: // CHECK-32-EX-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP20]], [[COND_FALSE6]] ] // CHECK-32-EX-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP21]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK-32-EX: omp.inner.for.end: // CHECK-32-EX-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-32-EX: omp.loop.exit: // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@__omp_outlined__48 // CHECK-32-EX-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 // CHECK-32-EX-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP3]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32-EX: omp.inner.for.cond: // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp ule i32 [[TMP5]], [[TMP6]] // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32-EX: omp.inner.for.body: // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-EX-NEXT: store i32 [[ADD]], i32* [[I]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32-EX: omp.body.continue: // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32-EX: omp.inner.for.inc: // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP8]], [[TMP9]] // CHECK-32-EX-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK-32-EX: omp.inner.for.end: // CHECK-32-EX-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-32-EX: omp.loop.exit: // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]]) // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l109 // CHECK-32-EX-SAME: () #[[ATTR0]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32-EX: user_code.entry: // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4 // CHECK-32-EX-NEXT: call void @__omp_outlined__49(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR2]] // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-EX-NEXT: ret void // CHECK-32-EX: worker.exit: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@__omp_outlined__49 // CHECK-32-EX-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x i8*], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block() // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-32-EX: cond.true: // CHECK-32-EX-NEXT: br label [[COND_END:%.*]] // CHECK-32-EX: cond.false: // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: br label [[COND_END]] // CHECK-32-EX: cond.end: // CHECK-32-EX-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-32-EX-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32-EX: omp.inner.for.cond: // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10 // CHECK-32-EX-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32-EX: omp.inner.for.body: // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to i8* // CHECK-32-EX-NEXT: store i8* [[TMP9]], i8** [[TMP8]], align 4 // CHECK-32-EX-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1 // CHECK-32-EX-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to i8* // CHECK-32-EX-NEXT: store i8* [[TMP11]], i8** [[TMP10]], align 4 // CHECK-32-EX-NEXT: [[TMP12:%.*]] = bitcast [2 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32)* @__omp_outlined__50 to i8*), i8* null, i8** [[TMP12]], i32 2) // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32-EX: omp.inner.for.inc: // CHECK-32-EX-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] // CHECK-32-EX-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] // CHECK-32-EX-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] // CHECK-32-EX-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP19]], 9 // CHECK-32-EX-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]] // CHECK-32-EX: cond.true5: // CHECK-32-EX-NEXT: br label [[COND_END7:%.*]] // CHECK-32-EX: cond.false6: // CHECK-32-EX-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: br label [[COND_END7]] // CHECK-32-EX: cond.end7: // CHECK-32-EX-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP20]], [[COND_FALSE6]] ] // CHECK-32-EX-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP21]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK-32-EX: omp.inner.for.end: // CHECK-32-EX-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-32-EX: omp.loop.exit: // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@__omp_outlined__50 // CHECK-32-EX-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 1073741862, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1) // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-32-EX: omp.dispatch.cond: // CHECK-32-EX-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-32-EX-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0 // CHECK-32-EX-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-32-EX: omp.dispatch.body: // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32-EX: omp.inner.for.cond: // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP234:![0-9]+]] // CHECK-32-EX-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP234]] // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32-EX: omp.inner.for.body: // CHECK-32-EX-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP234]] // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-EX-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP234]] // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32-EX: omp.body.continue: // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32-EX: omp.inner.for.inc: // CHECK-32-EX-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP234]] // CHECK-32-EX-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP11]], 1 // CHECK-32-EX-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP234]] // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP235:![0-9]+]] // CHECK-32-EX: omp.inner.for.end: // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-32-EX: omp.dispatch.inc: // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-32-EX: omp.dispatch.end: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l113 // CHECK-32-EX-SAME: () #[[ATTR0]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32-EX: user_code.entry: // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4 // CHECK-32-EX-NEXT: call void @__omp_outlined__51(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR2]] // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-EX-NEXT: ret void // CHECK-32-EX: worker.exit: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@__omp_outlined__51 // CHECK-32-EX-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x i8*], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block() // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-32-EX: cond.true: // CHECK-32-EX-NEXT: br label [[COND_END:%.*]] // CHECK-32-EX: cond.false: // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: br label [[COND_END]] // CHECK-32-EX: cond.end: // CHECK-32-EX-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-32-EX-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32-EX: omp.inner.for.cond: // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10 // CHECK-32-EX-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32-EX: omp.inner.for.body: // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to i8* // CHECK-32-EX-NEXT: store i8* [[TMP9]], i8** [[TMP8]], align 4 // CHECK-32-EX-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1 // CHECK-32-EX-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to i8* // CHECK-32-EX-NEXT: store i8* [[TMP11]], i8** [[TMP10]], align 4 // CHECK-32-EX-NEXT: [[TMP12:%.*]] = bitcast [2 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32)* @__omp_outlined__52 to i8*), i8* null, i8** [[TMP12]], i32 2) // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32-EX: omp.inner.for.inc: // CHECK-32-EX-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] // CHECK-32-EX-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] // CHECK-32-EX-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] // CHECK-32-EX-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP19]], 9 // CHECK-32-EX-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]] // CHECK-32-EX: cond.true5: // CHECK-32-EX-NEXT: br label [[COND_END7:%.*]] // CHECK-32-EX: cond.false6: // CHECK-32-EX-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: br label [[COND_END7]] // CHECK-32-EX: cond.end7: // CHECK-32-EX-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP20]], [[COND_FALSE6]] ] // CHECK-32-EX-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP21]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK-32-EX: omp.inner.for.end: // CHECK-32-EX-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-32-EX: omp.loop.exit: // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@__omp_outlined__52 // CHECK-32-EX-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 1073741861, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1) // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-32-EX: omp.dispatch.cond: // CHECK-32-EX-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-32-EX-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0 // CHECK-32-EX-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-32-EX: omp.dispatch.body: // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32-EX: omp.inner.for.cond: // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP237:![0-9]+]] // CHECK-32-EX-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP237]] // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32-EX: omp.inner.for.body: // CHECK-32-EX-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP237]] // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-EX-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP237]] // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32-EX: omp.body.continue: // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32-EX: omp.inner.for.inc: // CHECK-32-EX-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP237]] // CHECK-32-EX-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP11]], 1 // CHECK-32-EX-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP237]] // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP238:![0-9]+]] // CHECK-32-EX: omp.inner.for.end: // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-32-EX: omp.dispatch.inc: // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-32-EX: omp.dispatch.end: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l117 // CHECK-32-EX-SAME: () #[[ATTR0]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32-EX: user_code.entry: // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4 // CHECK-32-EX-NEXT: call void @__omp_outlined__53(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR2]] // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-EX-NEXT: ret void // CHECK-32-EX: worker.exit: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@__omp_outlined__53 // CHECK-32-EX-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x i8*], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block() // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-32-EX: cond.true: // CHECK-32-EX-NEXT: br label [[COND_END:%.*]] // CHECK-32-EX: cond.false: // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: br label [[COND_END]] // CHECK-32-EX: cond.end: // CHECK-32-EX-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-32-EX-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32-EX: omp.inner.for.cond: // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10 // CHECK-32-EX-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32-EX: omp.inner.for.body: // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to i8* // CHECK-32-EX-NEXT: store i8* [[TMP9]], i8** [[TMP8]], align 4 // CHECK-32-EX-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1 // CHECK-32-EX-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to i8* // CHECK-32-EX-NEXT: store i8* [[TMP11]], i8** [[TMP10]], align 4 // CHECK-32-EX-NEXT: [[TMP12:%.*]] = bitcast [2 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32)* @__omp_outlined__54 to i8*), i8* null, i8** [[TMP12]], i32 2) // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32-EX: omp.inner.for.inc: // CHECK-32-EX-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] // CHECK-32-EX-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] // CHECK-32-EX-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] // CHECK-32-EX-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP19]], 9 // CHECK-32-EX-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]] // CHECK-32-EX: cond.true5: // CHECK-32-EX-NEXT: br label [[COND_END7:%.*]] // CHECK-32-EX: cond.false6: // CHECK-32-EX-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: br label [[COND_END7]] // CHECK-32-EX: cond.end7: // CHECK-32-EX-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP20]], [[COND_FALSE6]] ] // CHECK-32-EX-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP21]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK-32-EX: omp.inner.for.end: // CHECK-32-EX-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-32-EX: omp.loop.exit: // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@__omp_outlined__54 // CHECK-32-EX-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 1073741859, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1) // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-32-EX: omp.dispatch.cond: // CHECK-32-EX-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-32-EX-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0 // CHECK-32-EX-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-32-EX: omp.dispatch.body: // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32-EX: omp.inner.for.cond: // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP240:![0-9]+]] // CHECK-32-EX-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP240]] // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32-EX: omp.inner.for.body: // CHECK-32-EX-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP240]] // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-EX-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP240]] // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32-EX: omp.body.continue: // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32-EX: omp.inner.for.inc: // CHECK-32-EX-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP240]] // CHECK-32-EX-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP11]], 1 // CHECK-32-EX-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP240]] // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP241:![0-9]+]] // CHECK-32-EX: omp.inner.for.end: // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-32-EX: omp.dispatch.inc: // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-32-EX: omp.dispatch.end: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l121 // CHECK-32-EX-SAME: () #[[ATTR0]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32-EX: user_code.entry: // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4 // CHECK-32-EX-NEXT: call void @__omp_outlined__55(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR2]] // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-EX-NEXT: ret void // CHECK-32-EX: worker.exit: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@__omp_outlined__55 // CHECK-32-EX-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x i8*], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block() // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-32-EX: cond.true: // CHECK-32-EX-NEXT: br label [[COND_END:%.*]] // CHECK-32-EX: cond.false: // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: br label [[COND_END]] // CHECK-32-EX: cond.end: // CHECK-32-EX-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-32-EX-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32-EX: omp.inner.for.cond: // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10 // CHECK-32-EX-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32-EX: omp.inner.for.body: // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to i8* // CHECK-32-EX-NEXT: store i8* [[TMP9]], i8** [[TMP8]], align 4 // CHECK-32-EX-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1 // CHECK-32-EX-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to i8* // CHECK-32-EX-NEXT: store i8* [[TMP11]], i8** [[TMP10]], align 4 // CHECK-32-EX-NEXT: [[TMP12:%.*]] = bitcast [2 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32)* @__omp_outlined__56 to i8*), i8* null, i8** [[TMP12]], i32 2) // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32-EX: omp.inner.for.inc: // CHECK-32-EX-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] // CHECK-32-EX-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] // CHECK-32-EX-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] // CHECK-32-EX-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP19]], 9 // CHECK-32-EX-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]] // CHECK-32-EX: cond.true5: // CHECK-32-EX-NEXT: br label [[COND_END7:%.*]] // CHECK-32-EX: cond.false6: // CHECK-32-EX-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: br label [[COND_END7]] // CHECK-32-EX: cond.end7: // CHECK-32-EX-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP20]], [[COND_FALSE6]] ] // CHECK-32-EX-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP21]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK-32-EX: omp.inner.for.end: // CHECK-32-EX-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-32-EX: omp.loop.exit: // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@__omp_outlined__56 // CHECK-32-EX-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 1073741860, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1) // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-32-EX: omp.dispatch.cond: // CHECK-32-EX-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-32-EX-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0 // CHECK-32-EX-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-32-EX: omp.dispatch.body: // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32-EX: omp.inner.for.cond: // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP243:![0-9]+]] // CHECK-32-EX-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP243]] // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32-EX: omp.inner.for.body: // CHECK-32-EX-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP243]] // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-EX-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP243]] // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32-EX: omp.body.continue: // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32-EX: omp.inner.for.inc: // CHECK-32-EX-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP243]] // CHECK-32-EX-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP11]], 1 // CHECK-32-EX-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP243]] // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP244:![0-9]+]] // CHECK-32-EX: omp.inner.for.end: // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-32-EX: omp.dispatch.inc: // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-32-EX: omp.dispatch.end: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l125 // CHECK-32-EX-SAME: () #[[ATTR0]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32-EX: user_code.entry: // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4 // CHECK-32-EX-NEXT: call void @__omp_outlined__57(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR2]] // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-EX-NEXT: ret void // CHECK-32-EX: worker.exit: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@__omp_outlined__57 // CHECK-32-EX-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x i8*], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block() // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-32-EX: cond.true: // CHECK-32-EX-NEXT: br label [[COND_END:%.*]] // CHECK-32-EX: cond.false: // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: br label [[COND_END]] // CHECK-32-EX: cond.end: // CHECK-32-EX-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-32-EX-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32-EX: omp.inner.for.cond: // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10 // CHECK-32-EX-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32-EX: omp.inner.for.body: // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to i8* // CHECK-32-EX-NEXT: store i8* [[TMP9]], i8** [[TMP8]], align 4 // CHECK-32-EX-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1 // CHECK-32-EX-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to i8* // CHECK-32-EX-NEXT: store i8* [[TMP11]], i8** [[TMP10]], align 4 // CHECK-32-EX-NEXT: [[TMP12:%.*]] = bitcast [2 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32)* @__omp_outlined__58 to i8*), i8* null, i8** [[TMP12]], i32 2) // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32-EX: omp.inner.for.inc: // CHECK-32-EX-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] // CHECK-32-EX-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] // CHECK-32-EX-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] // CHECK-32-EX-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP19]], 9 // CHECK-32-EX-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]] // CHECK-32-EX: cond.true5: // CHECK-32-EX-NEXT: br label [[COND_END7:%.*]] // CHECK-32-EX: cond.false6: // CHECK-32-EX-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: br label [[COND_END7]] // CHECK-32-EX: cond.end7: // CHECK-32-EX-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP20]], [[COND_FALSE6]] ] // CHECK-32-EX-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP21]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK-32-EX: omp.inner.for.end: // CHECK-32-EX-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-32-EX: omp.loop.exit: // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@__omp_outlined__58 // CHECK-32-EX-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 // CHECK-32-EX-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP3]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32-EX: omp.inner.for.cond: // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp ule i32 [[TMP5]], [[TMP6]] // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32-EX: omp.inner.for.body: // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-EX-NEXT: store i32 [[ADD]], i32* [[I]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32-EX: omp.body.continue: // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32-EX: omp.inner.for.inc: // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP8]], [[TMP9]] // CHECK-32-EX-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK-32-EX: omp.inner.for.end: // CHECK-32-EX-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-32-EX: omp.loop.exit: // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]]) // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l130 // CHECK-32-EX-SAME: () #[[ATTR0]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32-EX: user_code.entry: // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4 // CHECK-32-EX-NEXT: call void @__omp_outlined__59(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR2]] // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-EX-NEXT: ret void // CHECK-32-EX: worker.exit: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@__omp_outlined__59 // CHECK-32-EX-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x i8*], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block() // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-32-EX: cond.true: // CHECK-32-EX-NEXT: br label [[COND_END:%.*]] // CHECK-32-EX: cond.false: // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: br label [[COND_END]] // CHECK-32-EX: cond.end: // CHECK-32-EX-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-32-EX-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32-EX: omp.inner.for.cond: // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10 // CHECK-32-EX-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32-EX: omp.inner.for.body: // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to i8* // CHECK-32-EX-NEXT: store i8* [[TMP9]], i8** [[TMP8]], align 4 // CHECK-32-EX-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1 // CHECK-32-EX-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to i8* // CHECK-32-EX-NEXT: store i8* [[TMP11]], i8** [[TMP10]], align 4 // CHECK-32-EX-NEXT: [[TMP12:%.*]] = bitcast [2 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32)* @__omp_outlined__60 to i8*), i8* null, i8** [[TMP12]], i32 2) // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32-EX: omp.inner.for.inc: // CHECK-32-EX-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] // CHECK-32-EX-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] // CHECK-32-EX-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] // CHECK-32-EX-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP19]], 9 // CHECK-32-EX-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]] // CHECK-32-EX: cond.true5: // CHECK-32-EX-NEXT: br label [[COND_END7:%.*]] // CHECK-32-EX: cond.false6: // CHECK-32-EX-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: br label [[COND_END7]] // CHECK-32-EX: cond.end7: // CHECK-32-EX-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP20]], [[COND_FALSE6]] ] // CHECK-32-EX-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP21]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK-32-EX: omp.inner.for.end: // CHECK-32-EX-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-32-EX: omp.loop.exit: // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@__omp_outlined__60 // CHECK-32-EX-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 // CHECK-32-EX-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 9 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-32-EX: cond.true: // CHECK-32-EX-NEXT: br label [[COND_END:%.*]] // CHECK-32-EX: cond.false: // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: br label [[COND_END]] // CHECK-32-EX: cond.end: // CHECK-32-EX-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ] // CHECK-32-EX-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32-EX: omp.inner.for.cond: // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] // CHECK-32-EX-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32-EX: omp.inner.for.body: // CHECK-32-EX-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-EX-NEXT: store i32 [[ADD]], i32* [[I]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32-EX: omp.body.continue: // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32-EX: omp.inner.for.inc: // CHECK-32-EX-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1 // CHECK-32-EX-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK-32-EX: omp.inner.for.end: // CHECK-32-EX-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-32-EX: omp.loop.exit: // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]]) // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l135 // CHECK-32-EX-SAME: () #[[ATTR0]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32-EX: user_code.entry: // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4 // CHECK-32-EX-NEXT: call void @__omp_outlined__61(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR2]] // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-EX-NEXT: ret void // CHECK-32-EX: worker.exit: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@__omp_outlined__61 // CHECK-32-EX-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x i8*], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block() // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-32-EX: cond.true: // CHECK-32-EX-NEXT: br label [[COND_END:%.*]] // CHECK-32-EX: cond.false: // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: br label [[COND_END]] // CHECK-32-EX: cond.end: // CHECK-32-EX-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-32-EX-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32-EX: omp.inner.for.cond: // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10 // CHECK-32-EX-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32-EX: omp.inner.for.body: // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to i8* // CHECK-32-EX-NEXT: store i8* [[TMP9]], i8** [[TMP8]], align 4 // CHECK-32-EX-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1 // CHECK-32-EX-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to i8* // CHECK-32-EX-NEXT: store i8* [[TMP11]], i8** [[TMP10]], align 4 // CHECK-32-EX-NEXT: [[TMP12:%.*]] = bitcast [2 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32)* @__omp_outlined__62 to i8*), i8* null, i8** [[TMP12]], i32 2) // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32-EX: omp.inner.for.inc: // CHECK-32-EX-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] // CHECK-32-EX-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] // CHECK-32-EX-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] // CHECK-32-EX-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP19]], 9 // CHECK-32-EX-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]] // CHECK-32-EX: cond.true5: // CHECK-32-EX-NEXT: br label [[COND_END7:%.*]] // CHECK-32-EX: cond.false6: // CHECK-32-EX-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: br label [[COND_END7]] // CHECK-32-EX: cond.end7: // CHECK-32-EX-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP20]], [[COND_FALSE6]] ] // CHECK-32-EX-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP21]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK-32-EX: omp.inner.for.end: // CHECK-32-EX-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-32-EX: omp.loop.exit: // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@__omp_outlined__62 // CHECK-32-EX-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4 // CHECK-32-EX-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP3]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32-EX: omp.inner.for.cond: // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp ule i32 [[TMP5]], [[TMP6]] // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32-EX: omp.inner.for.body: // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-EX-NEXT: store i32 [[ADD]], i32* [[I]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32-EX: omp.body.continue: // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32-EX: omp.inner.for.inc: // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP8]], [[TMP9]] // CHECK-32-EX-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK-32-EX: omp.inner.for.end: // CHECK-32-EX-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-32-EX: omp.loop.exit: // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]]) // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l140 // CHECK-32-EX-SAME: () #[[ATTR0]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32-EX: user_code.entry: // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4 // CHECK-32-EX-NEXT: call void @__omp_outlined__63(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR2]] // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-EX-NEXT: ret void // CHECK-32-EX: worker.exit: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@__omp_outlined__63 // CHECK-32-EX-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x i8*], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block() // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-32-EX: cond.true: // CHECK-32-EX-NEXT: br label [[COND_END:%.*]] // CHECK-32-EX: cond.false: // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: br label [[COND_END]] // CHECK-32-EX: cond.end: // CHECK-32-EX-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-32-EX-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32-EX: omp.inner.for.cond: // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10 // CHECK-32-EX-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32-EX: omp.inner.for.body: // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to i8* // CHECK-32-EX-NEXT: store i8* [[TMP9]], i8** [[TMP8]], align 4 // CHECK-32-EX-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1 // CHECK-32-EX-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to i8* // CHECK-32-EX-NEXT: store i8* [[TMP11]], i8** [[TMP10]], align 4 // CHECK-32-EX-NEXT: [[TMP12:%.*]] = bitcast [2 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32)* @__omp_outlined__64 to i8*), i8* null, i8** [[TMP12]], i32 2) // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32-EX: omp.inner.for.inc: // CHECK-32-EX-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] // CHECK-32-EX-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] // CHECK-32-EX-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] // CHECK-32-EX-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP19]], 9 // CHECK-32-EX-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]] // CHECK-32-EX: cond.true5: // CHECK-32-EX-NEXT: br label [[COND_END7:%.*]] // CHECK-32-EX: cond.false6: // CHECK-32-EX-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: br label [[COND_END7]] // CHECK-32-EX: cond.end7: // CHECK-32-EX-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP20]], [[COND_FALSE6]] ] // CHECK-32-EX-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP21]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK-32-EX: omp.inner.for.end: // CHECK-32-EX-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-32-EX: omp.loop.exit: // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@__omp_outlined__64 // CHECK-32-EX-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 1073741862, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1) // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-32-EX: omp.dispatch.cond: // CHECK-32-EX-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-32-EX-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0 // CHECK-32-EX-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-32-EX: omp.dispatch.body: // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32-EX: omp.inner.for.cond: // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP246:![0-9]+]] // CHECK-32-EX-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP246]] // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32-EX: omp.inner.for.body: // CHECK-32-EX-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP246]] // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-EX-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP246]] // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32-EX: omp.body.continue: // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32-EX: omp.inner.for.inc: // CHECK-32-EX-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP246]] // CHECK-32-EX-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP11]], 1 // CHECK-32-EX-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP246]] // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP247:![0-9]+]] // CHECK-32-EX: omp.inner.for.end: // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-32-EX: omp.dispatch.inc: // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-32-EX: omp.dispatch.end: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l145 // CHECK-32-EX-SAME: () #[[ATTR0]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32-EX: user_code.entry: // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4 // CHECK-32-EX-NEXT: call void @__omp_outlined__65(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR2]] // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-EX-NEXT: ret void // CHECK-32-EX: worker.exit: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@__omp_outlined__65 // CHECK-32-EX-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x i8*], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block() // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-32-EX: cond.true: // CHECK-32-EX-NEXT: br label [[COND_END:%.*]] // CHECK-32-EX: cond.false: // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: br label [[COND_END]] // CHECK-32-EX: cond.end: // CHECK-32-EX-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-32-EX-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32-EX: omp.inner.for.cond: // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10 // CHECK-32-EX-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32-EX: omp.inner.for.body: // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to i8* // CHECK-32-EX-NEXT: store i8* [[TMP9]], i8** [[TMP8]], align 4 // CHECK-32-EX-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1 // CHECK-32-EX-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to i8* // CHECK-32-EX-NEXT: store i8* [[TMP11]], i8** [[TMP10]], align 4 // CHECK-32-EX-NEXT: [[TMP12:%.*]] = bitcast [2 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32)* @__omp_outlined__66 to i8*), i8* null, i8** [[TMP12]], i32 2) // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32-EX: omp.inner.for.inc: // CHECK-32-EX-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] // CHECK-32-EX-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] // CHECK-32-EX-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] // CHECK-32-EX-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP19]], 9 // CHECK-32-EX-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]] // CHECK-32-EX: cond.true5: // CHECK-32-EX-NEXT: br label [[COND_END7:%.*]] // CHECK-32-EX: cond.false6: // CHECK-32-EX-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: br label [[COND_END7]] // CHECK-32-EX: cond.end7: // CHECK-32-EX-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP20]], [[COND_FALSE6]] ] // CHECK-32-EX-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP21]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK-32-EX: omp.inner.for.end: // CHECK-32-EX-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-32-EX: omp.loop.exit: // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@__omp_outlined__66 // CHECK-32-EX-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 1073741861, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1) // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-32-EX: omp.dispatch.cond: // CHECK-32-EX-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-32-EX-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0 // CHECK-32-EX-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-32-EX: omp.dispatch.body: // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32-EX: omp.inner.for.cond: // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP249:![0-9]+]] // CHECK-32-EX-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP249]] // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32-EX: omp.inner.for.body: // CHECK-32-EX-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP249]] // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-EX-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP249]] // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32-EX: omp.body.continue: // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32-EX: omp.inner.for.inc: // CHECK-32-EX-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP249]] // CHECK-32-EX-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP11]], 1 // CHECK-32-EX-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP249]] // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP250:![0-9]+]] // CHECK-32-EX: omp.inner.for.end: // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-32-EX: omp.dispatch.inc: // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-32-EX: omp.dispatch.end: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l150 // CHECK-32-EX-SAME: () #[[ATTR0]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32-EX: user_code.entry: // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4 // CHECK-32-EX-NEXT: call void @__omp_outlined__67(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR2]] // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-EX-NEXT: ret void // CHECK-32-EX: worker.exit: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@__omp_outlined__67 // CHECK-32-EX-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x i8*], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block() // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-32-EX: cond.true: // CHECK-32-EX-NEXT: br label [[COND_END:%.*]] // CHECK-32-EX: cond.false: // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: br label [[COND_END]] // CHECK-32-EX: cond.end: // CHECK-32-EX-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-32-EX-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32-EX: omp.inner.for.cond: // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10 // CHECK-32-EX-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32-EX: omp.inner.for.body: // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to i8* // CHECK-32-EX-NEXT: store i8* [[TMP9]], i8** [[TMP8]], align 4 // CHECK-32-EX-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1 // CHECK-32-EX-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to i8* // CHECK-32-EX-NEXT: store i8* [[TMP11]], i8** [[TMP10]], align 4 // CHECK-32-EX-NEXT: [[TMP12:%.*]] = bitcast [2 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32)* @__omp_outlined__68 to i8*), i8* null, i8** [[TMP12]], i32 2) // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32-EX: omp.inner.for.inc: // CHECK-32-EX-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] // CHECK-32-EX-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] // CHECK-32-EX-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] // CHECK-32-EX-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP19]], 9 // CHECK-32-EX-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]] // CHECK-32-EX: cond.true5: // CHECK-32-EX-NEXT: br label [[COND_END7:%.*]] // CHECK-32-EX: cond.false6: // CHECK-32-EX-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: br label [[COND_END7]] // CHECK-32-EX: cond.end7: // CHECK-32-EX-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP20]], [[COND_FALSE6]] ] // CHECK-32-EX-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP21]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK-32-EX: omp.inner.for.end: // CHECK-32-EX-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-32-EX: omp.loop.exit: // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@__omp_outlined__68 // CHECK-32-EX-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 1073741859, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1) // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-32-EX: omp.dispatch.cond: // CHECK-32-EX-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-32-EX-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0 // CHECK-32-EX-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-32-EX: omp.dispatch.body: // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32-EX: omp.inner.for.cond: // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP252:![0-9]+]] // CHECK-32-EX-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP252]] // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32-EX: omp.inner.for.body: // CHECK-32-EX-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP252]] // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-EX-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP252]] // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32-EX: omp.body.continue: // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32-EX: omp.inner.for.inc: // CHECK-32-EX-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP252]] // CHECK-32-EX-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP11]], 1 // CHECK-32-EX-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP252]] // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP253:![0-9]+]] // CHECK-32-EX: omp.inner.for.end: // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-32-EX: omp.dispatch.inc: // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-32-EX: omp.dispatch.end: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l155 // CHECK-32-EX-SAME: () #[[ATTR0]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTZERO_ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32-EX: user_code.entry: // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTZERO_ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP1]], i32* [[DOTTHREADID_TEMP_]], align 4 // CHECK-32-EX-NEXT: call void @__omp_outlined__69(i32* [[DOTTHREADID_TEMP_]], i32* [[DOTZERO_ADDR]]) #[[ATTR2]] // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-EX-NEXT: ret void // CHECK-32-EX: worker.exit: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@__omp_outlined__69 // CHECK-32-EX-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [2 x i8*], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[NVPTX_NUM_THREADS:%.*]] = call i32 @__kmpc_get_hardware_num_threads_in_block() // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[NVPTX_NUM_THREADS]]) // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-32-EX: cond.true: // CHECK-32-EX-NEXT: br label [[COND_END:%.*]] // CHECK-32-EX: cond.false: // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: br label [[COND_END]] // CHECK-32-EX: cond.end: // CHECK-32-EX-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-32-EX-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32-EX: omp.inner.for.cond: // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP5]], 10 // CHECK-32-EX-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32-EX: omp.inner.for.body: // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = inttoptr i32 [[TMP6]] to i8* // CHECK-32-EX-NEXT: store i8* [[TMP9]], i8** [[TMP8]], align 4 // CHECK-32-EX-NEXT: [[TMP10:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1 // CHECK-32-EX-NEXT: [[TMP11:%.*]] = inttoptr i32 [[TMP7]] to i8* // CHECK-32-EX-NEXT: store i8* [[TMP11]], i8** [[TMP10]], align 4 // CHECK-32-EX-NEXT: [[TMP12:%.*]] = bitcast [2 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32)* @__omp_outlined__70 to i8*), i8* null, i8** [[TMP12]], i32 2) // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32-EX: omp.inner.for.inc: // CHECK-32-EX-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] // CHECK-32-EX-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] // CHECK-32-EX-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] // CHECK-32-EX-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP19]], 9 // CHECK-32-EX-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]] // CHECK-32-EX: cond.true5: // CHECK-32-EX-NEXT: br label [[COND_END7:%.*]] // CHECK-32-EX: cond.false6: // CHECK-32-EX-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: br label [[COND_END7]] // CHECK-32-EX: cond.end7: // CHECK-32-EX-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP20]], [[COND_FALSE6]] ] // CHECK-32-EX-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP21]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK-32-EX: omp.inner.for.end: // CHECK-32-EX-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-32-EX: omp.loop.exit: // CHECK-32-EX-NEXT: call void @__kmpc_distribute_static_fini(%struct.ident_t* @[[GLOB2]], i32 [[TMP1]]) // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@__omp_outlined__70 // CHECK-32-EX-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32 1073741860, i32 [[TMP2]], i32 [[TMP3]], i32 1, i32 1) // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-32-EX: omp.dispatch.cond: // CHECK-32-EX-NEXT: [[TMP6:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-32-EX-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP6]], 0 // CHECK-32-EX-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-32-EX: omp.dispatch.body: // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32-EX: omp.inner.for.cond: // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP255:![0-9]+]] // CHECK-32-EX-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP255]] // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32-EX: omp.inner.for.body: // CHECK-32-EX-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP255]] // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-EX-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP255]] // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32-EX: omp.body.continue: // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32-EX: omp.inner.for.inc: // CHECK-32-EX-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP255]] // CHECK-32-EX-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP11]], 1 // CHECK-32-EX-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP255]] // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP256:![0-9]+]] // CHECK-32-EX: omp.inner.for.end: // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-32-EX: omp.dispatch.inc: // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-32-EX: omp.dispatch.end: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l160 // CHECK-32-EX-SAME: (i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR8:[0-9]+]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 4 // CHECK-32-EX-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 // CHECK-32-EX-NEXT: [[CONV:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR__ADDR]] to i8* // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32-EX: user_code.entry: // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i8, i8* [[CONV]], align 1 // CHECK-32-EX-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP2]] to i1 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = zext i1 [[TOBOOL]] to i32 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 [[TMP3]], i32 -1, i32 -1, i8* bitcast (void (i32*, i32*)* @__omp_outlined__71 to i8*), i8* null, i8** [[TMP4]], i32 0) // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-EX-NEXT: ret void // CHECK-32-EX: worker.exit: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@__omp_outlined__71 // CHECK-32-EX-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-EX-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-32-EX: omp.dispatch.cond: // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-32-EX: cond.true: // CHECK-32-EX-NEXT: br label [[COND_END:%.*]] // CHECK-32-EX: cond.false: // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: br label [[COND_END]] // CHECK-32-EX: cond.end: // CHECK-32-EX-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-32-EX-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] // CHECK-32-EX-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-32-EX: omp.dispatch.body: // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32-EX: omp.inner.for.cond: // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] // CHECK-32-EX-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32-EX: omp.inner.for.body: // CHECK-32-EX-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-EX-NEXT: store i32 [[ADD]], i32* [[I]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32-EX: omp.body.continue: // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32-EX: omp.inner.for.inc: // CHECK-32-EX-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 // CHECK-32-EX-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK-32-EX: omp.inner.for.end: // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-32-EX: omp.dispatch.inc: // CHECK-32-EX-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] // CHECK-32-EX-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] // CHECK-32-EX-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-32-EX: omp.dispatch.end: // CHECK-32-EX-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l163 // CHECK-32-EX-SAME: () #[[ATTR8]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32-EX: user_code.entry: // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-EX-NEXT: [[TMP2:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*)* @__omp_outlined__72 to i8*), i8* null, i8** [[TMP2]], i32 0) // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-EX-NEXT: ret void // CHECK-32-EX: worker.exit: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@__omp_outlined__72 // CHECK-32-EX-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-EX-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-32-EX: cond.true: // CHECK-32-EX-NEXT: br label [[COND_END:%.*]] // CHECK-32-EX: cond.false: // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: br label [[COND_END]] // CHECK-32-EX: cond.end: // CHECK-32-EX-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-32-EX-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32-EX: omp.inner.for.cond: // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] // CHECK-32-EX-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32-EX: omp.inner.for.body: // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-EX-NEXT: store i32 [[ADD]], i32* [[I]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32-EX: omp.body.continue: // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32-EX: omp.inner.for.inc: // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 1 // CHECK-32-EX-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK-32-EX: omp.inner.for.end: // CHECK-32-EX-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-32-EX: omp.loop.exit: // CHECK-32-EX-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l166 // CHECK-32-EX-SAME: () #[[ATTR8]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32-EX: user_code.entry: // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-EX-NEXT: [[TMP2:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*)* @__omp_outlined__73 to i8*), i8* null, i8** [[TMP2]], i32 0) // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-EX-NEXT: ret void // CHECK-32-EX: worker.exit: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@__omp_outlined__73 // CHECK-32-EX-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-EX-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-32-EX: omp.dispatch.cond: // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-32-EX: cond.true: // CHECK-32-EX-NEXT: br label [[COND_END:%.*]] // CHECK-32-EX: cond.false: // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: br label [[COND_END]] // CHECK-32-EX: cond.end: // CHECK-32-EX-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-32-EX-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] // CHECK-32-EX-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-32-EX: omp.dispatch.body: // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32-EX: omp.inner.for.cond: // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] // CHECK-32-EX-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32-EX: omp.inner.for.body: // CHECK-32-EX-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-EX-NEXT: store i32 [[ADD]], i32* [[I]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32-EX: omp.body.continue: // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32-EX: omp.inner.for.inc: // CHECK-32-EX-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 // CHECK-32-EX-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK-32-EX: omp.inner.for.end: // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-32-EX: omp.dispatch.inc: // CHECK-32-EX-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] // CHECK-32-EX-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] // CHECK-32-EX-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-32-EX: omp.dispatch.end: // CHECK-32-EX-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l169 // CHECK-32-EX-SAME: () #[[ATTR8]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32-EX: user_code.entry: // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-EX-NEXT: [[TMP2:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*)* @__omp_outlined__74 to i8*), i8* null, i8** [[TMP2]], i32 0) // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-EX-NEXT: ret void // CHECK-32-EX: worker.exit: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@__omp_outlined__74 // CHECK-32-EX-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1073741862, i32 0, i32 9, i32 1, i32 1) // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-32-EX: omp.dispatch.cond: // CHECK-32-EX-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-32-EX-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0 // CHECK-32-EX-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-32-EX: omp.dispatch.body: // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP3]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32-EX: omp.inner.for.cond: // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP258:![0-9]+]] // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP258]] // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]] // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32-EX: omp.inner.for.body: // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP258]] // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-EX-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP258]] // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32-EX: omp.body.continue: // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32-EX: omp.inner.for.inc: // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP258]] // CHECK-32-EX-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP7]], 1 // CHECK-32-EX-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP258]] // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP259:![0-9]+]] // CHECK-32-EX: omp.inner.for.end: // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-32-EX: omp.dispatch.inc: // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-32-EX: omp.dispatch.end: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l172 // CHECK-32-EX-SAME: () #[[ATTR8]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32-EX: user_code.entry: // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-EX-NEXT: [[TMP2:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*)* @__omp_outlined__75 to i8*), i8* null, i8** [[TMP2]], i32 0) // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-EX-NEXT: ret void // CHECK-32-EX: worker.exit: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@__omp_outlined__75 // CHECK-32-EX-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1073741861, i32 0, i32 9, i32 1, i32 1) // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-32-EX: omp.dispatch.cond: // CHECK-32-EX-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-32-EX-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0 // CHECK-32-EX-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-32-EX: omp.dispatch.body: // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP3]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32-EX: omp.inner.for.cond: // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP261:![0-9]+]] // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP261]] // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]] // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32-EX: omp.inner.for.body: // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP261]] // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-EX-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP261]] // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32-EX: omp.body.continue: // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32-EX: omp.inner.for.inc: // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP261]] // CHECK-32-EX-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP7]], 1 // CHECK-32-EX-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP261]] // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP262:![0-9]+]] // CHECK-32-EX: omp.inner.for.end: // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-32-EX: omp.dispatch.inc: // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-32-EX: omp.dispatch.end: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l175 // CHECK-32-EX-SAME: () #[[ATTR8]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32-EX: user_code.entry: // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-EX-NEXT: [[TMP2:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*)* @__omp_outlined__76 to i8*), i8* null, i8** [[TMP2]], i32 0) // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-EX-NEXT: ret void // CHECK-32-EX: worker.exit: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@__omp_outlined__76 // CHECK-32-EX-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1073741859, i32 0, i32 9, i32 1, i32 1) // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-32-EX: omp.dispatch.cond: // CHECK-32-EX-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-32-EX-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0 // CHECK-32-EX-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-32-EX: omp.dispatch.body: // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP3]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32-EX: omp.inner.for.cond: // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP264:![0-9]+]] // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP264]] // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]] // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32-EX: omp.inner.for.body: // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP264]] // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-EX-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP264]] // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32-EX: omp.body.continue: // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32-EX: omp.inner.for.inc: // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP264]] // CHECK-32-EX-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP7]], 1 // CHECK-32-EX-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP264]] // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP265:![0-9]+]] // CHECK-32-EX: omp.inner.for.end: // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-32-EX: omp.dispatch.inc: // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-32-EX: omp.dispatch.end: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l178 // CHECK-32-EX-SAME: () #[[ATTR8]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32-EX: user_code.entry: // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-EX-NEXT: [[TMP2:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*)* @__omp_outlined__77 to i8*), i8* null, i8** [[TMP2]], i32 0) // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-EX-NEXT: ret void // CHECK-32-EX: worker.exit: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@__omp_outlined__77 // CHECK-32-EX-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1073741860, i32 0, i32 9, i32 1, i32 1) // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-32-EX: omp.dispatch.cond: // CHECK-32-EX-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-32-EX-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0 // CHECK-32-EX-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-32-EX: omp.dispatch.body: // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP3]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32-EX: omp.inner.for.cond: // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP267:![0-9]+]] // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP267]] // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]] // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32-EX: omp.inner.for.body: // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP267]] // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-EX-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP267]] // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32-EX: omp.body.continue: // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32-EX: omp.inner.for.inc: // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP267]] // CHECK-32-EX-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP7]], 1 // CHECK-32-EX-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP267]] // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP268:![0-9]+]] // CHECK-32-EX: omp.inner.for.end: // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-32-EX: omp.dispatch.inc: // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-32-EX: omp.dispatch.end: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l181 // CHECK-32-EX-SAME: (i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR8]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 4 // CHECK-32-EX-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 // CHECK-32-EX-NEXT: [[CONV:%.*]] = bitcast i32* [[DOTCAPTURE_EXPR__ADDR]] to i8* // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32-EX: user_code.entry: // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i8, i8* [[CONV]], align 1 // CHECK-32-EX-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP2]] to i1 // CHECK-32-EX-NEXT: [[TMP3:%.*]] = zext i1 [[TOBOOL]] to i32 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 [[TMP3]], i32 -1, i32 -1, i8* bitcast (void (i32*, i32*)* @__omp_outlined__78 to i8*), i8* null, i8** [[TMP4]], i32 0) // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-EX-NEXT: ret void // CHECK-32-EX: worker.exit: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@__omp_outlined__78 // CHECK-32-EX-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-EX-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-32-EX: omp.dispatch.cond: // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-32-EX: cond.true: // CHECK-32-EX-NEXT: br label [[COND_END:%.*]] // CHECK-32-EX: cond.false: // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: br label [[COND_END]] // CHECK-32-EX: cond.end: // CHECK-32-EX-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-32-EX-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] // CHECK-32-EX-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-32-EX: omp.dispatch.body: // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32-EX: omp.inner.for.cond: // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP270:![0-9]+]] // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP270]] // CHECK-32-EX-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] // CHECK-32-EX-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32-EX: omp.inner.for.body: // CHECK-32-EX-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP270]] // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-EX-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP270]] // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32-EX: omp.body.continue: // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32-EX: omp.inner.for.inc: // CHECK-32-EX-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP270]] // CHECK-32-EX-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 // CHECK-32-EX-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP270]] // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP271:![0-9]+]] // CHECK-32-EX: omp.inner.for.end: // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-32-EX: omp.dispatch.inc: // CHECK-32-EX-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] // CHECK-32-EX-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] // CHECK-32-EX-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-32-EX: omp.dispatch.end: // CHECK-32-EX-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) // CHECK-32-EX-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0 // CHECK-32-EX-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-32-EX: .omp.final.then: // CHECK-32-EX-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-32-EX-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-32-EX: .omp.final.done: // CHECK-32-EX-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4:[0-9]+]], i32 [[TMP1]]) // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l185 // CHECK-32-EX-SAME: () #[[ATTR8]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32-EX: user_code.entry: // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-EX-NEXT: [[TMP2:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*)* @__omp_outlined__79 to i8*), i8* null, i8** [[TMP2]], i32 0) // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-EX-NEXT: ret void // CHECK-32-EX: worker.exit: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@__omp_outlined__79 // CHECK-32-EX-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-EX-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-32-EX: cond.true: // CHECK-32-EX-NEXT: br label [[COND_END:%.*]] // CHECK-32-EX: cond.false: // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: br label [[COND_END]] // CHECK-32-EX: cond.end: // CHECK-32-EX-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-32-EX-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32-EX: omp.inner.for.cond: // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP273:![0-9]+]] // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP273]] // CHECK-32-EX-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] // CHECK-32-EX-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32-EX: omp.inner.for.body: // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP273]] // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-EX-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP273]] // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32-EX: omp.body.continue: // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32-EX: omp.inner.for.inc: // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP273]] // CHECK-32-EX-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 1 // CHECK-32-EX-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP273]] // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP274:![0-9]+]] // CHECK-32-EX: omp.inner.for.end: // CHECK-32-EX-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-32-EX: omp.loop.exit: // CHECK-32-EX-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) // CHECK-32-EX-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0 // CHECK-32-EX-NEXT: br i1 [[TMP10]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-32-EX: .omp.final.then: // CHECK-32-EX-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-32-EX-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-32-EX: .omp.final.done: // CHECK-32-EX-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4]], i32 [[TMP1]]) // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l189 // CHECK-32-EX-SAME: () #[[ATTR8]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32-EX: user_code.entry: // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-EX-NEXT: [[TMP2:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*)* @__omp_outlined__80 to i8*), i8* null, i8** [[TMP2]], i32 0) // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-EX-NEXT: ret void // CHECK-32-EX: worker.exit: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@__omp_outlined__80 // CHECK-32-EX-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-EX-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-32-EX: omp.dispatch.cond: // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-32-EX: cond.true: // CHECK-32-EX-NEXT: br label [[COND_END:%.*]] // CHECK-32-EX: cond.false: // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: br label [[COND_END]] // CHECK-32-EX: cond.end: // CHECK-32-EX-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-32-EX-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] // CHECK-32-EX-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-32-EX: omp.dispatch.body: // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32-EX: omp.inner.for.cond: // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP276:![0-9]+]] // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP276]] // CHECK-32-EX-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] // CHECK-32-EX-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32-EX: omp.inner.for.body: // CHECK-32-EX-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP276]] // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-EX-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP276]] // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32-EX: omp.body.continue: // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32-EX: omp.inner.for.inc: // CHECK-32-EX-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP276]] // CHECK-32-EX-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 // CHECK-32-EX-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP276]] // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP277:![0-9]+]] // CHECK-32-EX: omp.inner.for.end: // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-32-EX: omp.dispatch.inc: // CHECK-32-EX-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] // CHECK-32-EX-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] // CHECK-32-EX-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-32-EX: omp.dispatch.end: // CHECK-32-EX-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) // CHECK-32-EX-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0 // CHECK-32-EX-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-32-EX: .omp.final.then: // CHECK-32-EX-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-32-EX-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-32-EX: .omp.final.done: // CHECK-32-EX-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4]], i32 [[TMP1]]) // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l193 // CHECK-32-EX-SAME: () #[[ATTR8]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32-EX: user_code.entry: // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-EX-NEXT: [[TMP2:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*)* @__omp_outlined__81 to i8*), i8* null, i8** [[TMP2]], i32 0) // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-EX-NEXT: ret void // CHECK-32-EX: worker.exit: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@__omp_outlined__81 // CHECK-32-EX-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1073741862, i32 0, i32 9, i32 1, i32 1) // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-32-EX: omp.dispatch.cond: // CHECK-32-EX-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-32-EX-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0 // CHECK-32-EX-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-32-EX: omp.dispatch.body: // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP3]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32-EX: omp.inner.for.cond: // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP279:![0-9]+]] // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP279]] // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]] // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32-EX: omp.inner.for.body: // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP279]] // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-EX-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP279]] // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32-EX: omp.body.continue: // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32-EX: omp.inner.for.inc: // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP279]] // CHECK-32-EX-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP7]], 1 // CHECK-32-EX-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP279]] // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP280:![0-9]+]] // CHECK-32-EX: omp.inner.for.end: // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-32-EX: omp.dispatch.inc: // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-32-EX: omp.dispatch.end: // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = icmp ne i32 [[TMP8]], 0 // CHECK-32-EX-NEXT: br i1 [[TMP9]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-32-EX: .omp.final.then: // CHECK-32-EX-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-32-EX-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-32-EX: .omp.final.done: // CHECK-32-EX-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4]], i32 [[TMP1]]) // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l197 // CHECK-32-EX-SAME: () #[[ATTR8]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32-EX: user_code.entry: // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-EX-NEXT: [[TMP2:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*)* @__omp_outlined__82 to i8*), i8* null, i8** [[TMP2]], i32 0) // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-EX-NEXT: ret void // CHECK-32-EX: worker.exit: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@__omp_outlined__82 // CHECK-32-EX-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1073741861, i32 0, i32 9, i32 1, i32 1) // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-32-EX: omp.dispatch.cond: // CHECK-32-EX-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-32-EX-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0 // CHECK-32-EX-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-32-EX: omp.dispatch.body: // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP3]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32-EX: omp.inner.for.cond: // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP282:![0-9]+]] // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP282]] // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]] // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32-EX: omp.inner.for.body: // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP282]] // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-EX-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP282]] // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32-EX: omp.body.continue: // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32-EX: omp.inner.for.inc: // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP282]] // CHECK-32-EX-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP7]], 1 // CHECK-32-EX-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP282]] // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP283:![0-9]+]] // CHECK-32-EX: omp.inner.for.end: // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-32-EX: omp.dispatch.inc: // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-32-EX: omp.dispatch.end: // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = icmp ne i32 [[TMP8]], 0 // CHECK-32-EX-NEXT: br i1 [[TMP9]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-32-EX: .omp.final.then: // CHECK-32-EX-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-32-EX-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-32-EX: .omp.final.done: // CHECK-32-EX-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4]], i32 [[TMP1]]) // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l201 // CHECK-32-EX-SAME: () #[[ATTR8]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32-EX: user_code.entry: // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-EX-NEXT: [[TMP2:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*)* @__omp_outlined__83 to i8*), i8* null, i8** [[TMP2]], i32 0) // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-EX-NEXT: ret void // CHECK-32-EX: worker.exit: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@__omp_outlined__83 // CHECK-32-EX-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1073741859, i32 0, i32 9, i32 1, i32 1) // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-32-EX: omp.dispatch.cond: // CHECK-32-EX-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-32-EX-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0 // CHECK-32-EX-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-32-EX: omp.dispatch.body: // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP3]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32-EX: omp.inner.for.cond: // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP285:![0-9]+]] // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP285]] // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]] // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32-EX: omp.inner.for.body: // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP285]] // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-EX-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP285]] // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32-EX: omp.body.continue: // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32-EX: omp.inner.for.inc: // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP285]] // CHECK-32-EX-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP7]], 1 // CHECK-32-EX-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP285]] // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP286:![0-9]+]] // CHECK-32-EX: omp.inner.for.end: // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-32-EX: omp.dispatch.inc: // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-32-EX: omp.dispatch.end: // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = icmp ne i32 [[TMP8]], 0 // CHECK-32-EX-NEXT: br i1 [[TMP9]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-32-EX: .omp.final.then: // CHECK-32-EX-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-32-EX-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-32-EX: .omp.final.done: // CHECK-32-EX-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4]], i32 [[TMP1]]) // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l205 // CHECK-32-EX-SAME: () #[[ATTR8]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32-EX: user_code.entry: // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-EX-NEXT: [[TMP2:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*)* @__omp_outlined__84 to i8*), i8* null, i8** [[TMP2]], i32 0) // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-EX-NEXT: ret void // CHECK-32-EX: worker.exit: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@__omp_outlined__84 // CHECK-32-EX-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1073741860, i32 0, i32 9, i32 1, i32 1) // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-32-EX: omp.dispatch.cond: // CHECK-32-EX-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-32-EX-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0 // CHECK-32-EX-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-32-EX: omp.dispatch.body: // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP3]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32-EX: omp.inner.for.cond: // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP288:![0-9]+]] // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP288]] // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]] // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32-EX: omp.inner.for.body: // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP288]] // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-EX-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP288]] // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32-EX: omp.body.continue: // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32-EX: omp.inner.for.inc: // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP288]] // CHECK-32-EX-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP7]], 1 // CHECK-32-EX-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP288]] // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP289:![0-9]+]] // CHECK-32-EX: omp.inner.for.end: // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-32-EX: omp.dispatch.inc: // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-32-EX: omp.dispatch.end: // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = icmp ne i32 [[TMP8]], 0 // CHECK-32-EX-NEXT: br i1 [[TMP9]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-32-EX: .omp.final.then: // CHECK-32-EX-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-32-EX-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-32-EX: .omp.final.done: // CHECK-32-EX-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4]], i32 [[TMP1]]) // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l209 // CHECK-32-EX-SAME: () #[[ATTR8]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32-EX: user_code.entry: // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-EX-NEXT: [[TMP2:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*)* @__omp_outlined__85 to i8*), i8* null, i8** [[TMP2]], i32 0) // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-EX-NEXT: ret void // CHECK-32-EX: worker.exit: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@__omp_outlined__85 // CHECK-32-EX-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 65, i32 0, i32 9, i32 1, i32 1) // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-32-EX: omp.dispatch.cond: // CHECK-32-EX-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-32-EX-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0 // CHECK-32-EX-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-32-EX: omp.dispatch.body: // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP3]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32-EX: omp.inner.for.cond: // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP291:![0-9]+]] // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP291]] // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]] // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32-EX: omp.inner.for.body: // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP291]] // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-EX-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP291]] // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32-EX: omp.body.continue: // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32-EX: omp.inner.for.inc: // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP291]] // CHECK-32-EX-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP7]], 1 // CHECK-32-EX-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP291]] // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_fini_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP291]] // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP292:![0-9]+]] // CHECK-32-EX: omp.inner.for.end: // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-32-EX: omp.dispatch.inc: // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-32-EX: omp.dispatch.end: // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = icmp ne i32 [[TMP8]], 0 // CHECK-32-EX-NEXT: br i1 [[TMP9]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-32-EX: .omp.final.then: // CHECK-32-EX-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-32-EX-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-32-EX: .omp.final.done: // CHECK-32-EX-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4]], i32 [[TMP1]]) // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l214 // CHECK-32-EX-SAME: () #[[ATTR8]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32-EX: user_code.entry: // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-EX-NEXT: [[TMP2:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*)* @__omp_outlined__86 to i8*), i8* null, i8** [[TMP2]], i32 0) // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-EX-NEXT: ret void // CHECK-32-EX: worker.exit: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@__omp_outlined__86 // CHECK-32-EX-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-EX-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-32-EX: cond.true: // CHECK-32-EX-NEXT: br label [[COND_END:%.*]] // CHECK-32-EX: cond.false: // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: br label [[COND_END]] // CHECK-32-EX: cond.end: // CHECK-32-EX-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-32-EX-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32-EX: omp.inner.for.cond: // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP294:![0-9]+]] // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP294]] // CHECK-32-EX-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] // CHECK-32-EX-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32-EX: omp.inner.for.body: // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP294]] // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-EX-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP294]] // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32-EX: omp.body.continue: // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32-EX: omp.inner.for.inc: // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP294]] // CHECK-32-EX-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 1 // CHECK-32-EX-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP294]] // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP295:![0-9]+]] // CHECK-32-EX: omp.inner.for.end: // CHECK-32-EX-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-32-EX: omp.loop.exit: // CHECK-32-EX-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) // CHECK-32-EX-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0 // CHECK-32-EX-NEXT: br i1 [[TMP10]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-32-EX: .omp.final.then: // CHECK-32-EX-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-32-EX-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-32-EX: .omp.final.done: // CHECK-32-EX-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4]], i32 [[TMP1]]) // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l219 // CHECK-32-EX-SAME: () #[[ATTR8]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32-EX: user_code.entry: // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-EX-NEXT: [[TMP2:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*)* @__omp_outlined__87 to i8*), i8* null, i8** [[TMP2]], i32 0) // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-EX-NEXT: ret void // CHECK-32-EX: worker.exit: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@__omp_outlined__87 // CHECK-32-EX-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-EX-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-32-EX: omp.dispatch.cond: // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-32-EX: cond.true: // CHECK-32-EX-NEXT: br label [[COND_END:%.*]] // CHECK-32-EX: cond.false: // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: br label [[COND_END]] // CHECK-32-EX: cond.end: // CHECK-32-EX-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-32-EX-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] // CHECK-32-EX-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-32-EX: omp.dispatch.body: // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32-EX: omp.inner.for.cond: // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP297:![0-9]+]] // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP297]] // CHECK-32-EX-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] // CHECK-32-EX-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32-EX: omp.inner.for.body: // CHECK-32-EX-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP297]] // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-EX-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP297]] // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32-EX: omp.body.continue: // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32-EX: omp.inner.for.inc: // CHECK-32-EX-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP297]] // CHECK-32-EX-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 // CHECK-32-EX-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP297]] // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP298:![0-9]+]] // CHECK-32-EX: omp.inner.for.end: // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-32-EX: omp.dispatch.inc: // CHECK-32-EX-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] // CHECK-32-EX-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] // CHECK-32-EX-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-32-EX: omp.dispatch.end: // CHECK-32-EX-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) // CHECK-32-EX-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0 // CHECK-32-EX-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-32-EX: .omp.final.then: // CHECK-32-EX-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-32-EX-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-32-EX: .omp.final.done: // CHECK-32-EX-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4]], i32 [[TMP1]]) // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l224 // CHECK-32-EX-SAME: () #[[ATTR8]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32-EX: user_code.entry: // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-EX-NEXT: [[TMP2:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*)* @__omp_outlined__88 to i8*), i8* null, i8** [[TMP2]], i32 0) // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-EX-NEXT: ret void // CHECK-32-EX: worker.exit: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@__omp_outlined__88 // CHECK-32-EX-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1073741862, i32 0, i32 9, i32 1, i32 1) // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-32-EX: omp.dispatch.cond: // CHECK-32-EX-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-32-EX-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0 // CHECK-32-EX-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-32-EX: omp.dispatch.body: // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP3]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32-EX: omp.inner.for.cond: // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP300:![0-9]+]] // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP300]] // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]] // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32-EX: omp.inner.for.body: // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP300]] // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-EX-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP300]] // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32-EX: omp.body.continue: // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32-EX: omp.inner.for.inc: // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP300]] // CHECK-32-EX-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP7]], 1 // CHECK-32-EX-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP300]] // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP301:![0-9]+]] // CHECK-32-EX: omp.inner.for.end: // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-32-EX: omp.dispatch.inc: // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-32-EX: omp.dispatch.end: // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = icmp ne i32 [[TMP8]], 0 // CHECK-32-EX-NEXT: br i1 [[TMP9]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-32-EX: .omp.final.then: // CHECK-32-EX-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-32-EX-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-32-EX: .omp.final.done: // CHECK-32-EX-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4]], i32 [[TMP1]]) // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l229 // CHECK-32-EX-SAME: () #[[ATTR8]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32-EX: user_code.entry: // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-EX-NEXT: [[TMP2:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*)* @__omp_outlined__89 to i8*), i8* null, i8** [[TMP2]], i32 0) // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-EX-NEXT: ret void // CHECK-32-EX: worker.exit: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@__omp_outlined__89 // CHECK-32-EX-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1073741861, i32 0, i32 9, i32 1, i32 1) // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-32-EX: omp.dispatch.cond: // CHECK-32-EX-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-32-EX-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0 // CHECK-32-EX-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-32-EX: omp.dispatch.body: // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP3]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32-EX: omp.inner.for.cond: // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP303:![0-9]+]] // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP303]] // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]] // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32-EX: omp.inner.for.body: // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP303]] // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-EX-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP303]] // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32-EX: omp.body.continue: // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32-EX: omp.inner.for.inc: // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP303]] // CHECK-32-EX-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP7]], 1 // CHECK-32-EX-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP303]] // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP304:![0-9]+]] // CHECK-32-EX: omp.inner.for.end: // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-32-EX: omp.dispatch.inc: // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-32-EX: omp.dispatch.end: // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = icmp ne i32 [[TMP8]], 0 // CHECK-32-EX-NEXT: br i1 [[TMP9]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-32-EX: .omp.final.then: // CHECK-32-EX-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-32-EX-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-32-EX: .omp.final.done: // CHECK-32-EX-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4]], i32 [[TMP1]]) // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l234 // CHECK-32-EX-SAME: () #[[ATTR8]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32-EX: user_code.entry: // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-EX-NEXT: [[TMP2:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*)* @__omp_outlined__90 to i8*), i8* null, i8** [[TMP2]], i32 0) // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-EX-NEXT: ret void // CHECK-32-EX: worker.exit: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@__omp_outlined__90 // CHECK-32-EX-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1073741859, i32 0, i32 9, i32 1, i32 1) // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-32-EX: omp.dispatch.cond: // CHECK-32-EX-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-32-EX-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0 // CHECK-32-EX-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-32-EX: omp.dispatch.body: // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP3]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32-EX: omp.inner.for.cond: // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP306:![0-9]+]] // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP306]] // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]] // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32-EX: omp.inner.for.body: // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP306]] // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-EX-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP306]] // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32-EX: omp.body.continue: // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32-EX: omp.inner.for.inc: // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP306]] // CHECK-32-EX-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP7]], 1 // CHECK-32-EX-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP306]] // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP307:![0-9]+]] // CHECK-32-EX: omp.inner.for.end: // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-32-EX: omp.dispatch.inc: // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-32-EX: omp.dispatch.end: // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = icmp ne i32 [[TMP8]], 0 // CHECK-32-EX-NEXT: br i1 [[TMP9]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-32-EX: .omp.final.then: // CHECK-32-EX-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-32-EX-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-32-EX: .omp.final.done: // CHECK-32-EX-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4]], i32 [[TMP1]]) // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l239 // CHECK-32-EX-SAME: () #[[ATTR8]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32-EX: user_code.entry: // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-EX-NEXT: [[TMP2:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*)* @__omp_outlined__91 to i8*), i8* null, i8** [[TMP2]], i32 0) // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-EX-NEXT: ret void // CHECK-32-EX: worker.exit: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@__omp_outlined__91 // CHECK-32-EX-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1073741860, i32 0, i32 9, i32 1, i32 1) // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-32-EX: omp.dispatch.cond: // CHECK-32-EX-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-32-EX-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0 // CHECK-32-EX-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-32-EX: omp.dispatch.body: // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP3]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32-EX: omp.inner.for.cond: // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP309:![0-9]+]] // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP309]] // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]] // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32-EX: omp.inner.for.body: // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP309]] // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-EX-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP309]] // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32-EX: omp.body.continue: // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32-EX: omp.inner.for.inc: // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP309]] // CHECK-32-EX-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP7]], 1 // CHECK-32-EX-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP309]] // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP310:![0-9]+]] // CHECK-32-EX: omp.inner.for.end: // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-32-EX: omp.dispatch.inc: // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-32-EX: omp.dispatch.end: // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[TMP9:%.*]] = icmp ne i32 [[TMP8]], 0 // CHECK-32-EX-NEXT: br i1 [[TMP9]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK-32-EX: .omp.final.then: // CHECK-32-EX-NEXT: store i32 10, i32* [[I]], align 4 // CHECK-32-EX-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK-32-EX: .omp.final.done: // CHECK-32-EX-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4]], i32 [[TMP1]]) // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l244 // CHECK-32-EX-SAME: () #[[ATTR8]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32-EX: user_code.entry: // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-EX-NEXT: [[TMP2:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*)* @__omp_outlined__92 to i8*), i8* null, i8** [[TMP2]], i32 0) // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-EX-NEXT: ret void // CHECK-32-EX: worker.exit: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@__omp_outlined__92 // CHECK-32-EX-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-EX-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-32-EX: omp.dispatch.cond: // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-32-EX: cond.true: // CHECK-32-EX-NEXT: br label [[COND_END:%.*]] // CHECK-32-EX: cond.false: // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: br label [[COND_END]] // CHECK-32-EX: cond.end: // CHECK-32-EX-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-32-EX-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] // CHECK-32-EX-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-32-EX: omp.dispatch.body: // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32-EX: omp.inner.for.cond: // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] // CHECK-32-EX-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32-EX: omp.inner.for.body: // CHECK-32-EX-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-EX-NEXT: store i32 [[ADD]], i32* [[I]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32-EX: omp.body.continue: // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32-EX: omp.inner.for.inc: // CHECK-32-EX-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 // CHECK-32-EX-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK-32-EX: omp.inner.for.end: // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-32-EX: omp.dispatch.inc: // CHECK-32-EX-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] // CHECK-32-EX-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] // CHECK-32-EX-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-32-EX: omp.dispatch.end: // CHECK-32-EX-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l248 // CHECK-32-EX-SAME: () #[[ATTR8]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32-EX: user_code.entry: // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-EX-NEXT: [[TMP2:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*)* @__omp_outlined__93 to i8*), i8* null, i8** [[TMP2]], i32 0) // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-EX-NEXT: ret void // CHECK-32-EX: worker.exit: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@__omp_outlined__93 // CHECK-32-EX-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-EX-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-32-EX: cond.true: // CHECK-32-EX-NEXT: br label [[COND_END:%.*]] // CHECK-32-EX: cond.false: // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: br label [[COND_END]] // CHECK-32-EX: cond.end: // CHECK-32-EX-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-32-EX-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32-EX: omp.inner.for.cond: // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] // CHECK-32-EX-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32-EX: omp.inner.for.body: // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-EX-NEXT: store i32 [[ADD]], i32* [[I]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32-EX: omp.body.continue: // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32-EX: omp.inner.for.inc: // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP8]], 1 // CHECK-32-EX-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK-32-EX: omp.inner.for.end: // CHECK-32-EX-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK-32-EX: omp.loop.exit: // CHECK-32-EX-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l252 // CHECK-32-EX-SAME: () #[[ATTR8]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32-EX: user_code.entry: // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-EX-NEXT: [[TMP2:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*)* @__omp_outlined__94 to i8*), i8* null, i8** [[TMP2]], i32 0) // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-EX-NEXT: ret void // CHECK-32-EX: worker.exit: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@__omp_outlined__94 // CHECK-32-EX-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-EX-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-32-EX: omp.dispatch.cond: // CHECK-32-EX-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9 // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK-32-EX: cond.true: // CHECK-32-EX-NEXT: br label [[COND_END:%.*]] // CHECK-32-EX: cond.false: // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: br label [[COND_END]] // CHECK-32-EX: cond.end: // CHECK-32-EX-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ] // CHECK-32-EX-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]] // CHECK-32-EX-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-32-EX: omp.dispatch.body: // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32-EX: omp.inner.for.cond: // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]] // CHECK-32-EX-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32-EX: omp.inner.for.body: // CHECK-32-EX-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-EX-NEXT: store i32 [[ADD]], i32* [[I]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32-EX: omp.body.continue: // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32-EX: omp.inner.for.inc: // CHECK-32-EX-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 // CHECK-32-EX-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK-32-EX: omp.inner.for.end: // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-32-EX: omp.dispatch.inc: // CHECK-32-EX-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] // CHECK-32-EX-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP13]], [[TMP14]] // CHECK-32-EX-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-32-EX: omp.dispatch.end: // CHECK-32-EX-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]) // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l256 // CHECK-32-EX-SAME: () #[[ATTR8]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32-EX: user_code.entry: // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-EX-NEXT: [[TMP2:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*)* @__omp_outlined__95 to i8*), i8* null, i8** [[TMP2]], i32 0) // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-EX-NEXT: ret void // CHECK-32-EX: worker.exit: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@__omp_outlined__95 // CHECK-32-EX-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1073741862, i32 0, i32 9, i32 1, i32 1) // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-32-EX: omp.dispatch.cond: // CHECK-32-EX-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-32-EX-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0 // CHECK-32-EX-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-32-EX: omp.dispatch.body: // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP3]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32-EX: omp.inner.for.cond: // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP312:![0-9]+]] // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP312]] // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]] // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32-EX: omp.inner.for.body: // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP312]] // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-EX-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP312]] // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32-EX: omp.body.continue: // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32-EX: omp.inner.for.inc: // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP312]] // CHECK-32-EX-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP7]], 1 // CHECK-32-EX-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP312]] // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP313:![0-9]+]] // CHECK-32-EX: omp.inner.for.end: // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-32-EX: omp.dispatch.inc: // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-32-EX: omp.dispatch.end: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l260 // CHECK-32-EX-SAME: () #[[ATTR8]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32-EX: user_code.entry: // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-EX-NEXT: [[TMP2:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*)* @__omp_outlined__96 to i8*), i8* null, i8** [[TMP2]], i32 0) // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-EX-NEXT: ret void // CHECK-32-EX: worker.exit: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@__omp_outlined__96 // CHECK-32-EX-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1073741861, i32 0, i32 9, i32 1, i32 1) // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-32-EX: omp.dispatch.cond: // CHECK-32-EX-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-32-EX-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0 // CHECK-32-EX-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-32-EX: omp.dispatch.body: // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP3]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32-EX: omp.inner.for.cond: // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP315:![0-9]+]] // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP315]] // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]] // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32-EX: omp.inner.for.body: // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP315]] // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-EX-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP315]] // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32-EX: omp.body.continue: // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32-EX: omp.inner.for.inc: // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP315]] // CHECK-32-EX-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP7]], 1 // CHECK-32-EX-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP315]] // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP316:![0-9]+]] // CHECK-32-EX: omp.inner.for.end: // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-32-EX: omp.dispatch.inc: // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-32-EX: omp.dispatch.end: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l264 // CHECK-32-EX-SAME: () #[[ATTR8]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32-EX: user_code.entry: // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-EX-NEXT: [[TMP2:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*)* @__omp_outlined__97 to i8*), i8* null, i8** [[TMP2]], i32 0) // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-EX-NEXT: ret void // CHECK-32-EX: worker.exit: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@__omp_outlined__97 // CHECK-32-EX-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1073741859, i32 0, i32 9, i32 1, i32 1) // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-32-EX: omp.dispatch.cond: // CHECK-32-EX-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-32-EX-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0 // CHECK-32-EX-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-32-EX: omp.dispatch.body: // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP3]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32-EX: omp.inner.for.cond: // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP318:![0-9]+]] // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP318]] // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]] // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32-EX: omp.inner.for.body: // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP318]] // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-EX-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP318]] // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32-EX: omp.body.continue: // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32-EX: omp.inner.for.inc: // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP318]] // CHECK-32-EX-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP7]], 1 // CHECK-32-EX-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP318]] // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP319:![0-9]+]] // CHECK-32-EX: omp.inner.for.end: // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-32-EX: omp.dispatch.inc: // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-32-EX: omp.dispatch.end: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3foov_l268 // CHECK-32-EX-SAME: () #[[ATTR8]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[CAPTURED_VARS_ADDRS:%.*]] = alloca [0 x i8*], align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_target_init(%struct.ident_t* @[[GLOB1]], i8 2, i1 false) // CHECK-32-EX-NEXT: [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1 // CHECK-32-EX-NEXT: br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]] // CHECK-32-EX: user_code.entry: // CHECK-32-EX-NEXT: [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(%struct.ident_t* @[[GLOB1]]) // CHECK-32-EX-NEXT: [[TMP2:%.*]] = bitcast [0 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** // CHECK-32-EX-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*)* @__omp_outlined__98 to i8*), i8* null, i8** [[TMP2]], i32 0) // CHECK-32-EX-NEXT: call void @__kmpc_target_deinit(%struct.ident_t* @[[GLOB1]], i8 2) // CHECK-32-EX-NEXT: ret void // CHECK-32-EX: worker.exit: // CHECK-32-EX-NEXT: ret void // // // CHECK-32-EX-LABEL: define {{[^@]+}}@__omp_outlined__98 // CHECK-32-EX-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] { // CHECK-32-EX-NEXT: entry: // CHECK-32-EX-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[TMP:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK-32-EX-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 // CHECK-32-EX-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 // CHECK-32-EX-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK-32-EX-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 // CHECK-32-EX-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4 // CHECK-32-EX-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 1073741860, i32 0, i32 9, i32 1, i32 1) // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK-32-EX: omp.dispatch.cond: // CHECK-32-EX-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) // CHECK-32-EX-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0 // CHECK-32-EX-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK-32-EX: omp.dispatch.body: // CHECK-32-EX-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK-32-EX-NEXT: store i32 [[TMP3]], i32* [[DOTOMP_IV]], align 4 // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK-32-EX: omp.inner.for.cond: // CHECK-32-EX-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP321:![0-9]+]] // CHECK-32-EX-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP321]] // CHECK-32-EX-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]] // CHECK-32-EX-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK-32-EX: omp.inner.for.body: // CHECK-32-EX-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP321]] // CHECK-32-EX-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1 // CHECK-32-EX-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK-32-EX-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP321]] // CHECK-32-EX-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK-32-EX: omp.body.continue: // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK-32-EX: omp.inner.for.inc: // CHECK-32-EX-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP321]] // CHECK-32-EX-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP7]], 1 // CHECK-32-EX-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP321]] // CHECK-32-EX-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP322:![0-9]+]] // CHECK-32-EX: omp.inner.for.end: // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK-32-EX: omp.dispatch.inc: // CHECK-32-EX-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK-32-EX: omp.dispatch.end: // CHECK-32-EX-NEXT: ret void //