; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-globals none --version 5 ; RUN: opt -passes=loop-vectorize -force-vector-width=4 -S %s | FileCheck %s define void @const_fold_ptradd(ptr %dst, i64 %d) { ; CHECK-LABEL: define void @const_fold_ptradd( ; CHECK-SAME: ptr [[DST:%.*]], i64 [[D:%.*]]) { ; CHECK-NEXT: [[ENTRY:.*:]] ; CHECK-NEXT: br label %[[VECTOR_PH:.*]] ; CHECK: [[VECTOR_PH]]: ; CHECK-NEXT: br label %[[VECTOR_BODY:.*]] ; CHECK: [[VECTOR_BODY]]: ; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ] ; CHECK-NEXT: store i16 0, ptr [[DST]], align 2 ; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4 ; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i64 [[INDEX_NEXT]], 100 ; CHECK-NEXT: br i1 [[TMP1]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]] ; CHECK: [[MIDDLE_BLOCK]]: ; CHECK-NEXT: br label %[[EXIT:.*]] ; CHECK: [[EXIT]]: ; CHECK-NEXT: ret void ; entry: br label %loop.header loop.header: ; preds = %loop.latch, %entry %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop.latch ] br i1 true, label %loop.latch, label %else else: br label %loop.latch loop.latch: %const.0 = phi i64 [ %d, %else ], [ 0, %loop.header ] %gep = getelementptr i16, ptr %dst, i64 %const.0 store i16 0, ptr %gep, align 2 %iv.next = add i64 %iv, 1 %cmp = icmp ult i64 %iv.next, 100 br i1 %cmp, label %loop.header, label %exit exit: ret void } define void @const_fold_inbounds_ptradd(ptr %dst, i64 %d) { ; CHECK-LABEL: define void @const_fold_inbounds_ptradd( ; CHECK-SAME: ptr [[DST:%.*]], i64 [[D:%.*]]) { ; CHECK-NEXT: [[ENTRY:.*:]] ; CHECK-NEXT: br label %[[VECTOR_PH:.*]] ; CHECK: [[VECTOR_PH]]: ; CHECK-NEXT: br label %[[VECTOR_BODY:.*]] ; CHECK: [[VECTOR_BODY]]: ; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ] ; CHECK-NEXT: store i16 0, ptr [[DST]], align 2 ; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4 ; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i64 [[INDEX_NEXT]], 100 ; CHECK-NEXT: br i1 [[TMP1]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP3:![0-9]+]] ; CHECK: [[MIDDLE_BLOCK]]: ; CHECK-NEXT: br label %[[EXIT:.*]] ; CHECK: [[EXIT]]: ; CHECK-NEXT: ret void ; entry: br label %loop.header loop.header: ; preds = %loop.latch, %entry %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop.latch ] br i1 true, label %loop.latch, label %else else: br label %loop.latch loop.latch: %const.0 = phi i64 [ %d, %else ], [ 0, %loop.header ] %gep = getelementptr inbounds i16, ptr %dst, i64 %const.0 store i16 0, ptr %gep, align 2 %iv.next = add i64 %iv, 1 %cmp = icmp ult i64 %iv.next, 100 br i1 %cmp, label %loop.header, label %exit exit: ret void } define void @const_fold_select(ptr %dst, i64 %d) { ; CHECK-LABEL: define void @const_fold_select( ; CHECK-SAME: ptr [[DST:%.*]], i64 [[D:%.*]]) { ; CHECK-NEXT: [[ENTRY:.*:]] ; CHECK-NEXT: br label %[[VECTOR_PH:.*]] ; CHECK: [[VECTOR_PH]]: ; CHECK-NEXT: [[TMP3:%.*]] = or i64 [[D]], 1 ; CHECK-NEXT: br label %[[VECTOR_BODY:.*]] ; CHECK: [[VECTOR_BODY]]: ; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ] ; CHECK-NEXT: store i64 [[TMP3]], ptr [[DST]], align 8 ; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4 ; CHECK-NEXT: [[TMP4:%.*]] = icmp eq i64 [[INDEX_NEXT]], 100 ; CHECK-NEXT: br i1 [[TMP4]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]] ; CHECK: [[MIDDLE_BLOCK]]: ; CHECK-NEXT: br label %[[EXIT:.*]] ; CHECK: [[EXIT]]: ; CHECK-NEXT: ret void ; entry: br label %loop.header loop.header: ; preds = %loop.latch, %entry %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop.latch ] br i1 true, label %loop.latch, label %else else: br label %loop.latch loop.latch: %const.1 = phi i64 [ %d, %else ], [ 1, %loop.header ] %or = or i64 %d, %const.1 store i64 %or, ptr %dst, align 8 %iv.next = add i64 %iv, 1 %cmp = icmp ult i64 %iv.next, 100 br i1 %cmp, label %loop.header, label %exit exit: ret void } define void @const_fold_add_sub_mul_ashr_lshr(ptr %dst, i64 %d) { ; CHECK-LABEL: define void @const_fold_add_sub_mul_ashr_lshr( ; CHECK-SAME: ptr [[DST:%.*]], i64 [[D:%.*]]) { ; CHECK-NEXT: [[ENTRY:.*:]] ; CHECK-NEXT: br label %[[VECTOR_PH:.*]] ; CHECK: [[VECTOR_PH]]: ; CHECK-NEXT: br label %[[VECTOR_BODY:.*]] ; CHECK: [[VECTOR_BODY]]: ; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ] ; CHECK-NEXT: store i64 1, ptr [[DST]], align 8 ; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4 ; CHECK-NEXT: [[TMP6:%.*]] = icmp eq i64 [[INDEX_NEXT]], 100 ; CHECK-NEXT: br i1 [[TMP6]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP5:![0-9]+]] ; CHECK: [[MIDDLE_BLOCK]]: ; CHECK-NEXT: br label %[[EXIT:.*]] ; CHECK: [[EXIT]]: ; CHECK-NEXT: ret void ; entry: br label %loop.header loop.header: ; preds = %loop.latch, %entry %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop.latch ] br i1 true, label %loop.latch, label %else else: br label %loop.latch loop.latch: %const.1 = phi i64 [ %d, %else ], [ 1, %loop.header ] %add = add i64 2, %const.1 %sub = sub i64 %add, %const.1 %ashr = ashr i64 %sub, %const.1 %mul = mul i64 %ashr, 3 %lshr = lshr i64 %mul, %const.1 store i64 %lshr, ptr %dst, align 8 %iv.next = add i64 %iv, 1 %cmp = icmp ult i64 %iv.next, 100 br i1 %cmp, label %loop.header, label %exit exit: ret void } define void @const_fold_and_or_xor(ptr %dst, i64 %d) { ; CHECK-LABEL: define void @const_fold_and_or_xor( ; CHECK-SAME: ptr [[DST:%.*]], i64 [[D:%.*]]) { ; CHECK-NEXT: [[ENTRY:.*:]] ; CHECK-NEXT: br label %[[VECTOR_PH:.*]] ; CHECK: [[VECTOR_PH]]: ; CHECK-NEXT: br label %[[VECTOR_BODY:.*]] ; CHECK: [[VECTOR_BODY]]: ; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ] ; CHECK-NEXT: store i64 1, ptr [[DST]], align 8 ; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4 ; CHECK-NEXT: [[TMP4:%.*]] = icmp eq i64 [[INDEX_NEXT]], 100 ; CHECK-NEXT: br i1 [[TMP4]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP6:![0-9]+]] ; CHECK: [[MIDDLE_BLOCK]]: ; CHECK-NEXT: br label %[[EXIT:.*]] ; CHECK: [[EXIT]]: ; CHECK-NEXT: ret void ; entry: br label %loop.header loop.header: ; preds = %loop.latch, %entry %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop.latch ] br i1 true, label %loop.latch, label %else else: br label %loop.latch loop.latch: %const.1 = phi i64 [ %d, %else ], [ 1, %loop.header ] %or = or i64 2, %const.1 %and = and i64 %or, %const.1 %xor = and i64 %and, %const.1 store i64 %xor, ptr %dst, align 8 %iv.next = add i64 %iv, 1 %cmp = icmp ult i64 %iv.next, 100 br i1 %cmp, label %loop.header, label %exit exit: ret void } define void @const_fold_cmp_zext(ptr %dst, i64 %d) { ; CHECK-LABEL: define void @const_fold_cmp_zext( ; CHECK-SAME: ptr [[DST:%.*]], i64 [[D:%.*]]) { ; CHECK-NEXT: [[ENTRY:.*:]] ; CHECK-NEXT: br label %[[VECTOR_PH:.*]] ; CHECK: [[VECTOR_PH]]: ; CHECK-NEXT: br label %[[VECTOR_BODY:.*]] ; CHECK: [[VECTOR_BODY]]: ; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ] ; CHECK-NEXT: store i8 1, ptr [[DST]], align 1 ; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4 ; CHECK-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 100 ; CHECK-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP7:![0-9]+]] ; CHECK: [[MIDDLE_BLOCK]]: ; CHECK-NEXT: br label %[[EXIT:.*]] ; CHECK: [[EXIT]]: ; CHECK-NEXT: ret void ; entry: br label %loop.header loop.header: ; preds = %loop.latch, %entry %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop.latch ] br i1 true, label %loop.latch, label %else else: br label %loop.latch loop.latch: %const.1 = phi i64 [ %d, %else ], [ 1, %loop.header ] %val = icmp ugt i64 2, %const.1 %zext = zext i1 %val to i8 store i8 %zext, ptr %dst, align 1 %iv.next = add i64 %iv, 1 %cmp = icmp ult i64 %iv.next, 100 br i1 %cmp, label %loop.header, label %exit exit: ret void } define void @const_fold_trunc(ptr %dst, i64 %d) { ; CHECK-LABEL: define void @const_fold_trunc( ; CHECK-SAME: ptr [[DST:%.*]], i64 [[D:%.*]]) { ; CHECK-NEXT: [[ENTRY:.*:]] ; CHECK-NEXT: br label %[[VECTOR_PH:.*]] ; CHECK: [[VECTOR_PH]]: ; CHECK-NEXT: br label %[[VECTOR_BODY:.*]] ; CHECK: [[VECTOR_BODY]]: ; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ] ; CHECK-NEXT: store i16 0, ptr [[DST]], align 2 ; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4 ; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i64 [[INDEX_NEXT]], 100 ; CHECK-NEXT: br i1 [[TMP2]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP8:![0-9]+]] ; CHECK: [[MIDDLE_BLOCK]]: ; CHECK-NEXT: br label %[[EXIT:.*]] ; CHECK: [[EXIT]]: ; CHECK-NEXT: ret void ; entry: br label %loop.header loop.header: ; preds = %loop.latch, %entry %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop.latch ] br i1 true, label %loop.latch, label %else else: br label %loop.latch loop.latch: %const.0 = phi i64 [ %d, %else ], [ 0, %loop.header ] %trunc = trunc i64 %const.0 to i16 store i16 %trunc, ptr %dst, align 2 %iv.next = add i64 %iv, 1 %cmp = icmp ult i64 %iv.next, 100 br i1 %cmp, label %loop.header, label %exit exit: ret void } define void @const_fold_binaryintrinsic(ptr %dst, i64 %d) { ; CHECK-LABEL: define void @const_fold_binaryintrinsic( ; CHECK-SAME: ptr [[DST:%.*]], i64 [[D:%.*]]) { ; CHECK-NEXT: [[ENTRY:.*:]] ; CHECK-NEXT: br label %[[VECTOR_PH:.*]] ; CHECK: [[VECTOR_PH]]: ; CHECK-NEXT: br label %[[VECTOR_BODY:.*]] ; CHECK: [[VECTOR_BODY]]: ; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ] ; CHECK-NEXT: store i64 3, ptr [[DST]], align 2 ; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4 ; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i64 [[INDEX_NEXT]], 100 ; CHECK-NEXT: br i1 [[TMP2]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP9:![0-9]+]] ; CHECK: [[MIDDLE_BLOCK]]: ; CHECK-NEXT: br label %[[EXIT:.*]] ; CHECK: [[EXIT]]: ; CHECK-NEXT: ret void ; entry: br label %loop loop: %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ] %const.0 = xor i64 %d, %d %trunc = call i64 @llvm.umax.i64(i64 %const.0, i64 3) store i64 %trunc, ptr %dst, align 2 %iv.next = add i64 %iv, 1 %cmp = icmp ult i64 %iv.next, 100 br i1 %cmp, label %loop, label %exit exit: ret void } define void @const_fold_widegep(ptr noalias %A, ptr noalias %B, i64 %d) { ; CHECK-LABEL: define void @const_fold_widegep( ; CHECK-SAME: ptr noalias [[A:%.*]], ptr noalias [[B:%.*]], i64 [[D:%.*]]) { ; CHECK-NEXT: [[ENTRY:.*:]] ; CHECK-NEXT: br label %[[VECTOR_PH:.*]] ; CHECK: [[VECTOR_PH]]: ; CHECK-NEXT: br label %[[VECTOR_BODY:.*]] ; CHECK: [[VECTOR_BODY]]: ; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ] ; CHECK-NEXT: store ptr [[A]], ptr [[B]], align 8 ; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4 ; CHECK-NEXT: [[TMP0:%.*]] = icmp eq i64 [[INDEX_NEXT]], 100 ; CHECK-NEXT: br i1 [[TMP0]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP10:![0-9]+]] ; CHECK: [[MIDDLE_BLOCK]]: ; CHECK-NEXT: br label %[[EXIT:.*]] ; CHECK: [[EXIT]]: ; CHECK-NEXT: ret void ; entry: br label %loop loop: %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ] %const.0 = xor i64 %d, %d %gep.A = getelementptr i64, ptr %A, i64 %const.0 %gep.B = getelementptr i64, ptr %B, i64 %const.0 store ptr %gep.A, ptr %gep.B %iv.next = add nuw nsw i64 %iv, 1 %exit.cond = icmp ult i64 %iv.next, 100 br i1 %exit.cond, label %loop, label %exit exit: ret void }