; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6
; RUN: opt -S --passes=slp-vectorizer -mtriple=x86_64-unknown-linux-gnu -mcpu=skylake-avx512 -mattr=-avx512f -slp-threshold=-99999 < %s | FileCheck %s

define i32 @test() {
; CHECK-LABEL: define i32 @test(
; CHECK-SAME: ) #[[ATTR0:[0-9]+]] {
; CHECK-NEXT:  [[BB:.*]]:
; CHECK-NEXT:    [[TMP0:%.*]] = call <4 x i32> @llvm.masked.gather.v4i32.v4p3(<4 x ptr addrspace(3)> align 4 zeroinitializer, <4 x i1> splat (i1 true), <4 x i32> poison)
; CHECK-NEXT:    br i1 false, label %[[BB4:.*]], label %[[BB8:.*]]
; CHECK:       [[BB4]]:
; CHECK-NEXT:    [[PHI:%.*]] = phi i32 [ 0, %[[BB]] ]
; CHECK-NEXT:    [[TMP1:%.*]] = phi <4 x i32> [ zeroinitializer, %[[BB]] ]
; CHECK-NEXT:    [[TMP2:%.*]] = shufflevector <4 x i32> [[TMP0]], <4 x i32> poison, <4 x i32> <i32 1, i32 2, i32 3, i32 0>
; CHECK-NEXT:    [[TMP3:%.*]] = shufflevector <4 x i32> [[TMP1]], <4 x i32> [[TMP2]], <8 x i32> <i32 3, i32 0, i32 1, i32 2, i32 7, i32 4, i32 5, i32 6>
; CHECK-NEXT:    [[ICMP:%.*]] = icmp slt i32 [[PHI]], 0
; CHECK-NEXT:    br label %[[BB18:.*]]
; CHECK:       [[BB8]]:
; CHECK-NEXT:    [[TMP4:%.*]] = shufflevector <4 x i32> [[TMP0]], <4 x i32> poison, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 poison, i32 poison, i32 poison, i32 poison>
; CHECK-NEXT:    [[TMP5:%.*]] = shufflevector <8 x i32> <i32 0, i32 0, i32 0, i32 0, i32 poison, i32 poison, i32 poison, i32 poison>, <8 x i32> [[TMP4]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 10, i32 11>
; CHECK-NEXT:    br i1 false, label %[[BB18]], label %[[BB9:.*]]
; CHECK:       [[BB9]]:
; CHECK-NEXT:    [[TMP6:%.*]] = phi <8 x i32> [ zeroinitializer, %[[BB8]] ]
; CHECK-NEXT:    br label %[[BB18]]
; CHECK:       [[BB18]]:
; CHECK-NEXT:    [[TMP7:%.*]] = phi <8 x i32> [ [[TMP6]], %[[BB9]] ], [ [[TMP3]], %[[BB4]] ], [ [[TMP5]], %[[BB8]] ]
; CHECK-NEXT:    br label %[[BB27:.*]]
; CHECK:       [[BB27]]:
; CHECK-NEXT:    [[OR33:%.*]] = call i32 @llvm.vector.reduce.or.v8i32(<8 x i32> [[TMP7]])
; CHECK-NEXT:    ret i32 [[OR33]]
;
bb:
  %load = load i32, ptr addrspace(3) null, align 4
  %load1 = load i32, ptr addrspace(3) null, align 4
  %load2 = load i32, ptr addrspace(3) null, align 4
  %load3 = load i32, ptr addrspace(3) null, align 4
  br i1 false, label %bb4, label %bb8

bb4:
  %phi = phi i32 [ 0, %bb ]
  %phi5 = phi i32 [ 0, %bb ]
  %phi6 = phi i32 [ 0, %bb ]
  %phi7 = phi i32 [ 0, %bb ]
  %icmp = icmp slt i32 %phi, 0
  br label %bb18

bb8:
  br i1 false, label %bb18, label %bb9

bb9:
  %phi10 = phi i32 [ 0, %bb8 ]
  %phi11 = phi i32 [ 0, %bb8 ]
  %phi12 = phi i32 [ 0, %bb8 ]
  %phi13 = phi i32 [ 0, %bb8 ]
  %phi14 = phi i32 [ 0, %bb8 ]
  %phi15 = phi i32 [ 0, %bb8 ]
  %phi16 = phi i32 [ 0, %bb8 ]
  %phi17 = phi i32 [ 0, %bb8 ]
  br label %bb18

bb18:
  %phi19 = phi i32 [ %phi17, %bb9 ], [ %phi, %bb4 ], [ 0, %bb8 ]
  %phi20 = phi i32 [ %phi10, %bb9 ], [ %phi7, %bb4 ], [ 0, %bb8 ]
  %phi21 = phi i32 [ %phi11, %bb9 ], [ %load, %bb4 ], [ %load, %bb8 ]
  %phi22 = phi i32 [ %phi12, %bb9 ], [ %phi6, %bb4 ], [ 0, %bb8 ]
  %phi23 = phi i32 [ %phi13, %bb9 ], [ %phi5, %bb4 ], [ 0, %bb8 ]
  %phi24 = phi i32 [ %phi14, %bb9 ], [ %load1, %bb4 ], [ %load1, %bb8 ]
  %phi25 = phi i32 [ %phi15, %bb9 ], [ %load2, %bb4 ], [ %load2, %bb8 ]
  %phi26 = phi i32 [ %phi16, %bb9 ], [ %load3, %bb4 ], [ %load3, %bb8 ]
  br label %bb27

bb27:
  %or = or i32 %phi19, %phi20
  %or28 = or i32 %or, %phi21
  %or29 = or i32 %or28, %phi22
  %or30 = or i32 %or29, %phi23
  %or31 = or i32 %or30, %phi24
  %or32 = or i32 %or31, %phi25
  %or33 = or i32 %or32, %phi26
  ret i32 %or33
}