dbb79c30c9
This patch adds code generation for RISCV64 instrumentation.The work
involved includes the following three points:
a) Implements support for instrumenting direct function call and jump
on RISC-V which relies on , Atomic instructions
(used to increment counters) are only available on RISC-V when the A
extension is used.
b) Implements support for instrumenting direct function inderect call
by implementing the createInstrumentedIndCallHandlerEntryBB and
createInstrumentedIndCallHandlerExitBB interfaces. In this process, we
need to accurately record the target address and IndCallID to ensure
the correct recording of the indirect call counters.
c)Implemented the RISCV64 Bolt runtime library, implemented some system
call interfaces through embedded assembly. Get the difference between
runtime addrress of .text section andstatic address in section header
table, which in turn can be used to search for indirect call
description.
However, the community code currently has problems with relocation in
some scenarios, but this has nothing to do with instrumentation. We
may continue to submit patches to fix the related bugs.
460 lines
19 KiB
C
460 lines
19 KiB
C
#ifndef LLVM_TOOLS_LLVM_BOLT_SYS_RISCV
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#define LLVM_TOOLS_LLVM_BOLT_SYS_RISCV
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// Save all registers while keeping 16B stack alignment
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#define SAVE_ALL \
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"addi sp, sp, -16\n" \
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"sd x0, 0(sp)\n" \
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"sd x1, 8(sp)\n" \
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"addi sp, sp, -16\n" \
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"sd x2, 0(sp)\n" \
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"sd x3, 8(sp)\n" \
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"addi sp, sp, -16\n" \
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"sd x4, 0(sp)\n" \
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"sd x5, 8(sp)\n" \
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"addi sp, sp, -16\n" \
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"sd x6, 0(sp)\n" \
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"sd x7, 8(sp)\n" \
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"addi sp, sp, -16\n" \
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"sd x8, 0(sp)\n" \
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"sd x9, 8(sp)\n" \
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"addi sp, sp, -16\n" \
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"sd x10, 0(sp)\n" \
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"sd x11, 8(sp)\n" \
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"addi sp, sp, -16\n" \
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"sd x12, 0(sp)\n" \
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"sd x13, 8(sp)\n" \
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"addi sp, sp, -16\n" \
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"sd x14, 0(sp)\n" \
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"sd x15, 8(sp)\n" \
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"addi sp, sp, -16\n" \
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"sd x16, 0(sp)\n" \
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"sd x17, 8(sp)\n" \
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"addi sp, sp, -16\n" \
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"sd x18, 0(sp)\n" \
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"sd x19, 8(sp)\n" \
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"addi sp, sp, -16\n" \
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"sd x20, 0(sp)\n" \
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"sd x21, 8(sp)\n" \
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"addi sp, sp, -16\n" \
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"sd x22, 0(sp)\n" \
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"sd x23, 8(sp)\n" \
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"addi sp, sp, -16\n" \
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"sd x24, 0(sp)\n" \
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"sd x25, 8(sp)\n" \
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"addi sp, sp, -16\n" \
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"sd x26, 0(sp)\n" \
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"sd x27, 8(sp)\n" \
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"addi sp, sp, -16\n" \
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"sd x28, 0(sp)\n" \
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"sd x29, 8(sp)\n" \
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"addi sp, sp, -16\n" \
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"sd x30, 0(sp)\n" \
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"sd x31, 8(sp)\n"
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// Mirrors SAVE_ALL
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#define RESTORE_ALL \
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"ld x30, 0(sp)\n" \
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"ld x31, 8(sp)\n" \
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"addi sp, sp, 16\n" \
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"ld x28, 0(sp)\n" \
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"ld x29, 8(sp)\n" \
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"addi sp, sp, 16\n" \
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"ld x26, 0(sp)\n" \
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"ld x27, 8(sp)\n" \
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"addi sp, sp, 16\n" \
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"ld x24, 0(sp)\n" \
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"ld x25, 8(sp)\n" \
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"addi sp, sp, 16\n" \
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"ld x22, 0(sp)\n" \
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"ld x23, 8(sp)\n" \
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"addi sp, sp, 16\n" \
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"ld x20, 0(sp)\n" \
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"ld x21, 8(sp)\n" \
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"addi sp, sp, 16\n" \
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"ld x18, 0(sp)\n" \
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"ld x19, 8(sp)\n" \
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"addi sp, sp, 16\n" \
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"ld x16, 0(sp)\n" \
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"ld x17, 8(sp)\n" \
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"addi sp, sp, 16\n" \
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"ld x14, 0(sp)\n" \
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"ld x15, 8(sp)\n" \
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"addi sp, sp, 16\n" \
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"ld x12, 0(sp)\n" \
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"ld x13, 8(sp)\n" \
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"addi sp, sp, 16\n" \
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"ld x10, 0(sp)\n" \
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"ld x11, 8(sp)\n" \
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"addi sp, sp, 16\n" \
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"ld x8, 0(sp)\n" \
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"ld x9, 8(sp)\n" \
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"addi sp, sp, 16\n" \
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"ld x6, 0(sp)\n" \
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"ld x7, 8(sp)\n" \
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"addi sp, sp, 16\n" \
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"ld x4, 0(sp)\n" \
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"ld x5, 8(sp)\n" \
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"addi sp, sp, 16\n" \
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"ld x2, 0(sp)\n" \
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"ld x3, 8(sp)\n" \
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"addi sp, sp, 16\n" \
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"ld x0, 0(sp)\n" \
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"ld x1, 8(sp)\n" \
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"addi sp, sp, 16\n"
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// Anonymous namespace covering everything but our library entry point
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namespace {
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// Get the difference between runtime addrress of .text section and
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// static address in section header table. Can be extracted from arbitrary
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// pc value recorded at runtime to get the corresponding static address, which
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// in turn can be used to search for indirect call description. Needed because
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// indirect call descriptions are read-only non-relocatable data.
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uint64_t getTextBaseAddress() {
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uint64_t DynAddr;
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uint64_t StaticAddr;
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__asm__ volatile("lla %0, __hot_end\n\t"
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"lui %1, %%hi(__hot_end)\n\t"
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"addi %1, %1, %%lo(__hot_end)\n\t"
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: "=r"(DynAddr), "=r"(StaticAddr));
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return DynAddr - StaticAddr;
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}
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uint64_t __read(uint64_t fd, const void *buf, uint64_t count) {
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uint64_t ret;
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register uint64_t a0 __asm__("a0") = fd;
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register const void *a1 __asm__("a1") = buf;
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register uint64_t a2 __asm__("a2") = count;
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register uint64_t a7 __asm__("a7") =
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63; // Assuming 63 is the syscall number for read
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__asm__ __volatile__("ecall\n\t"
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"mv %0, a0"
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: "=r"(ret)
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: "r"(a0), "r"(a1), "r"(a2), "r"(a7)
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: "memory");
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return ret;
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}
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uint64_t __write(uint64_t fd, const void *buf, uint64_t count) {
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uint64_t ret;
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register uint64_t a0 __asm__("a0") = fd;
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register const void *a1 __asm__("a1") = buf;
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register uint64_t a2 __asm__("a2") = count;
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register uint32_t a7 __asm__("a7") =
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64; // Assuming 64 is the syscall number for write
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__asm__ __volatile__("ecall\n\t"
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"mv %0, a0"
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: "=r"(ret)
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: "r"(a0), "r"(a1), "r"(a2), "r"(a7)
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: "memory");
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return ret;
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}
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void *__mmap(uint64_t addr, uint64_t size, uint64_t prot, uint64_t flags,
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uint64_t fd, uint64_t offset) {
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void *ret;
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register uint64_t a0 __asm__("a0") = addr;
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register uint64_t a1 __asm__("a1") = size;
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register uint64_t a2 __asm__("a2") = prot;
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register uint64_t a3 __asm__("a3") = flags;
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register uint64_t a4 __asm__("a4") = fd;
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register uint64_t a5 __asm__("a5") = offset;
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register uint32_t a7 __asm__("a7") =
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222; // Assuming 222 is the syscall number for mmap
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__asm__ __volatile__("ecall\n\t"
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"mv %0, a0"
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: "=r"(ret)
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: "r"(a0), "r"(a1), "r"(a2), "r"(a3), "r"(a4), "r"(a5),
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"r"(a7)
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: "memory");
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return ret;
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}
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uint64_t __munmap(void *addr, uint64_t size) {
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uint64_t ret;
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register void *a0 __asm__("a0") = addr;
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register uint64_t a1 __asm__("a1") = size;
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register uint32_t a7 __asm__("a7") = 215;
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__asm__ __volatile__("ecall\n\t"
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"mv %0, a0"
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: "=r"(ret), "+r"(a0), "+r"(a1)
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: "r"(a7)
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: "memory");
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return ret;
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}
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uint64_t __exit(uint64_t code) {
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uint64_t ret;
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register uint64_t a0 __asm__("a0") = code;
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register uint32_t a7 __asm__("a7") = 94;
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__asm__ __volatile__("ecall\n\t"
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"mv %0, a0"
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: "=r"(ret), "+r"(a0)
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: "r"(a7)
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: "memory");
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return ret;
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}
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uint64_t __open(const char *pathname, uint64_t flags, uint64_t mode) {
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uint64_t ret;
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register int a0 __asm__("a0") =
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-100; // Assuming -100 is an invalid file descriptor
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register const char *a1 __asm__("a1") = pathname;
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register uint64_t a2 __asm__("a2") = flags;
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register uint64_t a3 __asm__("a3") = mode;
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register uint64_t a7 __asm__("a7") =
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56; // Assuming 56 is the syscall number for open
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__asm__ __volatile__("ecall\n\t"
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"mv %0, a0"
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: "=r"(ret)
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: "r"(a0), "r"(a1), "r"(a2), "r"(a3), "r"(a7)
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: "memory");
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return ret;
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}
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long __getdents64(unsigned int fd, dirent64 *dirp, size_t count) {
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long ret;
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register unsigned int a0 __asm__("a0") = fd;
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register dirent64 *a1 __asm__("a1") = dirp;
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register size_t a2 __asm__("a2") = count;
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register uint32_t a7 __asm__("a7") = 61;
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__asm__ __volatile__("ecall\n\t"
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"mv %0, a0"
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: "=r"(ret), "+r"(a0), "+r"(a1)
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: "r"(a2), "r"(a7)
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: "memory");
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return ret;
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}
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uint64_t __readlink(const char *pathname, char *buf, size_t bufsize) {
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uint64_t ret;
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register int a0 __asm__("a0") = -100;
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register const char *a1 __asm__("a1") = pathname;
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register char *a2 __asm__("a2") = buf;
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register size_t a3 __asm__("a3") = bufsize;
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register uint32_t a7 __asm__("a7") = 78; // readlinkat
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__asm__ __volatile__("ecall\n\t"
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"mv %0, a0"
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: "=r"(ret), "+r"(a0), "+r"(a1)
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: "r"(a2), "r"(a3), "r"(a7)
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: "memory");
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return ret;
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}
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uint64_t __lseek(uint64_t fd, uint64_t pos, uint64_t whence) {
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uint64_t ret;
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register uint64_t a0 __asm__("a0") = fd;
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register uint64_t a1 __asm__("a1") = pos;
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register uint64_t a2 __asm__("a2") = whence;
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register uint32_t a7 __asm__("a7") = 62;
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__asm__ __volatile__("ecall\n\t"
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"mv %0, a0"
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: "=r"(ret), "+r"(a0), "+r"(a1)
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: "r"(a2), "r"(a7)
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: "memory");
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return ret;
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}
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int __ftruncate(uint64_t fd, uint64_t length) {
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int ret;
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register uint64_t a0 __asm__("a0") = fd;
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register uint64_t a1 __asm__("a1") = length;
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register uint32_t a7 __asm__("a7") = 46;
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__asm__ __volatile__("ecall\n\t"
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"mv %0, a0"
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: "=r"(ret), "+r"(a0), "+r"(a1)
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: "r"(a7)
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: "memory");
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return ret;
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}
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int __close(uint64_t fd) {
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int ret;
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register uint64_t a0 __asm__("a0") = fd;
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register uint32_t a7 __asm__("a7") =
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57; // Assuming 57 is the syscall number for close
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__asm__ __volatile__("ecall\n\t"
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"mv %0, a0"
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: "=r"(ret)
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: "r"(a0), "r"(a7)
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: "memory");
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return ret;
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}
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int __madvise(void *addr, size_t length, int advice) {
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int ret;
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register void *a0 __asm__("a0") = addr;
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register size_t a1 __asm__("a1") = length;
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register int a2 __asm__("a2") = advice;
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register uint32_t a7 __asm__("a7") = 233;
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__asm__ __volatile__("ecall\n\t"
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"mv %0, a0"
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: "=r"(ret), "+r"(a0), "+r"(a1)
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: "r"(a2), "r"(a7)
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: "memory");
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return ret;
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}
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int __uname(struct UtsNameTy *buf) {
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int ret;
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register UtsNameTy *a0 __asm__("a0") = buf;
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register uint32_t a7 __asm__("a7") = 160;
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__asm__ __volatile__("ecall\n\t"
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"mv %0, a0"
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: "=r"(ret), "+r"(a0)
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: "r"(a7)
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: "memory");
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return ret;
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}
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uint64_t __nanosleep(const timespec *req, timespec *rem) {
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uint64_t ret;
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register const timespec *a0 __asm__("a0") = req;
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register timespec *a1 __asm__("a1") = rem;
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register uint32_t a7 __asm__("a7") = 101;
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__asm__ __volatile__("ecall\n\t"
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"mv %0, a0"
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: "=r"(ret), "+r"(a0), "+r"(a1)
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: "r"(a7)
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: "memory");
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return ret;
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}
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int64_t __fork() {
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uint64_t ret;
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// clone instead of fork with flags
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// "CLONE_CHILD_CLEARTID|CLONE_CHILD_SETTID|SIGCHLD"
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register uint64_t a0 __asm__("a0") = 0x1200011;
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register uint64_t a1 __asm__("a1") = 0;
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register uint64_t a2 __asm__("a2") = 0;
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register uint64_t a3 __asm__("a3") = 0;
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register uint64_t a4 __asm__("a4") = 0;
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register uint32_t a7 __asm__("a7") = 220;
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__asm__ __volatile__("ecall\n\t"
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"mv %0, a0"
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: "=r"(ret), "+r"(a0), "+r"(a1)
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: "r"(a2), "r"(a3), "r"(a4), "r"(a7)
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: "memory");
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return ret;
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}
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int __mprotect(void *addr, size_t len, int prot) {
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int ret;
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register void *a0 __asm__("a0") = addr;
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register size_t a1 __asm__("a1") = len;
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register int a2 __asm__("a2") = prot;
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register uint32_t a7 __asm__("a7") = 226;
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__asm__ __volatile__("ecall\n\t"
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"mv %0, a0"
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: "=r"(ret), "+r"(a0), "+r"(a1)
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: "r"(a2), "r"(a7)
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: "memory");
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return ret;
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}
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uint64_t __getpid() {
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uint64_t ret;
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register uint32_t a7 __asm__("a7") = 172;
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__asm__ __volatile__("ecall\n\t"
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"mv %0, a0"
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: "=r"(ret)
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: "r"(a7)
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: "memory");
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return ret;
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}
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uint64_t __getppid() {
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uint64_t ret;
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register uint32_t a7 __asm__("a7") = 173;
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__asm__ __volatile__("ecall\n\t"
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"mv %0, a0"
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: "=r"(ret)
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: "r"(a7)
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: "memory");
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return ret;
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}
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int __setpgid(uint64_t pid, uint64_t pgid) {
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int ret;
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register uint64_t a0 __asm__("a0") = pid;
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register uint64_t a1 __asm__("a1") = pgid;
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register uint32_t a7 __asm__("a7") = 154;
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__asm__ __volatile__("ecall\n\t"
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"mv %0, a0"
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: "=r"(ret), "+r"(a0), "+r"(a1)
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: "r"(a7)
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: "memory");
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return ret;
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}
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uint64_t __getpgid(uint64_t pid) {
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uint64_t ret;
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register uint64_t a0 __asm__("a0") = pid;
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register uint32_t a7 __asm__("a7") = 155;
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__asm__ __volatile__("ecall\n\t"
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"mv %0, a0"
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: "=r"(ret), "+r"(a0)
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: "r"(a7)
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: "memory");
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return ret;
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}
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int __kill(uint64_t pid, int sig) {
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int ret;
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register uint64_t a0 __asm__("a0") = pid;
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register int a1 __asm__("a1") = sig;
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register uint32_t a7 __asm__("a7") = 129;
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__asm__ __volatile__("ecall\n\t"
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"mv %0, a0"
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: "=r"(ret), "+r"(a0), "+r"(a1)
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: "r"(a7)
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: "memory");
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return ret;
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}
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int __fsync(int fd) {
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int ret;
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register int a0 __asm__("a0") = fd;
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register uint32_t a7 __asm__("a7") = 82;
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__asm__ __volatile__("ecall\n\t"
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"mv %0, a0"
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: "=r"(ret), "+r"(a0)
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: "r"(a7)
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: "memory");
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return ret;
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}
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|
|
uint64_t __sigprocmask(int how, const void *set, void *oldset) {
|
|
uint64_t ret;
|
|
register int a0 __asm__("a0") = how;
|
|
register const void *a1 __asm__("a1") = set;
|
|
register void *a2 __asm__("a2") = oldset;
|
|
register long a3 asm("a3") = 8;
|
|
register uint32_t a7 __asm__("a7") = 135;
|
|
__asm__ __volatile__("ecall\n\t"
|
|
"mv %0, a0"
|
|
: "=r"(ret), "+r"(a0), "+r"(a1)
|
|
: "r"(a2), "r"(a3), "r"(a7)
|
|
: "memory");
|
|
return ret;
|
|
}
|
|
|
|
int __prctl(int option, unsigned long arg2, unsigned long arg3,
|
|
unsigned long arg4, unsigned long arg5) {
|
|
int ret;
|
|
register int a0 __asm__("a0") = option;
|
|
register unsigned long a1 __asm__("a1") = arg2;
|
|
register unsigned long a2 __asm__("a2") = arg3;
|
|
register unsigned long a3 __asm__("a3") = arg4;
|
|
register unsigned long a4 __asm__("a4") = arg5;
|
|
register uint32_t a7 __asm__("a7") = 167;
|
|
__asm__ __volatile__("ecall\n\t"
|
|
"mv %0, a0"
|
|
: "=r"(ret), "+r"(a0), "+r"(a1)
|
|
: "r"(a2), "r"(a3), "r"(a4), "r"(a7)
|
|
: "cc", "memory");
|
|
return ret;
|
|
}
|
|
} // anonymous namespace
|
|
|
|
#endif |