24194090e1
This is an alternative of D157485 and a pre-feature to support AVX10. AVX10 Architecture Specification: https://cdrdv2.intel.com/v1/dl/getContent/784267 AVX10 Technical Paper: https://cdrdv2.intel.com/v1/dl/getContent/784343 RFC: https://discourse.llvm.org/t/rfc-design-for-avx10-feature-support/72661 Based on the feedbacks from LLVM and GCC community, we have agreed to start from supporting `-m[no-]evex512` on existing AVX512 features. The option `-mno-evex512` can be used with `-mavx512xxx` to build binaries that can run on both legacy AVX512 targets and AVX10-256. There're still arguments about what's the expected behavior when this option as well as `-mavx512xxx` used together with `-mavx10.1-256`. We decided to defer the support of `-mavx10.1` after we made consensus. Or furthermore, we start from supporting AVX10.2 and not providing any AVX10.1 options. Reviewed By: RKSimon, skan Differential Revision: https://reviews.llvm.org/D159250
71 lines
2.6 KiB
C
71 lines
2.6 KiB
C
/*===------------- avx512ifmaintrin.h - IFMA intrinsics ------------------===
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*
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*
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* Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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* See https://llvm.org/LICENSE.txt for license information.
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* SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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*
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*===-----------------------------------------------------------------------===
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*/
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#ifndef __IMMINTRIN_H
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#error "Never use <avx512ifmaintrin.h> directly; include <immintrin.h> instead."
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#endif
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#ifndef __IFMAINTRIN_H
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#define __IFMAINTRIN_H
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/* Define the default attributes for the functions in this file. */
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#define __DEFAULT_FN_ATTRS \
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__attribute__((__always_inline__, __nodebug__, \
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__target__("avx512ifma,evex512"), __min_vector_width__(512)))
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static __inline__ __m512i __DEFAULT_FN_ATTRS
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_mm512_madd52hi_epu64 (__m512i __X, __m512i __Y, __m512i __Z)
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{
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return (__m512i)__builtin_ia32_vpmadd52huq512((__v8di) __X, (__v8di) __Y,
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(__v8di) __Z);
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}
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static __inline__ __m512i __DEFAULT_FN_ATTRS
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_mm512_mask_madd52hi_epu64 (__m512i __W, __mmask8 __M, __m512i __X, __m512i __Y)
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{
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return (__m512i)__builtin_ia32_selectq_512(__M,
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(__v8di)_mm512_madd52hi_epu64(__W, __X, __Y),
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(__v8di)__W);
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}
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static __inline__ __m512i __DEFAULT_FN_ATTRS
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_mm512_maskz_madd52hi_epu64 (__mmask8 __M, __m512i __X, __m512i __Y, __m512i __Z)
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{
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return (__m512i)__builtin_ia32_selectq_512(__M,
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(__v8di)_mm512_madd52hi_epu64(__X, __Y, __Z),
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(__v8di)_mm512_setzero_si512());
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}
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static __inline__ __m512i __DEFAULT_FN_ATTRS
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_mm512_madd52lo_epu64 (__m512i __X, __m512i __Y, __m512i __Z)
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{
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return (__m512i)__builtin_ia32_vpmadd52luq512((__v8di) __X, (__v8di) __Y,
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(__v8di) __Z);
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}
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static __inline__ __m512i __DEFAULT_FN_ATTRS
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_mm512_mask_madd52lo_epu64 (__m512i __W, __mmask8 __M, __m512i __X, __m512i __Y)
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{
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return (__m512i)__builtin_ia32_selectq_512(__M,
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(__v8di)_mm512_madd52lo_epu64(__W, __X, __Y),
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(__v8di)__W);
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}
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static __inline__ __m512i __DEFAULT_FN_ATTRS
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_mm512_maskz_madd52lo_epu64 (__mmask8 __M, __m512i __X, __m512i __Y, __m512i __Z)
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{
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return (__m512i)__builtin_ia32_selectq_512(__M,
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(__v8di)_mm512_madd52lo_epu64(__X, __Y, __Z),
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(__v8di)_mm512_setzero_si512());
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}
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#undef __DEFAULT_FN_ATTRS
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#endif
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